Hardware based motor drive controller

    公开(公告)号:US11502629B2

    公开(公告)日:2022-11-15

    申请号:US17137598

    申请日:2020-12-30

    Abstract: A motor system with an input for coupling to a motor control signal that, when presented in a predetermined state, indicates a motor receiving power should be disabled from rotating. The system also includes controller circuitry for providing a disabling signal to motor rotation, independent of processor software control signaling and the power, in response to the control signal.

    PROPAGATION DELAY COMPENSATION FOR SPI INTERFACES

    公开(公告)号:US20220292048A1

    公开(公告)日:2022-09-15

    申请号:US17748302

    申请日:2022-05-19

    Abstract: A method includes receiving a chip select signal at an SPI client device. The method also includes, responsive to receiving the chip select signal, transmitting a first bit of an SPI transmission to an SPI host device, where the first bit of the SPI transmission is transmitted with a delay based at least in part on a loop propagation delay of an SPI channel. The method includes receiving a clock signal at the SPI client device. The method also includes, responsive to receiving the clock signal, transmitting a second bit of the SPI transmission to the SPI host device.

    Managing pulse-width modulation trip signals from multiple sources

    公开(公告)号:US11290099B2

    公开(公告)日:2022-03-29

    申请号:US17066660

    申请日:2020-10-09

    Abstract: An integrated communications subsystem (ICSS) includes a pulse-width modulator which drives a power stage, such as a motor. The pulse-width modulator is configured shut off the power stage when the pulse-width modulator receives a trip signal from a logic circuit of the ICSS. The logic circuit can easily be reprogrammed to send a trip signal only when certain error conditions are detected. Moreover, the ICSS contains one or more filters which can adjust the sensitivity of the logic circuit to error signals, enabling the ICSS to distinguish between true errors which require shutdown and glitches, which can be ignored during operation of the ICSS.

    Motor drive phase sector buffer, offset and gain error circuitry

    公开(公告)号:US10734927B2

    公开(公告)日:2020-08-04

    申请号:US16544249

    申请日:2019-08-19

    Abstract: A sort buffer includes a phase sector determination circuit, a phase sector update circuit, and a phase sector completion circuit. The phase sector determination circuit is configured to determine a phase sector corresponding to a phase of a first sine and cosine sample pair received from an encoder or resolver. The phase sector update circuit is configured to determine whether a second sine and cosine sample pair corresponding to the phase sector is stored in a lookup table (LUT) and, in response to a determination that a second sine and cosine sample pair corresponding to the phase sector is not stored in the LUT, store the first sine and cosine sample pair in the LUT. The phase sector completion circuit is configured to determine whether the LUT has stored, for each of a plurality of phase sectors, a corresponding sine and cosine sample pair.

    Serializer-deserializer for motor drive circuit

    公开(公告)号:US10547268B2

    公开(公告)日:2020-01-28

    申请号:US15858485

    申请日:2017-12-29

    Abstract: A motor drive circuit includes a first serializer-deserializer (SER-DES) module that converts first SER-DES input signals into a first SER-DES output serial data stream. The first SER-DES input signals relate to motor control inputs or motor drive power outputs. A second SER-DES module converts a second SER-DES input serial data stream corresponding to the first SER-DES output serial data stream into second SER-DES output signals. The second SER-DES input signals relate to motor drive power outputs or motor control inputs. A serial isolation channel provides a galvanic isolation barrier between the first SER-DES module and the second SER-DES module. The serial isolation channel communicates the first SER-DES output serial data stream across the galvanic isolation barrier to provide the second SER-DES input serial data stream.

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