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公开(公告)号：US20230117485A1
公开(公告)日：2023-04-20
申请号：US18084635
申请日：2022-12-20
Applicant: Texas Instruments Incorporated
Inventor： Mihir Narendra MODY , Niraj NANDAN , Rajasekhar Reddy ALLU
Abstract: An integrated circuit includes: a local memory; and a first processing circuit coupled to the local memory. The first processing component is configured to: receive a first set of image data; perform a first image processing operation on the first set of image data to produce a second set of image data; and store at least some of the second set of image data into the local memory. The integrated circuit also includes a second processing circuit coupled to the local memory and configured to: receive at least some of the second set of image data from the local memory; and perform a second image processing operation on the second set of image data to produce a third set of image data.
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公开(公告)号：US20220408064A1
公开(公告)日：2022-12-22
申请号：US17895191
申请日：2022-08-25
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Shashank DABRAL , Mihir Narendra MODY , Denis BEAUDOIN , Niraj NANDAN , Gang HUA
Abstract: A method of de-mosaicing pixel data from an image processor includes generating a pixel block that includes a plurality of image pixels. The method also includes determining a first image gradient between a first set of pixels of the pixel block and a second image gradient between a second set of pixels of the pixel block. The method also includes determining a first adaptive threshold value based on intensity of a third set of pixels of the pixel block. The pixels of the third set of pixels are adjacent to one another. The method also includes filtering the pixel block in a vertical, horizontal, or neutral direction based on the first and second image gradients and the first adaptive threshold value utilizing a plurality of FIR filters to generate a plurality of component images.
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公开(公告)号：US20220263979A1
公开(公告)日：2022-08-18
申请号：US17739291
申请日：2022-05-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Gang HUA , Mihir Narendra MODY , Rajasekhar Reddy ALLU , Niraj NANDAN , Shashank DABRAL
Abstract: In some examples, a method comprises receiving pixel data from an image capture device having a color filter, wherein the pixel data represents a portion of an image. The method further includes performing wavelet decomposition on the pixel data to produce decomposed pixel data and determining a local intensity of the pixel data. The method also includes determining a noise threshold value based on the local intensity and a noise intensity function that is based on the color filter; determining a noise value for the pixel data based on the decomposed pixel data and the noise threshold value; and correcting the pixel data based on the noise value to produce an output image.
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公开(公告)号：US20210326050A1
公开(公告)日：2021-10-21
申请号：US17233361
申请日：2021-04-16
Applicant: Texas Instruments Incorporated
Inventor： Mihir Narendra MODY , Niraj NANDAN , Rajasekhar Reddy ALLU
Abstract: An integrated circuit includes: a local memory; and a first processing circuit coupled to the local memory. The first processing component is configured to: receive a first set of image data; perform a first image processing operation on the first set of image data to produce a second set of image data; and store at least some of the second set of image data into the local memory. The integrated circuit also includes a second processing circuit coupled to the local memory and configured to: receive at least some of the second set of image data from the local memory; and perform a second image processing operation on the second set of image data to produce a third set of image data.
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公开(公告)号：US20200379928A1
公开(公告)日：2020-12-03
申请号：US16995364
申请日：2020-08-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Mihir MODY , Niraj NANDAN , Hetul SANGHVI , Brian CHAE , Rajasekhar Reddy ALLU , Jason A.T. JONES , Anthony LELL , Anish REGHUNATH
Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.
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Patent Agency Ranking
公开(公告)号：US20180192020A1
公开(公告)日：2018-07-05
申请号：US15395001
申请日：2016-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Mihir Narendra MODY , Shashank DABRAL , Rajasekhar ALLU , Niraj NANDAN
CPC classification number: H04N9/045 , G06T1/20 , H04N9/04515 , H04N9/67 , H04N2209/046
Abstract: An image signal processor includes a first matrix processing circuit, a post processing circuit, a second matrix processing circuit, and a split visual and analytics circuit. The first matrix processing circuit is configured to receive a plurality of component images generated based on an image captured by an image sensor and generate a plurality of first matrix outputs based on the plurality of component images. The post processing circuit is configured to perform color conversion on the plurality of first matrix outputs to generate a first luminance component of the image and a chrominance component of the image. The second matrix processing circuit is configured to perform color conversion on the plurality of first matrix outputs to generate a second luminance component of the image and a saturation component of the image. The split visual and analytics circuit is configured to generate visual and analytic data of the image.
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公开(公告)号：US20250054192A1
公开(公告)日：2025-02-13
申请号：US18929419
申请日：2024-10-28
Applicant: Texas Instruments Incorporated
Inventor： Gang HUA , Mihir Narendra MODY , Niraj NANDAN , Shashank DABRAL , Rajasekhar Reddy ALLU , Denis Roland BEAUDOIN
Abstract: Techniques for image processing including receiving input image data, wherein the input image data includes data associated with a clear color channel, receiving a color offset value associated with a color channel, wherein color values for the color channel are not provided in the input image data, based on the color offset value, generating intermediate estimated color values for the color channel, wherein generating the intermediate estimated color values includes: clipping color values that have a magnitude greater than the color offset value, and adjusting color values that have a magnitude less than the color offset value based on the color offset value, applying a color correction function to the intermediate estimated color values based on the color offset value to determine color corrected estimated color values, and outputting the color corrected estimated color values.
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公开(公告)号：US20250030951A1
公开(公告)日：2025-01-23
申请号：US18909023
申请日：2024-10-08
Applicant: Texas Instruments Incorporated
Inventor： Gang HUA , Mihir Narendra MODY , Niraj NANDAN , Shashank DABRAL , Rajasekhar Reddy ALLU , Denis Roland BEAUDOIN
Abstract: A technique for image processing, comprising: receiving input image data, wherein the image data is companded into a first bit depth, wherein the image data includes incomplete color values for pixels of the image data, and wherein the image data is associated with a first color space, interpolating the image data to generate color values for the incomplete color values for pixels of the image data, expanding the image data from the first bit depth to a second bit depth, wherein the color values of the expanded image data have a linear dynamic range, and wherein the second bit depth is higher than the first bit depth, converting the color values for pixels of the expanded image data from the first color space to a second color space, and compressing the color values for pixels of the image data to a third bit depth, the third bit depth lower than the second bit depth, and wherein the compressed color values have a nonlinear dynamic range.
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公开(公告)号：US20240427717A1
公开(公告)日：2024-12-26
申请号：US18819007
申请日：2024-08-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Mihir Narendra MODY , Ankur ANKUR , Vivek Vilas DHANDE , Kedar Satish CHITNIS , Niraj NANDAN , Brijesh JADAV , Shyam JAGANNATHAN , Prithvi Shankar YEYYADI ANANTHA , Santhanakrishnan Narayanan NARAYANAN
Abstract: Systems and methods in which trace data is efficiently managed are provided. An example system includes a memory, a first interface, and a processing resource communicably coupled to the first interface and to the memory. The processing resource includes a buffer, and a first controller to transmit a set of data from the buffer with associated trace information for the set of data to the memory. A second controller transmits the set of data with the associated trace information from the memory to a second interface.
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公开(公告)号：US20230291864A1
公开(公告)日：2023-09-14
申请号：US17690829
申请日：2022-03-09
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Mihir Narendra MODY , Brijesh JADAV , Gang HUA , Niraj NANDAN , Rajasekhar Reddy ALLU , Ankur ANKUR , Mayank MANGLA
CPC classification number: H04N5/2628 , G06T3/40 , G06T7/12 , G06T7/60 , G06T11/00
Abstract: A technique for determining regions and block sizes for configuring a perspective transformation engine including determining a set of scale ratios for images captured by a camera, generating a scale ratio image based on the set of scale ratios, determining a set of boundary ranges for the scale ratio image, generating a binary scale ratio image using the set of scale ratios of the scale ratio image, determining a set of regions based on the set of boundary ranges for the binary scale ratio image, determining a block size for each region of the determined set of regions, and outputting the determined set of regions and the determined block sizes.
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