中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

31 records (took 0.019 seconds)

    Ultrasonic flow meter and excitation method
    11.
    发明授权
    Ultrasonic flow meter and excitation method 有权

    公开(公告)号：US11353347B2

    公开(公告)日：2022-06-07

    申请号：US15708553

    申请日：2017-09-19

    Applicant: Texas Instruments Incorporated

    Inventor： Anand Dabak ,  Luis Reynoso Covarrubias ,  Srinath Ramaswamy ,  Srinivas Lingam

    IPC: G01F1/66 ,  G01F15/02 ,  H04B11/00 ,  G01F1/667

    Abstract: Disclosed examples include methods and systems to measure fluid flow, including a transmit circuit to provide a transducer transmit signal based on a transmit pulse signal, a receive circuit to receive a transducer receive signal, an ADC to sample a receive signal from the receive circuit and provide a sampled signal, and a processing circuit that computes a transit time based on the sampled signal, and provides the transmit pulse signal including a first portion with a frequency in a first frequency band, and a second portion with a second frequency outside the first frequency band to mitigate undesired transducer vibration, where the second frequency is outside a transducer frequency bandwidth of the transducer.

    Network communication system with node energy reduction packet protocol
    12.
    发明授权
    Network communication system with node energy reduction packet protocol 有权

    公开(公告)号：US10693778B2

    公开(公告)日：2020-06-23

    申请号：US16101649

    申请日：2018-08-13

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Tarkesh Pande ,  Srinivas Lingam

    IPC: H04L12/66 ,  H04L12/721 ,  H04L12/26 ,  H04L12/741 ,  H04L12/833

    Abstract: A method of communicating a packet between a first node and a second node, the packet comprising a data payload and a portion of information preceding the data payload. The method comprises: (i) first, identifying a quality of a channel between the first node and the second node; (ii) second, in response to the quality of the channel, selecting a manner of communication of the information preceding the data payload; (iii) third, encoding the selected manner of communication in the portion of information preceding data payload; and (iv) fourth, transmitting the packet from the first node to the second node.

    Network communication system with node energy reduction packet protocol
    13.
    发明授权
    Network communication system with node energy reduction packet protocol 有权

    公开(公告)号：US10050878B2

    公开(公告)日：2018-08-14

    申请号：US14953683

    申请日：2015-11-30

    Applicant: Texas Instruments Incorporated

    Inventor： Tarkesh Pande ,  Srinivas Lingam

    IPC: H04J3/00 ,  H04L12/721 ,  H04L12/26 ,  H04L12/741 ,  H04L12/833

    Abstract: A method of communicating a packet between a first node and a second node, the packet comprising a data payload and a portion of information preceding the data payload. The method comprises: (i) first, identifying a quality of a channel between the first node and the second node; (ii) second, in response to the quality of the channel, selecting a manner of communication of the information preceding the data payload; (iii) third, encoding the selected manner of communication in the portion of information preceding data payload; and (iv) fourth, transmitting the packet from the first node to the second node.

    LOAD STORE CIRCUIT WITH DEDICATED SINGLE OR DUAL BIT SHIFT CIRCUIT AND OPCODES FOR LOW POWER ACCELERATOR PROCESSOR
    14.
    发明申请
    LOAD STORE CIRCUIT WITH DEDICATED SINGLE OR DUAL BIT SHIFT CIRCUIT AND OPCODES FOR LOW POWER ACCELERATOR PROCESSOR 审中-公开
    具有专用单个或双位移位电路的负载存储电路和低功率加速器处理器的操作码

    公开(公告)号：US20170060586A1

    公开(公告)日：2017-03-02

    申请号：US14840308

    申请日：2015-08-31

    Applicant: Texas Instruments Incorporated

    Inventor： Srinivas Lingam ,  Seok-Jun Lee

    IPC: G06F9/30 ,  G06F13/40

    CPC classification number: G06F9/30032 ,  G06F9/30036 ,  G06F9/30043 ,  G06F13/4068 ,  Y02D10/14 ,  Y02D10/151

    Abstract: Described examples include integrated circuits such as microcontrollers with a low energy accelerator processor circuit or other application specific integrated processor circuit including a load store circuit operative to perform load and store operations associated with at least one register and a low gate count shift circuit to selectively shift the data of the register by only an integer number bits less than the register data width without using a barrel shifter for low power operation to support vector operations for FFT or filtering functions.

    Abstract translation: 所描述的示例包括诸如具有低能量加速器处理器电路的微控制器或其他专用集成处理器电路的集成电路，其包括可操作以执行与至少一个寄存器和低门限值移位电路相关联的负载和存储操作的负载存储电路，以选择性地移位 寄存器的数据只有一个整数比特位数小于寄存器数据宽度，而不使用桶形移位器进行低功耗操作，以支持FFT或滤波功能的向量运算。

    Adaptive modulation system and method to minimize energy consumption
    15.
    发明授权
    Adaptive modulation system and method to minimize energy consumption 有权
    自适应调制系统和最小化能量消耗的方法

    公开(公告)号：US09276636B2

    公开(公告)日：2016-03-01

    申请号：US14586867

    申请日：2014-12-30

    Applicant: Texas Instruments Incorporated

    Inventor： Srinivas Lingam ,  Tarkesh Pande

    IPC: H04B15/00 ,  H04B3/54

    CPC classification number: H04B3/544 ,  H04B3/542

    Abstract: A communication device includes a modulating component, a transmitting component and a controlling component. The modulating component generates a first modulated packet and a second modulated packet. The first modulated packet is based on a first modulation scheme and the second modulated packet is based on a second modulation scheme. The first modulation scheme has a first amount of energy associated therewith, and the second modulation scheme has a second amount of energy associated therewith. The first amount of energy is less than the second amount of energy. The transmitting component generates a transmit packet based on one of the first modulated packet and the second modulated packet. The controlling component generates a control signal to instruct the modulating component to generate the first modulated packet when the transmit packet will be less than a predetermined threshold. The threshold is based on the first amount of energy.

    Abstract translation: 通信装置包括调制部件，发送部件和控制部件。 调制组件产生第一调制分组和第二调制分组。 第一调制分组基于第一调制方案，第二调制分组基于第二调制方案。 第一调制方案具有与之相关联的第一量的能量，并且第二调制方案具有与其相关联的第二量的能量。 第一能量量小于第二能量。 发送组件基于第一调制分组和第二调制分组中的一个生成发送分组。 当发送分组将小于预定阈值时，控制分量产生控制信号以指示调制分量产生第一调制分组。 阈值基于第一能量量。

    Low energy accelerator processor architecture with short parallel instruction word
    16.
    发明授权
    Low energy accelerator processor architecture with short parallel instruction word 有权

    公开(公告)号：US11341085B2

    公开(公告)日：2022-05-24

    申请号：US16920901

    申请日：2020-07-06

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Srinivas Lingam ,  Seok-Jun Lee ,  Johann Zipperer ,  Manish Goel

    IPC: G06F15/80 ,  G06F9/30 ,  G06F9/32 ,  G06F9/38

    Abstract: Methods and apparatus for a low energy accelerator processor architecture with short parallel instruction word. An integrated circuit includes a system bus having a data width N, where N is a positive integer; a central processor unit coupled to the system bus and configured to execute instructions retrieved from a memory coupled to the system bus; and a low energy accelerator processor coupled to the system bus and configured to execute instruction words retrieved from a low energy accelerator code memory, the low energy accelerator processor having a plurality of execution units including a load store unit, a load coefficient unit, a multiply unit, and a butterfly/adder ALU unit, each of the execution units configured to perform operations responsive to op-codes decoded from the retrieved instruction words, wherein the width of the instruction words is equal to the data width N. Additional methods and apparatus are disclosed.

    NETWORK COMMUNICATION SYSTEM WITH NODE ENERGY REDUCTION PACKET PROTOCOL
    17.
    发明申请
    NETWORK COMMUNICATION SYSTEM WITH NODE ENERGY REDUCTION PACKET PROTOCOL 审中-公开

    公开(公告)号：US20200374227A1

    公开(公告)日：2020-11-26

    申请号：US16899757

    申请日：2020-06-12

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Tarkesh Pande ,  Srinivas Lingam

    IPC: H04L12/721 ,  H04L12/26 ,  H04L12/741 ,  H04L12/833

    Abstract: A method of communicating a packet between a first node and a second node, the packet comprising a data payload and a portion of information preceding the data payload. The method comprises: (i) first, identifying a quality of a channel between the first node and the second node; (ii) second, in response to the quality of the channel, selecting a manner of communication of the information preceding the data payload; (iii) third, encoding the selected manner of communication in the portion of information preceding data payload; and (iv) fourth, transmitting the packet from the first node to the second node.

    Low energy accelerator processor architecture
    18.
    发明授权
    Low energy accelerator processor architecture 有权

    公开(公告)号：US10241791B2

    公开(公告)日：2019-03-26

    申请号：US15925957

    申请日：2018-03-20

    Applicant: Texas Instruments Incorporated

    Inventor： Srinivas Lingam ,  Seok-Jun Lee ,  Johann Zipperer ,  Manish Goel

    IPC: G06F9/30 ,  G06F13/16 ,  G06F13/40 ,  G06F9/38

    Abstract: An apparatus for a low energy accelerator processor architecture is disclosed. An example arrangement is an integrated circuit that includes a system bus having a data width N, where N is a positive integer; a central processor unit coupled to the system bus and configured to execute instructions retrieved from a memory; a low energy accelerator processor configured to execute instruction words received on the system bus and having a plurality of execution units including a load store unit, a load coefficient unit, a multiply unit, and a butterfly/adder ALU unit, wherein each of the execution units is configured to perform operations responsive to retrieved instruction words; and a data register file comprising a set of data registers coupled to the plurality of execution units, wherein the registers are coupled to selected ones of the plurality of execution units. Additional methods and apparatus are disclosed.

Patent Agency Ranking