公开(公告)号：US10936000B1

公开(公告)日：2021-03-02

申请号：US16552739

申请日：2019-08-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Ryan Hanschke ,  Filippo Marino ,  Sunglyong Kim ,  Tobin Daniel Hagan ,  Richard Lee Valley ,  Bharath Balaji Kannan ,  Salvatore Giombanco ,  Seetharaman Sridhar

IPC: G05F1/10 ,  G05F3/02 ,  G05F1/575 ,  G05F1/565

Abstract: In an example, a circuit includes a first power switch device coupled between a voltage input and an output terminal, the first power switch device having a control input. A voltage divider circuit includes a first resistor and a second resistor. The first resistor is coupled between the voltage input and a sense node between the first resistor and the second resistor. The second resistor has a first terminal coupled to the sense node and a second terminal. A second switch device is coupled between the second terminal of the second resistor and an electrical ground terminal. A voltage clamp is coupled between the sense node and the electrical ground terminal.

公开(公告)号：US10896904B2

公开(公告)日：2021-01-19

申请号：US16677044

申请日：2019-11-07

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  David LaFonteese ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L29/732 ,  H01L29/40

Abstract: An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a bipolar transistor structure interfacing with a PN junction of a high voltage device, which is configured to discharge the ESD current during an ESD event. The bipolar transistor structure has a collector region overlapping the PN junction, a base region embedded with sufficient pinch resistance to launch the snapback protection, and an emitter region for discharging the ESD current.

公开(公告)号：US20190198666A1

公开(公告)日：2019-06-27

申请号：US15850854

申请日：2017-12-21

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/06 ,  H01L29/49 ,  H01L29/66 ,  H01L21/761 ,  H01L21/28 ,  H03K17/687

Abstract: A lateral junction diode device includes a substrate having at least a semiconductor surface layer. A depletion-mode LDMOS device is in the semiconductor surface layer including a source, drain, and a gate above a gate dielectric, and a channel region under the gate on the gate dielectric. A drift region is between the channel region and the drain, wherein the drain also provides a cathode for the lateral junction diode device. An embedded diode includes a second cathode and an anode that is shared with the device. The embedded diode is junction isolated by an isolation region located between the anode and the source. The anode and isolation region are directly connected to the gate and the second cathode is directly connected to the source.

公开(公告)号：US20230395589A1

公开(公告)日：2023-12-07

申请号：US18451292

申请日：2023-08-17

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  David LaFonteese ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L27/0259 ,  H01L29/1095 ,  H01L29/7818 ,  H01L29/0878 ,  H01L29/7816 ,  H01L29/0882 ,  H01L29/0619

Abstract: An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a bipolar transistor structure interfacing with a PN junction of a high voltage device, which is configured to discharge the ESD current during an ESD event. The bipolar transistor structure has a collector region overlapping the PN junction, a base region embedded with sufficient pinch resistance to launch the snapback protection, and an emitter region for discharging the ESD current.

公开(公告)号：US11322594B2

公开(公告)日：2022-05-03

申请号：US17134706

申请日：2020-12-28

Applicant: Texas Instruments Incorporated

Inventor： Fei Ma ,  Ya ping Chen ,  Yunlong Liu ,  Hong Yang ,  Shengpin Yang ,  Baoqiang Niu ,  Rui Liu ,  Zhi Peng Feng ,  Seetharaman Sridhar ,  Sunglyong Kim

IPC: H01L29/40 ,  H01L29/78 ,  H01L29/66 ,  H01L21/765 ,  H01L29/423 ,  H01L27/24 ,  H01L21/8234

Abstract: A semiconductor device, and methods of forming the same. In one example, the semiconductor device includes a trench in a substrate having a top surface, and a shield within the trench. The semiconductor device also includes a shield liner between a sidewall of the trench and the shield, and a lateral insulator over the shield contacting the shield liner. The semiconductor device also includes a gate dielectric layer on an exposed sidewall of the trench between the lateral insulator and the top surface. The lateral insulator may have a minimum thickness at least two times thicker than a maximum thickness of the gate dielectric layer.

公开(公告)号：US20200219872A1

公开(公告)日：2020-07-09

申请号：US16240356

申请日：2019-01-04

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  Richard Lee Valley ,  Tobin Daniel Hagan ,  Michael Ryan Hanschke ,  Seetharaman Sridhar

IPC: H01L27/07 ,  H01L49/02 ,  H01L29/78 ,  H01L29/16 ,  H01L21/8238

Abstract: Described examples include a semiconductor device having a resistor. The resistor includes a first terminal and a second terminal. The resistor also includes a first resistive element over an insulating layer over a substrate having a first end coupled to the first terminal of the resistor and a second end coupled to the second terminal of the resistor; and a parallel second resistive element over the insulating layer over the substrate having a first end coupled to the first terminal of the resistor and a second end coupled to the second terminal of the resistor. The resistor may also be coupled in series with another resistor.

公开(公告)号：US20190279976A1

公开(公告)日：2019-09-12

申请号：US16423754

申请日：2019-05-28

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  David LaFonteese ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/78 ,  H01L29/10

Abstract: An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a bipolar transistor structure interfacing with a PN junction of a high voltage device, which is configured to discharge the ESD current during an ESD event. The bipolar transistor structure has a collector region overlapping the PN junction, a base region embedded with sufficient pinch resistance to launch the snapback protection, and an emitter region for discharging the ESD current.

公开(公告)号：US20190123555A1

公开(公告)日：2019-04-25

申请号：US15790780

申请日：2017-10-23

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  Seetharaman Sridhar ,  Sameer Pendharkar ,  David LaFonteese

IPC: H02H9/04 ,  H01L27/02 ,  H01L23/528

Abstract: An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a p-channel device and an n-channel device. The p-channel device includes an n-type barrier region circumscribing a p-type drain region with an n-type body region. The p-channel device may be positioned adjacent to the n-channel device and a high voltage junction diode.

公开(公告)号：US20180102357A1

公开(公告)日：2018-04-12

申请号：US15291564

申请日：2016-10-12

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  David LaFonteese ,  Seetharaman Sridhar ,  Sameer Pendharkar

IPC: H01L27/02 ,  H01L29/78 ,  H01L29/10

CPC classification number: H01L27/0259 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/7818

Abstract: An electrostatic discharge (ESD) protection structure that provides snapback protections to one or more high voltage circuit components. The ESD protection structure can be integrated along a peripheral region of a high voltage circuit, such as a high side gate driver of a driver circuit. The ESD protection structure includes a bipolar transistor structure interfacing with a PN junction of a high voltage device, which is configured to discharge the ESD current during an ESD event. The bipolar transistor structure has a collector region overlapping the PN junction, a base region embedded with sufficient pinch resistance to launch the snapback protection, and an emitter region for discharging the ESD current.

公开(公告)号：US20250048721A1

公开(公告)日：2025-02-06

申请号：US18228385

申请日：2023-07-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eung Jung Kim ,  Thomas Grebs ,  Sunglyong Kim ,  Sungho Beck ,  Wei Fu ,  Xiaochun Zhao ,  Arjun Pankaj

IPC: H01L29/78 ,  H01L27/06 ,  H01L27/092 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/786

Abstract: Described examples include an integrated circuit having first and second transistors. The first transistor includes a plurality of trenches extending into a semiconductor substrate and a plurality of source regions, each source region located between a pair of adjacent trenches. A first source terminal is connected to the plurality of source regions. The second transistor includes a central source region between a pair of the trenches and a second source terminal connected to the central source region. The second source terminal is conductively isolated from the first source terminal.