Abstract:
An integrated circuit (IC) comprises an output and a voltage regulator. The voltage regulator comprises an amplifier having a first input coupled to a reference voltage source and a second input coupled to the output, a first resistor coupled to the output and coupled to a ground terminal, a metal oxide semiconductor field effect transistor (MOSFET) having a gate coupled to an output of the amplifier and a drain coupled to the output, and a second resistor coupled to a source of the MOSFET and coupled to the ground terminal.
Abstract:
Disclosed examples include ICs and general-purpose I/O circuitry to facilitate interfacing of the IC with a variety of external circuits operating at different supply voltages, in which an integer number N supply drive circuits are individually coupled with a corresponding supply voltage node and selectively connect the corresponding supply voltage node to a general-purpose output node based on a supply drive control signal to allow programmable interfacing of individual general-purpose output pads or pins of the IC with an external circuit at the appropriate signal level.
Abstract:
An apparatus comprises a transmitter circuit having first and second transmit outputs; a rectifier circuit having first and second rectifier inputs and first and second rectifier outputs; an isolation circuit coupled between the first transmit output and the first rectifier input, and between the second transmit output and the second rectifier input; a detector circuit coupled to the rectifier circuit; and a driver circuit having a power terminal, a reference terminal, a driver input, and a driver output, the power terminal coupled to the first rectifier output, the reference terminal coupled to the second rectifier output, and the driver input coupled to an output of the detector circuit.
Abstract:
An electronic device has a first circuit, a second circuit, and an isolation circuit, the isolation circuit having an input and an output, the first circuit including a signal generator having an output, the output of the signal generator coupled to the input of the isolation circuit. The second circuit includes a rectifier circuit and a signal detector circuit, the rectifier circuit having a rectifier input coupled to the output of the isolation circuit, and the signal detector circuit having an input coupled to the output of the isolation circuit.
Abstract:
An integrated circuit (IC) comprises an output and a voltage regulator. The voltage regulator comprises an amplifier having a first input coupled to a reference voltage source and a second input coupled to the output, a first resistor coupled to the output and coupled to a ground terminal, a metal oxide semiconductor field effect transistor (MOSFET) having a gate coupled to an output of the amplifier and a drain coupled to the output, and a second resistor coupled to a source of the MOSFET and coupled to the ground terminal.
Abstract:
Protection circuits, USB interface integrated circuits, and methods for protecting host circuitry from USB port pin overvoltages, in which a switch is connected between a USB port pin and a middle node, and a detection circuit compares the middle node voltage with a reference voltage. A control circuit turns off the switch and turns on a clamp circuit to conduct pull down current from the middle node in response to the middle node voltage exceeding the reference voltage to mitigate overvoltage conditions on a host pin coupled to the middle node. When the middle node voltage falls below the reference voltage, the control circuit delays for a predetermined time and then turns off the clamp circuit and turns on the switch.
Abstract:
A circuit that operates as a low-power ideal diode is disclosed, as well as an IC chip that contains the ideal diode circuit. The circuit includes a first P-channel transistor connected to receive an input voltage on a first terminal and to provide an output voltage on a second terminal, a first amplifier connected to receive the input voltage and the output voltage and to provide a first signal that dynamically biases a gate of the first P-channel transistor as a function of the voltage across the first P-channel transistor, and a second amplifier connected to receive the input voltage and the output voltage and to provide a second signal that acts to turn off the gate of the first P-channel transistor responsive to the input voltage being less than the output voltage.
Abstract:
A circuit and method for providing a current limiting feature in a low dropout (“LDO”) linear voltage regulator. A pass element generates an output voltage that is less than the input voltage. The pass element is normally enabled by an error amplifier that compares a feedback signal from the output of the pass element with a reference signal. However, the pass element may be enabled by a current limiting circuit that bypasses the error amplifier to limit the current generated at the output of the pass element.
Abstract:
A display panel includes multiple pixel elements for composing an image and a control circuit for accessing each pixel element. The control circuit includes a data line for conducting a luminance signal and a selection line for conducting a selection signal. Each pixel element includes a switch, a display cell, and a compensatory capacitor. The switch is connected to the data line and the selection line, such that the switch can selectively deliver the luminance signal to the display cell. The display cell is configured to adjust its light transmittance in response to the received luminance signal. Being connected to the switch and the display cell, the compensatory capacitor is configured to receive a compensation signal corresponding to a transition of the selection signal and for correcting a parasitic effect at the display cell.
Abstract:
The present disclosure generally relates to a semiconductor device having a slanted field plate. In an example, a semiconductor device includes a semiconductor substrate, a gate, a drain contact, a source contact, and a field plate. The gate is on a surface of the semiconductor substrate. The drain contact and a source contact are on the semiconductor substrate. The field plate is over the surface of the semiconductor substrate and extends from one side of the gate towards the drain contact. The field plate includes multiple field plate portions. Each of the multiple field plate portions has a uniform respective slope with respect to the surface, and the multiple field plate portions have different slopes.