Multi-supply output circuit
    12.
    发明授权

    公开(公告)号:US09762242B2

    公开(公告)日:2017-09-12

    申请号:US14969451

    申请日:2015-12-15

    CPC classification number: H03K19/017509 H03K3/356104

    Abstract: Disclosed examples include ICs and general-purpose I/O circuitry to facilitate interfacing of the IC with a variety of external circuits operating at different supply voltages, in which an integer number N supply drive circuits are individually coupled with a corresponding supply voltage node and selectively connect the corresponding supply voltage node to a general-purpose output node based on a supply drive control signal to allow programmable interfacing of individual general-purpose output pads or pins of the IC with an external circuit at the appropriate signal level.

    RECTIFIER WITH SIGNAL RECONSTRUCTION
    13.
    发明公开

    公开(公告)号:US20240283354A1

    公开(公告)日:2024-08-22

    申请号:US18653082

    申请日:2024-05-02

    CPC classification number: H02M1/44 H02M7/217 H03K5/24

    Abstract: An apparatus comprises a transmitter circuit having first and second transmit outputs; a rectifier circuit having first and second rectifier inputs and first and second rectifier outputs; an isolation circuit coupled between the first transmit output and the first rectifier input, and between the second transmit output and the second rectifier input; a detector circuit coupled to the rectifier circuit; and a driver circuit having a power terminal, a reference terminal, a driver input, and a driver output, the power terminal coupled to the first rectifier output, the reference terminal coupled to the second rectifier output, and the driver input coupled to an output of the detector circuit.

    Overvoltage protection circuit for USB interface

    公开(公告)号:US10148084B2

    公开(公告)日:2018-12-04

    申请号:US14969026

    申请日:2015-12-15

    Abstract: Protection circuits, USB interface integrated circuits, and methods for protecting host circuitry from USB port pin overvoltages, in which a switch is connected between a USB port pin and a middle node, and a detection circuit compares the middle node voltage with a reference voltage. A control circuit turns off the switch and turns on a clamp circuit to conduct pull down current from the middle node in response to the middle node voltage exceeding the reference voltage to mitigate overvoltage conditions on a host pin coupled to the middle node. When the middle node voltage falls below the reference voltage, the control circuit delays for a predetermined time and then turns off the clamp circuit and turns on the switch.

    Low power ideal diode control circuit

    公开(公告)号:US09696738B2

    公开(公告)日:2017-07-04

    申请号:US14978532

    申请日:2015-12-22

    CPC classification number: G05F1/575

    Abstract: A circuit that operates as a low-power ideal diode is disclosed, as well as an IC chip that contains the ideal diode circuit. The circuit includes a first P-channel transistor connected to receive an input voltage on a first terminal and to provide an output voltage on a second terminal, a first amplifier connected to receive the input voltage and the output voltage and to provide a first signal that dynamically biases a gate of the first P-channel transistor as a function of the voltage across the first P-channel transistor, and a second amplifier connected to receive the input voltage and the output voltage and to provide a second signal that acts to turn off the gate of the first P-channel transistor responsive to the input voltage being less than the output voltage.

    LDO current limit control with sense and control transistors
    18.
    发明授权
    LDO current limit control with sense and control transistors 有权
    LDO电流限制控制带有感应和控制晶体管

    公开(公告)号:US09535439B2

    公开(公告)日:2017-01-03

    申请号:US14446563

    申请日:2014-07-30

    CPC classification number: G05F1/575 G05F1/10 G05F1/56

    Abstract: A circuit and method for providing a current limiting feature in a low dropout (“LDO”) linear voltage regulator. A pass element generates an output voltage that is less than the input voltage. The pass element is normally enabled by an error amplifier that compares a feedback signal from the output of the pass element with a reference signal. However, the pass element may be enabled by a current limiting circuit that bypasses the error amplifier to limit the current generated at the output of the pass element.

    Abstract translation: 一种用于在低压差(“LDO”)线性稳压器中提供限流特性的电路和方法。 传递元件产生小于输入电压的输出电压。 通过元件通常由误差放大器使能,该误差放大器将来自通过元件的输出的反馈信号与参考信号进行比较。 然而,通过元件可以通过旁路误差放大器的限流电路使能,以限制在通过元件的输出处产生的电流。

    SYSTEMS AND METHODS FOR COMPENSATING PARASITIC COUPLINGS IN DISPLAY PANELS
    19.
    发明申请
    SYSTEMS AND METHODS FOR COMPENSATING PARASITIC COUPLINGS IN DISPLAY PANELS 审中-公开
    用于补偿显示面板中的PARASITIC耦合的系统和方法

    公开(公告)号:US20160035287A1

    公开(公告)日:2016-02-04

    申请号:US14812463

    申请日:2015-07-29

    CPC classification number: G09G3/3611 G09G2300/0852 G09G2300/0876

    Abstract: A display panel includes multiple pixel elements for composing an image and a control circuit for accessing each pixel element. The control circuit includes a data line for conducting a luminance signal and a selection line for conducting a selection signal. Each pixel element includes a switch, a display cell, and a compensatory capacitor. The switch is connected to the data line and the selection line, such that the switch can selectively deliver the luminance signal to the display cell. The display cell is configured to adjust its light transmittance in response to the received luminance signal. Being connected to the switch and the display cell, the compensatory capacitor is configured to receive a compensation signal corresponding to a transition of the selection signal and for correcting a parasitic effect at the display cell.

    Abstract translation: 显示面板包括用于构成图像的多个像素元件和用于访问每个像素元件的控制电路。 控制电路包括用于进行亮度信号的数据线和用于进行选择信号的选择线。 每个像素元件包括开关,显示单元和补偿电容器。 开关连接到数据线和选择线,使得开关可以选择性地将亮度信号传递到显示单元。 显示单元被配置为响应于接收的亮度信号来调节其透光率。 连接到开关和显示单元,补偿电容器被配置为接收与选择信号的转变相对应的补偿信号,并用于校正显示单元的寄生效应。

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