-
公开(公告)号:US10720399B2
公开(公告)日:2020-07-21
申请号:US16171335
申请日:2018-10-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Fang-Yu Liang , Ching-Feng Yang , Kai-Chiang Wu
IPC: H01L21/311 , H01L23/66 , H01L23/00 , H01L23/538 , H01L23/552 , H01L23/31 , H01L25/16 , H01L21/56 , H01L21/683 , H01L21/3205 , H01L21/3105 , H01L21/288 , H01L21/321 , H01L21/48 , H01Q1/40
Abstract: A semiconductor package includes an encapsulated semiconductor device, a first redistribution structure, an insulating layer, and an antenna. The encapsulated semiconductor device includes a semiconductor device encapsulated by an encapsulation material. The redistribution structure is disposed on a first side the encapsulated semiconductor device and electrically connected to the semiconductor device. The insulating layer is disposed on a second side of the encapsulated semiconductor device and comprises a groove pattern. The antenna is filled the groove pattern, wherein an upper surface of the antenna is substantially coplanar with an upper surface of the insulating layer.
-
公开(公告)号:US11373922B2
公开(公告)日:2022-06-28
申请号:US16993285
申请日:2020-08-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Sen-Kuei Hsu , Ching-Feng Yang , Hsin-Yu Pan , Kai-Chiang Wu , Yi-Che Chiang
IPC: H01L23/52 , H01L23/367 , H01L23/00 , H01L21/768 , H01L23/522 , H01L23/538
Abstract: A semiconductor package includes a die, a dummy die, a plurality of conductive terminals, an insulating layer and a plurality of thermal through vias. The dummy die is disposed aside the die. The conductive terminals are disposed at a first side of the dummy die and the die and electrically connected to the dummy die and the die. The insulating layer is disposed at a second side opposite to the first side of the dummy die and the die. The thermal through vias penetrating through the insulating layer.
-
公开(公告)号:US11233019B2
公开(公告)日:2022-01-25
申请号:US16893422
申请日:2020-06-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Fang-Yu Liang , Ching-Feng Yang , Kai-Chiang Wu
IPC: H01L21/4763 , H01L23/66 , H01L23/00 , H01L23/538 , H01L23/552 , H01L23/31 , H01L25/16 , H01L21/56 , H01L21/683 , H01L21/3205 , H01L21/311 , H01L21/3105 , H01L21/288 , H01L21/321 , H01L21/48 , H01Q1/40
Abstract: A method including followings is provided. An encapsulated device including a semiconductor die and an insulating encapsulation laterally encapsulating the semiconductor die is provided. An insulating layer is formed over a surface of the encapsulated device. A groove pattern is formed on the insulating layer. A conductive paste is filled in the groove pattern and the conductive paste filled in the groove pattern is cured.
-
公开(公告)号:US20200135669A1
公开(公告)日:2020-04-30
申请号:US16171335
申请日:2018-10-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Fang-Yu Liang , Ching-Feng Yang , Kai-Chiang Wu
IPC: H01L23/66 , H01L23/31 , H01L23/00 , H01L23/538 , H01L23/552 , H01L25/16 , H01L21/56 , H01L21/683 , H01L21/3205 , H01L21/311 , H01L21/3105 , H01L21/288 , H01L21/321 , H01L21/48 , H01Q1/40
Abstract: A semiconductor package includes an encapsulated semiconductor device, a first redistribution structure, an insulating layer, and an antenna. The encapsulated semiconductor device includes a semiconductor device encapsulated by an encapsulation material. The redistribution structure is disposed on a first side the encapsulated semiconductor device and electrically connected to the semiconductor device. The insulating layer is disposed on a second side of the encapsulated semiconductor device and comprises a groove pattern. The antenna is filled the groove pattern, wherein an upper surface of the antenna is substantially coplanar with an upper surface of the insulating layer.
-
公开(公告)号:US20190287819A1
公开(公告)日:2019-09-19
申请号:US16429081
申请日:2019-06-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Nan-Chin Chuang , Ching-Feng Yang , Kai-Chiang Wu
IPC: H01L21/56 , H01L21/762 , H01L23/00 , H01L23/31 , H01L23/538
Abstract: An integrated fan-out package having a multi-band antenna and a method of forming the same are disclosed. An integrated fan-out package includes a semiconductor die, a molding layer and a plurality of through integrated fan-out vias. The molding layer is aside the semiconductor die. The through integrated fan-out vias are through the molding layer and arranged to form a plurality of dipole antennas. At least one of the plurality of dipole antennas includes two dipole arms each having a transmitting strip and a radiating strip connected to the transmitting part, and the radiating strip has a first part, a second part and a filter part between and in contact with the first part and the second part. The cross-sectional area of the filter part is less than the cross-sectional area of the first part or the second part of the radiating strip.
-
公开(公告)号:US10312112B2
公开(公告)日:2019-06-04
申请号:US15627457
申请日:2017-06-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Nan-Chin Chuang , Ching-Feng Yang , Kai-Chiang Wu
IPC: H01L23/31 , H01L21/76 , H01L21/56 , H01L23/538 , H01L23/00 , H01L21/762
Abstract: An integrated fan-out package having a multi-band antenna and a method of forming the same are disclosed. An integrated fan-out package includes a semiconductor die, a molding layer and a plurality of through integrated fan-out vias. The molding layer is aside the semiconductor die. The through integrated fan-out vias are through the molding layer and arranged to form a plurality of dipole antennas. At least one of the plurality of dipole antennas includes two dipole arms each having a transmitting strip and a radiating strip connected to the transmitting part, and the radiating strip has a first part, a second part and a filter part between and in contact with the first part and the second part. The cross-sectional area of the filter part is less than the cross-sectional area of the first part or the second part of the radiating strip.
-
公开(公告)号:US20240096848A1
公开(公告)日:2024-03-21
申请号:US18149806
申请日:2023-01-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Wei Wu , Ching-Feng Yang , Ying-Ching Shih , An-Jhih Su , Wen-Chih Chiou
IPC: H01L23/00 , H01L25/065
CPC classification number: H01L24/96 , H01L24/03 , H01L24/08 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/80 , H01L24/94 , H01L25/0652 , H01L2224/03614 , H01L2224/08145 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/80895 , H01L2224/80896 , H01L2224/94 , H01L2224/96 , H01L2924/1011 , H01L2924/182
Abstract: A method of manufacturing a semiconductor device includes forming a first bonding layer over a substrate of a first wafer, the first wafer including a first semiconductor die and a second semiconductor die, performing a first dicing process to form two grooves that extend through the first bonding layer, the two grooves being disposed between the first semiconductor die and the second semiconductor die, performing a second dicing process to form a trench that extends through the first bonding layer and partially through the substrate of the first wafer, where the trench is disposed between the two grooves, and thinning a backside of the substrate of the first wafer until the first semiconductor die is singulated from the second semiconductor die.
-
公开(公告)号:US10748831B2
公开(公告)日:2020-08-18
申请号:US15992196
申请日:2018-05-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Sen-Kuei Hsu , Ching-Feng Yang , Hsin-Yu Pan , Kai-Chiang Wu , Yi-Che Chiang
IPC: H01L23/36 , H01L23/52 , H01L23/538 , H01L23/367 , H01L23/00 , H01L21/768 , H01L23/522
Abstract: Semiconductor packages and methods of forming the same are provided. One of the semiconductor package includes a first die, a dummy die, a first redistribution layer structure, an insulating layer and an insulating layer. The dummy die is disposed aside the first die. The first redistribution layer structure is electrically connected to the first die and having connectors thereover. The insulating layer is disposed over the first die and the dummy die and opposite to the first redistribution layer structure. The insulating layer penetrates through the insulating layer.
-
公开(公告)号:US20190371694A1
公开(公告)日:2019-12-05
申请号:US15992196
申请日:2018-05-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Sen-Kuei Hsu , Ching-Feng Yang , Hsin-Yu Pan , Kai-Chiang Wu , Yi-Che Chiang
IPC: H01L23/367 , H01L23/00 , H01L21/768 , H01L23/522 , H01L23/538
Abstract: Semiconductor packages and methods of forming the same are provided. One of the semiconductor package includes a first die, a dummy die, a first redistribution layer structure, an insulating layer and an insulating layer. The dummy die is disposed aside the first die. The first redistribution layer structure is electrically connected to the first die and having connectors thereover. The insulating layer is disposed over the first die and the dummy die and opposite to the first redistribution layer structure. The insulating layer penetrates through the insulating layer.
-
公开(公告)号:US20180366347A1
公开(公告)日:2018-12-20
申请号:US15627457
申请日:2017-06-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Nan-Chin Chuang , Ching-Feng Yang , Kai-Chiang Wu
IPC: H01L21/56 , H01L23/31 , H01L23/538 , H01L23/00 , H01L21/762
CPC classification number: H01L21/561 , H01L21/762 , H01L21/76254 , H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/20
Abstract: An integrated fan-out package having a multi-band antenna and a method of forming the same are disclosed. An integrated fan-out package includes a semiconductor die, a molding layer and a plurality of through integrated fan-out vias. The molding layer is aside the semiconductor die. The through integrated fan-out vias are through the molding layer and arranged to form a plurality of dipole antennas. At least one of the plurality of dipole antennas includes two dipole arms each having a transmitting strip and a radiating strip connected to the transmitting part, and the radiating strip has a first part, a second part and a filter part between and in contact with the first part and the second part. The cross-sectional area of the filter part is less than the cross-sectional area of the first part or the second part of the radiating strip.
-
-
-
-
-
-
-
-
-