公开(公告)号：US20080083560A1

公开(公告)日：2008-04-10

申请号：US11865919

申请日：2007-10-02

申请人： Hajime Saiki ,  Mikiya Sakurai ,  Atsuhiko Sugimoto

发明人： Hajime Saiki ,  Mikiya Sakurai ,  Atsuhiko Sugimoto

IPC分类号： H05K1/03

CPC分类号： H05K1/115 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0366 ,  H05K1/0373 ,  H05K3/4602 ,  H05K2201/0209 ,  H05K2201/068 ,  H05K2201/09481 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09627 ,  H05K2201/09709 ,  H05K2203/0733 ,  H01L2924/00

摘要： A wiring board having a favorable electrical reliability and in which a crack is unlikely to occur at a connection interface of via conductors even though the number of via conductors in series, which constitutes the stacked via, becomes larger than that of a conventional wiring board.

摘要翻译： 即使构成堆叠通孔的串联的通孔导体的数量变得比常规的布线板大，因此具有良好的电气可靠性并且在通孔导体的连接界面处不可能发生裂纹的布线板。

公开(公告)号：US20050102831A1

公开(公告)日：2005-05-19

申请号：US10989516

申请日：2004-11-17

申请人： Hajime Saiki ,  Atsuhiko Sugimoto

发明人： Hajime Saiki ,  Atsuhiko Sugimoto

IPC分类号： H05K3/38 ,  H05K3/46 ,  H05K3/02 ,  C25F3/00

CPC分类号： H05K3/4661 ,  H05K3/381 ,  H05K2201/0209 ,  H05K2203/0796 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A process for manufacturing a wiring substrate, comprising a roughening step of roughening surfaces of insulating resin layers, at least one of the insulating resin layers containing an epoxy resin which contains 30 to 50 wt. % of an inorganic filler of SiO2 having an average grain diameter of 1.0 to 10.0 μm, wherein the roughening step includes a roughening step of dipping in a solution of permanganic acid at 70 to 85° C. for 20 minutes or longer.

摘要翻译： 一种制造布线基板的方法，包括使绝缘树脂层的表面粗糙化的粗糙化步骤，至少一个含有环氧树脂的绝缘树脂层，其含有30〜50重量％ ％的平均粒径为1.0〜10.0μm的SiO 2的无机填料，其中，所述粗糙化工序包括将高锰酸溶液在70〜85℃下浸渍的粗糙化工序， 20分钟以上

公开(公告)号：US20050253263A1

公开(公告)日：2005-11-17

申请号：US11071203

申请日：2005-03-04

申请人： Atsuhiko Sugimoto ,  Hajime Saiki

发明人： Atsuhiko Sugimoto ,  Hajime Saiki

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L23/48 ,  H01L23/498 ,  H05K1/11 ,  H05K3/10 ,  H05K3/24 ,  H05K3/34

CPC分类号： H05K3/244 ,  H01L21/4846 ,  H01L23/498 ,  H01L23/49816 ,  H01L2924/0002 ,  H05K3/3457 ,  H01L2924/00

摘要： A wiring substrate incorporating nickel-plated copper terminal pads for solder bumps, wherein a nickel plating layer constituting the nickel plated copper terminal pads has a phosphorus content of 8.5 to 15.0% by mass and is covered with a gold plating layer.

摘要翻译： 包括用于焊料凸块的镀镍铜端子焊盘的布线基板，其中构成镀镍铜端子焊盘的镀镍层的磷含量为8.5〜15.0质量％，被镀金层覆盖。

公开(公告)号：US20050106854A1

公开(公告)日：2005-05-19

申请号：US10989515

申请日：2004-11-17

申请人： Hajime Saiki ,  Atsuhiko Sugimoto ,  Mikiya Sakurai

发明人： Hajime Saiki ,  Atsuhiko Sugimoto ,  Mikiya Sakurai

IPC分类号： H05K3/18 ,  H05K3/10 ,  H05K3/46 ,  H05K1/11 ,  H01L21/4763 ,  H01R12/04

CPC分类号： H05K3/4661 ,  H05K3/108 ,  H05K3/181 ,  H05K3/4602 ,  H05K2201/0209

摘要： A process for manufacturing a wiring substrate, comprising: a step of forming an insulating resin layer containing an inorganic filler over a wiring layer formed on at least one surface of an insulating substrate; a step of forming a thin copper film layer by roughening a surface of the insulating resin layer and plating the same electrolessly with copper; a step of forming an insulating film over the thin copper film layer; a step of forming plated resists profiling a pattern by exposing and developing the insulating film with the pattern; and a step of forming wiring pattern layers by an electrolytic copper plating on a surface of the insulating resin layer having the plated resists formed thereon, wherein at least one of the plated resists has a width of less than 20 μm, and -the plated resists include adjoining plated resists in which a clearance between said adjoining plated resists has a width of less than 20 μm.

摘要翻译： 一种布线基板的制造方法，包括：在绝缘基板的至少一个面上形成的布线层上形成含有无机填料的绝缘树脂层的工序; 通过使绝缘树脂层的表面粗糙化并用铜电化而使其形成薄铜膜层的步骤; 在所述薄铜膜层上形成绝缘膜的步骤; 通过利用图案曝光和显影绝缘膜来形成电镀抗蚀剂成型图案的步骤; 以及在其上形成有电镀抗蚀剂的绝缘树脂层的表面上通过电解铜电镀形成布线图案层的步骤，其中至少一个电镀抗蚀剂具有小于20μm的宽度，并且电镀抗蚀剂 包括邻接的电镀抗蚀剂，其中所述邻接的电镀抗蚀剂之间的间隙具有小于20μm的宽度。