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    SYSTEMS, METHODS AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TESTING
    14.
    发明申请
    SYSTEMS, METHODS AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TESTING 有权

    公开(公告)号：US20210405108A1

    公开(公告)日：2021-12-30

    申请号：US17470424

    申请日：2021-09-09

    Applicant: Tektronix, Inc.

    Inventor： Sam J. Strickling ,  Daniel S. Froelich ,  Michelle L. Baldwin ,  Jonathan San ,  Lin-Yung Chen

    IPC: G01R31/28

    Abstract: Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link with a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.

    INDIRECT ACQUISITION OF A SIGNAL FROM A DEVICE UNDER TEST
    15.
    发明申请
    INDIRECT ACQUISITION OF A SIGNAL FROM A DEVICE UNDER TEST 有权

    公开(公告)号：US20210148975A1

    公开(公告)日：2021-05-20

    申请号：US17098155

    申请日：2020-11-13

    Applicant: Tektronix, Inc.

    Inventor： Sam J. Strickling ,  David Everett Burgess

    IPC: G01R31/3177 ,  G06F30/32 ,  G05B19/042

    Abstract: A system for acquiring a test-and-measurement signal from a device under test (DUT) including a test-and-measurement probe, a user interface, a robot, and a controller. The probe is configured to acquire an electronic signal from the DUT. The user interface displays a digital representation of a physical electronic circuit of the DUT, including portrayals of virtual nodes that correspond to actual nodes on the DUT. The robot is configured to automatically position the probe with respect to the DUT. The controller is configured to receive from the user interface an electronic indication of a selected node of the digital representation of the physical electronic circuit, where the selected node is one of the virtual nodes. The controller is further configured to provide instructions to the robot to automatically position the probe to a position on the physical electronic circuit corresponding to the actual node.

    Test and measurement system for analyzing devices under test
    16.
    发明授权
    Test and measurement system for analyzing devices under test 有权

    公开(公告)号：US12216558B2

    公开(公告)日：2025-02-04

    申请号：US18467597

    申请日：2023-09-14

    Applicant: Tektronix, Inc.

    Inventor： Sam J. Strickling ,  Daniel S. Froelich ,  Michelle L. Baldwin ,  Jonathan San ,  Lin-Yung Chen

    IPC: G06F11/26 ,  G06F11/24

    Abstract: A test and measurement system has a test and measurement instrument having an adaptor with an interface configured to communicate through one or more communications links with a new device under test to receive new test results, a memory configured to store a database of test results and a database of analyzed test results related to tests performed with one or more prior devices under test, a data analyzer connected to the test and measurement instrument through the one or more communications link, the data analyzer configured to analyze the new test results based on the stored test results, and a health score generator configured to generate a health score for the new device under test based on the analysis from the data analyzer.

    Indirect acquisition of a signal from a device under test
    17.
    发明授权
    Indirect acquisition of a signal from a device under test 有权

    公开(公告)号：US12135353B2

    公开(公告)日：2024-11-05

    申请号：US17098155

    申请日：2020-11-13

    Applicant: Tektronix, Inc.

    Inventor： Sam J. Strickling ,  David Everett Burgess

    IPC: G01R31/3177 ,  G01R31/28 ,  G05B19/042 ,  G06F30/32 ,  G06F3/0484

    Abstract: A system for acquiring a test-and-measurement signal from a device under test (DUT) including a test-and-measurement probe, a user interface, a robot, and a controller. The probe is configured to acquire an electronic signal from the DUT. The user interface displays a digital representation of a physical electronic circuit of the DUT, including portrayals of virtual nodes that correspond to actual nodes on the DUT. The robot is configured to automatically position the probe with respect to the DUT. The controller is configured to receive from the user interface an electronic indication of a selected node of the digital representation of the physical electronic circuit, where the selected node is one of the virtual nodes. The controller is further configured to provide instructions to the robot to automatically position the probe to a position on the physical electronic circuit corresponding to the actual node.

    SYSTEMS, METHODS, AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TESTING
    19.
    发明申请
    SYSTEMS, METHODS, AND DEVICES FOR HIGH-SPEED INPUT/OUTPUT MARGIN TESTING 有权

    公开(公告)号：US20220163587A1

    公开(公告)日：2022-05-26

    申请号：US17534404

    申请日：2021-11-23

    Applicant: Tektronix, Inc.

    Inventor： Daniel S. Froelich ,  Sam J. Strickling

    IPC: G01R31/317 ,  G06F30/367

    Abstract: A system for data creation, storage, analysis, and training while margin testing includes a margin test generator coupled through an interface to a Device Under Test (DUT). The margin test generator is structured to modify test signals for testing the DUT during one or more testing states of a test session to create testing results. The testing results are stored in a data repository along with a DUT identifier of the DUT tested during the test session. A comparator determine whether any results of the DUT test results match a predictive outcome that is based from an analysis of previous DUT tests. If so, a message generator produces an indication that the tested DUT matched the predictive outcome.

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