公开(公告)号：US4584669A

公开(公告)日：1986-04-22

申请号：US584033

申请日：1984-02-27

Applicant: Martin D. Moynihan ,  Thomas A. Williams

Inventor： Martin D. Moynihan ,  Thomas A. Williams

IPC: G11C11/417 ,  G11C7/20 ,  G11C11/41 ,  G11C11/412 ,  G11C17/00 ,  G11C5/06 ,  G11C11/40

CPC classification number: G11C7/20

Abstract: A CMOS circuit is disclosed which has a latent image feature for application in FET memory arrays for writable read only storage applications. A four device cross-coupled CMOS circuit is formed with minimum real estate area, so as to allow for wiring level programming into a preconditioned binary one or zero state. The preconditioned circuit will assume a preselected binary state when power is turned on. Thereafter, the circuit can be accessed for normal binary one and zero selective storage without a significant diminution in its operating characteristics, when compared with conventional CMOS cross-coupled storage circuits.

Abstract translation: 公开了一种CMOS电路，其具有用于可写入只读存储应用的FET存储器阵列中的潜像特征。 形成四个器件交叉耦合CMOS电路，具有最小的房地产面积，以便允许布线级编程为预处理的二进制1或零状态。 当电源打开时，预处理电路将采用预选的二进制状态。 此后，与传统的CMOS交叉耦合存储电路相比，该电路可以访问正常的二进制1和零选择性存储，而不显着降低其工作特性。

公开(公告)号：USD257903S

公开(公告)日：1981-01-13

申请号：US879681

申请日：1978-02-21

Applicant: Alfred O. Scholze ,  Thomas A. Williams

Designer： Alfred O. Scholze ,  Thomas A. Williams

公开(公告)号：US4239640A

公开(公告)日：1980-12-16

申请号：US847379

申请日：1977-10-31

Applicant: Thomas A. Williams ,  Douglas E. Mather

Inventor： Thomas A. Williams ,  Douglas E. Mather

IPC: C11D1/72 ,  C11D11/00 ,  C11D7/54

CPC classification number: C11D11/0082 ,  C11D1/72

Abstract: In the manufacture of detergent powders containing alkoxylated alcohols, the problem arises that the alcohols cannot be spray-dried with the rest of the constituents. The invention provides a method of incorporating the alcohols into the spray-dried powder in such a way that staining of the packages does not occur. This is done by adding the alcohols in the form of a solution which combines with the residual water in the powder to form a gel.

Abstract translation: 在制造含有烷氧基化醇的洗涤剂粉末时，产生的醇不能与其它组分一起喷雾干燥。 本发明提供了将醇引入喷雾干燥粉末中的方法，使得不会发生包装的染色。 这是通过加入与粉末中的残留水结合以形成凝胶的溶液形式的醇来进行的。

公开(公告)号：USD486956S1

公开(公告)日：2004-02-24

申请号：US29165446

申请日：2002-08-09

Applicant: Thomas A. Williams

Designer： Thomas A. Williams

公开(公告)号：US5759311A

公开(公告)日：1998-06-02

申请号：US660800

申请日：1996-06-06

Applicant: Thomas A. Williams

Inventor： Thomas A. Williams

IPC: B60C11/03 ,  B60C11/00 ,  B60C11/11 ,  B60C113/00

CPC classification number: B60C11/0318

Abstract: A low noise tire tread includes a base pitch sequence circumferentially extending about at least a portion of the tire. A bias pitch sequence is embedded within at least one of the base pitches and desirably in a majority of, or preferably in each base pitch. The bias pitches extend generally at a lateral angle with respect to the circumferential base pitch and desirably extends across the full tread arc. One or more bias pitch sequences have different lateral pitch locations than the pitch locations of another bias pitch sequence.

Abstract translation: 低噪声轮胎胎面包括围绕轮胎的至少一部分周向延伸的基座间距序列。 偏置节距序列嵌入到至少一个基座间距内，并且期望地以大多数，或优选地在每个基座间距中。 偏置间距通常以相对于周向基座间距的横向角度延伸，并且期望地延伸穿过整个胎面弧。 一个或多个偏置音调序列具有与另一个偏置音调序列的音调位置不同的横向音调位置。

公开(公告)号：US4356413A

公开(公告)日：1982-10-26

申请号：US179847

申请日：1980-08-20

Applicant: William Rosenbluth ,  Thomas A. Williams

Inventor： William Rosenbluth ,  Thomas A. Williams

IPC: H03K19/0944 ,  H01L27/118 ,  H03K17/693 ,  H03K19/096 ,  H03M7/00 ,  H03K19/003 ,  G01R15/12 ,  H03K19/017 ,  H03K19/173

CPC classification number: H03K17/693 ,  H01L27/11803 ,  H03K19/096 ,  H03M7/005

Abstract: A generic FET logic circuit topology is disclosed which employs non-thresholded path routing to eliminate logic transition times in the critical data path. Non-threshold logic performs logic operations with non-inverting unity gain OR and AND functions. The propagation time through the logic matrix is therefore similar to the delay through a chain of linear amplifiers, as contrasted to an algebraic accumulation of delays with conventional logic techniques. This results in an N-factor improvement in the power-delay product over conventional techniques, where N is the number of logic operations being performed.

Abstract translation: 公开了一种通用FET逻辑电路拓扑，其采用非阈值路径路由来消除关键数据路径中的逻辑转换时间。 非门限逻辑执行具有非反相单位增益OR和AND功能的逻辑运算。 因此，通过逻辑矩阵的传播时间与通过一系列线性放大器的延迟相似，与传统逻辑技术的延迟的代数累积相反。 与常规技术相比，这导致功率延迟产物的N因子改进，其中N是正在执行的逻辑运算的数量。

公开(公告)号：US4277455A

公开(公告)日：1981-07-07

申请号：US84188

申请日：1979-10-12

Applicant: Thomas A. Williams ,  Frank M. Cussons

Inventor： Thomas A. Williams ,  Frank M. Cussons

IPC: C01B25/46 ,  C01B25/16

CPC classification number: C01B25/463

Abstract: Wet process phosphoric acid is purified by extraction with a hexanone of pentanone to form an organic extract, containing phosphoric acid, from which the acid content is recovered by treatment with water or aqueous phosphoric acid in 2 or more portions to give 2 or more purified acids, the recovery to give the last purified acid being in more than 1 countercurrent stage.

Abstract translation: 湿法磷酸通过用戊酮的己酮萃取纯化，形成含有磷酸的有机提取物，其中通过用水或磷酸水溶液处理2份或更多份来回收酸含量，得到2种或更多种纯化的酸 ，使得最后纯化的酸处于超过1个逆流阶段的恢复。

公开(公告)号：USD257900S

公开(公告)日：1981-01-13

申请号：US879676

申请日：1978-02-21

Applicant: Alfred O. Scholze ,  Thomas A. Williams

Designer： Alfred O. Scholze ,  Thomas A. Williams

公开(公告)号：US4232362A

公开(公告)日：1980-11-04

申请号：US948679

申请日：1978-10-05

Applicant: Thomas A. Williams ,  Alfred O. Scholze

Inventor： Thomas A. Williams ,  Alfred O. Scholze

IPC: F21S2/00 ,  F21S6/00 ,  F21V7/00 ,  F21V21/12 ,  F21Y101/00 ,  F21S1/12

CPC classification number: F21V33/0028 ,  F21S6/007 ,  F21V21/12 ,  F21V7/0008 ,  Y10S362/801 ,  Y10S362/806

Abstract: A family of modular lamps for indirect lighting, each comprised of stacked modules connected with spaces between the bottoms and tops of adjacent modules, the bottom of the lowest module of a stack of modules providing a base upon which the stand rests and the top of the uppermost module containing a recess and support therein for receiving an indirect lighting unit which directs light upwardly through the open top of the top module.

Abstract translation: 用于间接照明的一系列模块化灯，每个模块化灯都包括与相邻模块的底部和顶部之间的空间连接的堆叠模块，堆叠模块的最低模块的底部提供了一个基座，支架所在的底部 最上面的模块包含凹部和支撑件，用于接收间接照明单元，其将光向上引导通过顶部模块的开口顶部。

公开(公告)号：US4198696A

公开(公告)日：1980-04-15

申请号：US954947

申请日：1978-10-24

Applicant: Claude L. Bertin ,  John Bula ,  Larry C. Martin ,  Thomas A. Williams

Inventor： Claude L. Bertin ,  John Bula ,  Larry C. Martin ,  Thomas A. Williams

IPC: G11C17/00 ,  G11C17/12 ,  H01L23/525 ,  G11C11/40

CPC classification number: G11C17/12 ,  H01L23/525 ,  H01L23/5258 ,  H01L2924/0002 ,  H01L2924/3011

Abstract: Use of a residual charge bleed-off diode connected to the gate of an FET device in a Read Only Storage (ROS) is disclosed. The ROS is personalized by cutting selected gate leads in an array of FETs with a laser beam. Experience has shown that static electric charges on the lead due to handling prior to cutting become isolated at the gate after the gate lead is cut, producing an unpredictable conduction state for the FET instead of a solid off-state as desired. By providing a bleed-off diode which remains connected to the FET gate after the cut is made, the charges are allowed to leak away from those FETs whose gates have been cut while, at the same time, preventing the voltage of the FET gate from floating. The diode is oriented so as to offer a high impedance to current flowing from the gate node when the gate is biased for FET conduction. This minimizes the effect of the diode on circuit speed when the gate remains connected with the balance of the read only storage circuitry. If the gate and diode have been selectively severed from the balance of the read only storage circuitry, in the course of programming the storage, any residual charge on the gate is conducted through the diode by virtue of its reverse bias leakage or forward biased conduction state, depending upon the polarity of the residual charge on the gate.

Abstract translation: 公开了在只读存储（ROS）中连接到FET器件的栅极的残余电荷泄放二极管的使用。 通过用激光束在FET阵列中切割所选择的栅极引线来对ROS进行个性化处理。 经验表明，切割之后的处理导致的导线上的静电荷在栅极引线被切断之后在栅极处被隔离，根据需要产生用于FET的不可预测的导通状态，而不是固态截止状态。 通过提供在切断之后保持与FET栅极连接的放电二极管，电荷被允许从其栅极被切断的那些FET漏掉，同时防止FET栅极的电压 浮动 二极管被定向为当栅极偏置用于FET导通时，对从栅极节点流动的电流提供高阻抗。 当栅极保持与只读存储电路的平衡连接时，这最小化二极管对电路速度的影响。 如果从只读存储电路的平衡中选择性地切断栅极和二极管，则在编程存储器的过程中，栅极上的任何剩余电荷由于其反偏压泄漏或正向偏置导通状态而被引导通过二极管 ，取决于门上剩余电荷的极性。