公开(公告)号：US20120129287A1

公开(公告)日：2012-05-24

申请号：US13360838

申请日：2012-01-30

申请人： Shunpei Yamazaki ,  Toru Takayama ,  Naoya Sakamoto ,  Kengo Akimoto ,  Keiji Sato ,  Tetsunori Maruyama

发明人： Shunpei Yamazaki ,  Toru Takayama ,  Naoya Sakamoto ,  Kengo Akimoto ,  Keiji Sato ,  Tetsunori Maruyama

IPC分类号： H01L33/08

CPC分类号： H01L51/5206 ,  H01L27/3244 ,  H01L27/3246 ,  H01L27/3281 ,  H01L27/3295 ,  H01L51/5215 ,  Y10S428/917

摘要： According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide, concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.

摘要翻译： 根据本发明的一个方面，在注入孔（空穴注入电极，阳极）的一侧，代替传统的导电透明氧化物，涂覆含有硅或氧化硅的导电透明氧化物层的叠层结构作为电极 层如ITO。 此外，根据本发明的另一方面，作为空穴注入电极，施加含有硅或氧化硅的导电性透明氧化物层（其含量不同）的叠层结构。 优选地，硅或氧化硅，其连接到TFT的一侧的导电层的浓度范围为1原子％至6原子％，并且在含有机化合物的层的侧面上的硅或氧化硅浓度范围 从7原子％至15原子％。

公开(公告)号：US08129900B2

公开(公告)日：2012-03-06

申请号：US12239248

申请日：2008-09-26

申请人： Shunpei Yamazaki ,  Toru Takayama ,  Naoya Sakamoto ,  Kengo Akimoto ,  Keiji Sato ,  Tetsunori Maruyama

发明人： Shunpei Yamazaki ,  Toru Takayama ,  Naoya Sakamoto ,  Kengo Akimoto ,  Keiji Sato ,  Tetsunori Maruyama

IPC分类号： H01J1/62 ,  H01J63/04 ,  H01J17/49

CPC分类号： H01L51/5206 ,  H01L27/3244 ,  H01L27/3246 ,  H01L27/3281 ,  H01L27/3295 ,  H01L51/5215 ,  Y10S428/917

摘要： According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.

摘要翻译： 根据本发明的一个方面，在注入孔（空穴注入电极，阳极）的一侧，代替传统的导电透明氧化物，涂覆含有硅或氧化硅的导电透明氧化物层的叠层结构作为电极 层如ITO。 此外，根据本发明的另一方面，作为空穴注入电极，施加含有硅或氧化硅的导电性透明氧化物层（其含量不同）的叠层结构。 优选地，在与TFT连接的一侧上的导电层的硅或氧化硅浓度范围为1原子％至6原子％，并且在含有机化合物的层侧的硅或氧化硅浓度范围为 7原子％至15原子％。

公开(公告)号：US07893439B2

公开(公告)日：2011-02-22

申请号：US12003984

申请日：2008-01-04

申请人： Toru Takayama ,  Shunpei Yamazaki ,  Kengo Akimoto

发明人： Toru Takayama ,  Shunpei Yamazaki ,  Kengo Akimoto

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L23/48

CPC分类号： H01L21/0217 ,  B32B17/04 ,  B32B17/06 ,  C23C14/0652 ,  C23C14/5846 ,  H01L21/02266 ,  H01L21/3145 ,  H01L21/3185 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/13 ,  H01L27/3244 ,  H01L27/3248 ,  H01L27/3297 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/518 ,  H01L29/66757 ,  H01L2224/16225 ,  H01L2924/181 ,  H01L2924/00012

摘要： An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device of the present invention, a gate insulating film of a field effect type transistor with channel length of from 0.35 to 2.5 μm in which a silicon nitride film is formed over a crystalline semiconductor film through a silicon oxide film, wherein the silicon nitride film contains hydrogen with the concentration of 1×1021/cm3 or less and has characteristic of an etching rate of 10 nm/min or less with respect to mixed solution containing an ammonium hydrogen fluoride (NH4HF2) of 7.13% and an ammonium fluoride (NH4F) of 15.4%.

摘要翻译： 本发明的目的是将适合作为栅极绝缘膜和保护膜的固化和高质量的绝缘膜应用于在应变点或更低的温度下在玻璃基板上形成绝缘膜的技术， 以及通过使用它实现高效率和高可靠性的半导体器件。 在本发明的半导体器件中，通过氧化硅膜在晶体半导体膜上形成沟道长度为0.35〜2.5μm的场效应晶体管的栅极绝缘膜，其中，硅 氮化物膜含有浓度为1×1021 / cm3以下的氢，相对于含有7.13％的氟化氢铵（NH4HF2）和氟化铵（NH4HF2）的混合溶液，蚀刻速率为10nm /分钟以下的特性 NH4F）为15.4％。

公开(公告)号：US20080142887A1

公开(公告)日：2008-06-19

申请号：US12003984

申请日：2008-01-04

申请人： Toru Takayama ,  Shunpei Yamazaki ,  Kengo Akimoto

发明人： Toru Takayama ,  Shunpei Yamazaki ,  Kengo Akimoto

IPC分类号： H01L29/786 ,  H01L29/92 ,  H01L23/58 ,  B32B17/06

CPC分类号： H01L21/0217 ,  B32B17/04 ,  B32B17/06 ,  C23C14/0652 ,  C23C14/5846 ,  H01L21/02266 ,  H01L21/3145 ,  H01L21/3185 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/13 ,  H01L27/3244 ,  H01L27/3248 ,  H01L27/3297 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/518 ,  H01L29/66757 ,  H01L2224/16225 ,  H01L2924/181 ,  H01L2924/00012

摘要： An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device of the present invention, a gate insulating film of a field effect type transistor with channel length of from 0.35 to 2.5 μm in which a silicon nitride film is formed over a crystalline semiconductor film through a silicon oxide film, wherein the silicon nitride film contains hydrogen with the concentration of 1×1021/cm3 or less and has characteristic of an etching rate of 10 nm/min or less with respect to mixed solution containing an ammonium hydrogen fluoride (NH4HF2) of 7.13% and an ammonium fluoride (NH4F) of 15.4%.

公开(公告)号：US07335918B2

公开(公告)日：2008-02-26

申请号：US11017870

申请日：2004-12-22

申请人： Toru Takayama ,  Shunpei Yamazaki ,  Kengo Akimoto

发明人： Toru Takayama ,  Shunpei Yamazaki ,  Kengo Akimoto

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L23/48

CPC分类号： H01L21/0217 ,  B32B17/04 ,  B32B17/06 ,  C23C14/0652 ,  C23C14/5846 ,  H01L21/02266 ,  H01L21/3145 ,  H01L21/3185 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/13 ,  H01L27/3244 ,  H01L27/3248 ,  H01L27/3297 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/518 ,  H01L29/66757 ,  H01L2224/16225 ,  H01L2924/181 ,  H01L2924/00012

摘要： An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device of the present invention, a gate insulating film of a field effect type transistor with channel length of from 0.35 to 2.5 μm in which a silicon nitride film is formed over a crystalline semiconductor film through a silicon oxide film, wherein the silicon nitride film contains hydrogen with the concentration of 1×1021/cm3 or less and has characteristic of an etching rate of 10 nm/min or less with respect to mixed solution containing an ammonium hydrogen fluoride (NH4HF2) of 7.13% and an ammonium fluoride (NH4F) of 15.4%.

摘要翻译： 本发明的目的是将适合作为栅极绝缘膜和保护膜的固化和高质量的绝缘膜应用于在应变点或更低的温度下在玻璃基板上形成绝缘膜的技术， 以及通过使用它实现高效率和高可靠性的半导体器件。 在本发明的半导体器件中，通过氧化硅膜在晶体半导体膜上形成通道长度为0.35〜2.5μm的场效应晶体管的栅极绝缘膜，其中，硅 氮化物膜含有浓度为1×10 21 / cm 3以下的氢，并且具有相对于含有一种或多种的混合溶液的蚀刻速率为10nm / min或更小的特性 氟化氢铵（NH 4 HF 2 H 2）为7.13％，氟化铵（NH 4 N 4 F）为15.4％。

公开(公告)号：US07098087B2

公开(公告)日：2006-08-29

申请号：US10631776

申请日：2003-08-01

申请人： Kengo Akimoto ,  Toru Takayama ,  Tetsuji Yamaguchi ,  Shunpei Yamazaki

发明人： Kengo Akimoto ,  Toru Takayama ,  Tetsuji Yamaguchi ,  Shunpei Yamazaki

IPC分类号： H01L21/84

CPC分类号： H01L21/3185 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02266 ,  H01L21/31612 ,  H01L21/67109 ,  H01L21/67248 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1255 ,  H01L27/1259 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

摘要： It is an object of the present invention is to provide a technique for forming a dense insulating film of good quality that is applicable to a transistor made on a substrate weak against heat such as a glass and a semiconductor device that can realize high performance and high reliability using the technique. In the present invention a silicon oxide film is formed on a crystalline semiconductor film, which is formed on an insulating surface, by the sputtering method using silicon as a target by applying high-frequency power in an atmosphere containing oxygen or oxygen and a rare gas, a silicon nitride film is formed thereon by applying high-frequency power in an atmosphere containing nitrogen or nitrogen and a rare gas, and then, heat treatment of a stacked body of the crystalline semiconductor film, the silicon oxide film, and the silicon nitride film at a temperature higher than a temperature for forming the films is performed.

摘要翻译： 本发明的目的是提供一种用于形成质量好的致密绝缘膜的技术，该技术可应用于能够实现高性能和高性能的诸如玻璃和半导体器件之类的耐热弱的基板上制成的晶体管 使用该技术的可靠性。 在本发明中，通过在含有氧或氧的气氛中施加高频电力的稀有气体，通过使用硅作为靶的溅射法，在形成在绝缘表面上的结晶半导体膜上形成氧化硅膜 通过在含氮或氮气和稀有气体的气氛中施加高频功率而形成氮化硅膜，然后对结晶半导体膜，氧化硅膜和氮化硅的层叠体进行热处理 在高于用于形成膜的温度的温度下进行膜。

公开(公告)号：US20050093432A1

公开(公告)日：2005-05-05

申请号：US10937904

申请日：2004-09-10

申请人： Shunpei Yamazaki ,  Toru Takayama ,  Naoya Sakamoto ,  Kengo Akimoto ,  Keiji Sato ,  Tetsunori Maruyama

发明人： Shunpei Yamazaki ,  Toru Takayama ,  Naoya Sakamoto ,  Kengo Akimoto ,  Keiji Sato ,  Tetsunori Maruyama

IPC分类号： G09F9/30 ,  H01L27/32 ,  H01L51/50 ,  H01L51/52 ,  H05B33/10 ,  H05B33/26 ,  H05B33/28

CPC分类号： H01L51/5206 ,  H01L27/3244 ,  H01L27/3246 ,  H01L27/3281 ,  H01L27/3295 ,  H01L51/5215 ,  Y10S428/917

摘要： According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.

摘要翻译： 根据本发明的一个方面，在注入孔（空穴注入电极，阳极）的一侧，代替传统的导电透明氧化物，涂覆含有硅或氧化硅的导电透明氧化物层的叠层结构作为电极 层如ITO。 此外，根据本发明的另一方面，作为空穴注入电极，施加含有硅或氧化硅的导电性透明氧化物层（其含量不同）的叠层结构。 优选地，在与TFT连接的一侧上的导电层的硅或氧化硅浓度范围为1原子％至6原子％，并且在含有机化合物的层侧的硅或氧化硅浓度范围为 7原子％至15原子％。

公开(公告)号：US07923356B2

公开(公告)日：2011-04-12

申请号：US11295470

申请日：2005-12-07

申请人： Toru Takayama ,  Kengo Akimoto

发明人： Toru Takayama ,  Kengo Akimoto

IPC分类号： H01L21/00

CPC分类号： H01L29/66757 ,  H01L29/78666 ,  H01L29/78675

摘要： Concerning an art related to a manufacturing method for a semiconductor device having an integrated circuit using thin film transistors on a substrate, a problem is to provide a condition for forming an amorphous silicon film having distortion. In the deposition of an amorphous silicon film using a sputter method, a condition is provided with a frequency of 15 to 25 kHz and a deposition power of 0.5 to 3 kW. This can sufficiently contain Ar at 10×1020/cm3 or more in an amorphous silicon film, thus making possible to form an amorphous silicon film having distortion.

摘要翻译： 关于具有在基板上使用薄膜晶体管的集成电路的半导体器件的制造方法的技术，存在的问题是提供一种形成具有变形的非晶硅膜的条件。 在使用溅射法沉积非晶硅膜的情况下，提供15至25kHz的频率和0.5至3kw的沉积功率的条件。 这可以在非晶硅膜中充分地含有10×10 20 / cm 3以上的Ar，因此能够形成具有变形的非晶硅膜。

公开(公告)号：US06991997B2

公开(公告)日：2006-01-31

申请号：US10157843

申请日：2002-05-31

申请人： Toru Takayama ,  Kengo Akimoto

发明人： Toru Takayama ,  Kengo Akimoto

IPC分类号： H01L21/322 ,  H01L21/20

CPC分类号： H01L29/66757 ,  H01L29/78666 ,  H01L29/78675

摘要： Concerning an art related to a manufacturing method for a semiconductor device having an integrated circuit using thin film transistors on a substrate, a problem is to provide a condition for forming an amorphous silicon film having distortion. In the deposition of an amorphous silicon film using a sputter method, a condition is provided with a frequency of 15 to 25 kHz and a deposition power of 0.5 to 3 kW. This can sufficiently contain Ar at 10×1020/cm3 or more in an amorphous silicon film, thus making possible to form an amorphous silicon film having distortion.

摘要翻译： 关于具有在基板上使用薄膜晶体管的集成电路的半导体器件的制造方法的技术，存在的问题是提供一种形成具有变形的非晶硅膜的条件。 在使用溅射法沉积非晶硅膜的情况下，提供15至25kHz的频率和0.5至3kw的沉积功率的条件。 这可以在非晶硅膜中充分地含有10×10 20 / cm 3以上的Ar，从而有可能形成具有变形的非晶硅膜。

公开(公告)号：US20050012151A1

公开(公告)日：2005-01-20

申请号：US10821197

申请日：2004-09-01

申请人： Tetsuji Yamaguchi ,  Kengo Akimoto ,  Hiroki Kayoiji ,  Toru Takayama

发明人： Tetsuji Yamaguchi ,  Kengo Akimoto ,  Hiroki Kayoiji ,  Toru Takayama

IPC分类号： H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/01

CPC分类号： H01L27/12 ,  H01L27/1248

摘要： An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as lowering of an interface level or reduction in a fixed charge without causing a problem of misalignment in patterning due to expansion or shrinkage of glass. A method for manufacturing a thin film transistor of the present invention comprises the steps of heat-treating in a state where at least a gate insulating film is formed over a semiconductor film on which element isolation is not performed, simultaneously isolating the gate insulating film and the semiconductor film into an element structure, forming an insulating film covering a side face of an exposed semiconductor film, thereby preventing a short-circuit between the semiconductor film and a gate electrode. Expansion or shrinkage of a glass substrate during the heat treatment can be prevented from affecting misalignment in patterning since the gate insulating film and the semiconductor film are simultaneously processed into element shapes after the heat treatment.

摘要翻译： 本发明的目的是提供一种薄膜晶体管的制造方法，其能够进行旨在提高栅极绝缘膜的特性的热处理，例如降低界面电平或降低固定电荷，而不会引起不对准的问题 由于玻璃的膨胀或收缩造成图案化。 本发明的薄膜晶体管的制造方法包括以下步骤：在不进行元件隔离的半导体膜上形成至少栅极绝缘膜的状态下进行热处理，同时隔离栅极绝缘膜和 将半导体膜形成为元件结构，形成覆盖露出的半导体膜的侧面的绝缘膜，由此防止半导体膜与栅电极之间的短路。 由于栅极绝缘膜和半导体膜在热处理后同时被加工成元件形状，所以可以防止热处理期间的玻璃基板的膨胀或收缩，从而影响图案中的未对准。