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11.
公开(公告)号:US20140332824A1
公开(公告)日:2014-11-13
申请号:US14340267
申请日:2014-07-24
Applicant: United Microelectronics Corp.
Inventor: Chin-Fu Lin , Chin-Cheng Chien , Chun-Yuan Wu , Teng-Chun Tsai , Chih-Chien Liu
IPC: H01L29/78 , H01L27/088 , H01L29/16 , H01L29/10 , H01L29/161
CPC classification number: H01L29/785 , H01L21/02381 , H01L21/02532 , H01L21/02636 , H01L21/31111 , H01L21/31116 , H01L21/3115 , H01L21/3141 , H01L21/3185 , H01L21/764 , H01L21/823431 , H01L21/823437 , H01L27/0886 , H01L27/10879 , H01L29/1095 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/66795
Abstract: A semiconductor structure for forming FinFETs is described. The semiconductor structure includes a semiconductor substrate, a plurality of odd fins of the FinFETs on the substrate, and a plurality of even fins of the FinFETs on the substrate between the odd fins of the FinFETs. The odd fins of the FinFETs are defined from the substrate. The even fins of the FinFETs are different from the odd fins of the FinFETs in at least one of the width and the material, and may be further different from the odd fins of the FinFETs in the height.
Abstract translation: 描述用于形成FinFET的半导体结构。 半导体结构包括半导体衬底,衬底上的FinFET的多个奇数鳍片,以及FinFET的奇数鳍片之间的衬底上的FinFET的多个偶数鳍片。 FinFET的奇数鳍从衬底定义。 FinFET的均匀鳍片与宽度和材料中的至少一个中的FinFET的奇数鳍不同,并且可以与FinFET的高度的奇数鳍不同。
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公开(公告)号:US20130316540A1
公开(公告)日:2013-11-28
申请号:US13966276
申请日:2013-08-13
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Chu Chen , Teng-Chun Tsai , Chien-Chung Huang , Keng-Jen Liu
IPC: H01L21/3065
CPC classification number: H01L21/3065 , H01L21/02057 , H01L21/02063
Abstract: A method for removing oxide is described. A substrate is provided, including an exposed portion whereon a native oxide layer has been formed. A removing oxide process is performed to the substrate using nitrogen trifluoride (NF3) and ammonia (NH3) as a reactant gas, wherein the volumetric flow rate of NF3 is greater than that of NH3.
Abstract translation: 描述了一种去除氧化物的方法。 提供了一种衬底,包括其中形成有自然氧化物层的暴露部分。 使用三氟化氮(NF3)和氨(NH3)作为反应气体对基板进行去除氧化处理,其中NF 3的体积流量大于NH 3的体积流量。
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13.
公开(公告)号:US10141193B2
公开(公告)日:2018-11-27
申请号:US14949896
申请日:2015-11-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chin-Cheng Chien , Chun-Yuan Wu , Chih-Chien Liu , Chin-Fu Lin , Teng-Chun Tsai
IPC: H01L21/28 , H01L29/423 , H01L29/49 , H01L29/51 , H01L29/66
Abstract: A semiconductor device including a substrate, a spacer and a high-k dielectric layer having a U-shape profile is provided. The spacer located on the substrate surrounds and defines a trench. The high-k dielectric layer having a U-shape profile is located in the trench, and the high-k dielectric layer having a U-shape profile exposes an upper portion of the sidewalls of the trench.
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公开(公告)号:US10014227B2
公开(公告)日:2018-07-03
申请号:US14825165
申请日:2015-08-12
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Teng-Chun Tsai , Chun-Yuan Wu , Chih-Chien Liu , Chin-Cheng Chien , Chin-Fu Lin
IPC: H01L27/092 , H01L21/84 , H01L29/165 , H01L21/8238 , H01L27/12 , H01L29/10
CPC classification number: H01L21/845 , H01L21/823821 , H01L27/0924 , H01L27/1211 , H01L29/1054 , H01L29/165
Abstract: A semiconductor device includes a semiconductor substrate, at least a first fin structure, at least a second fin structure, a first gate, a second gate, a first source/drain region and a second source/drain region. The semiconductor substrate has at least a first active region to dispose the first fin structure and at least a second active region to dispose the second fin structure. The first/second fin structure partially overlapped by the first/second gate has a first/second stress, and the first stress and the second stress are different from each other. The first/second source/drain region is disposed in the first/second fin structure at two sides of the first/second gate.
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公开(公告)号:US20130228836A1
公开(公告)日:2013-09-05
申请号:US13869037
申请日:2013-04-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Shih-Hung Tsai , Chien-Ting Lin , Chin-Cheng Chien , Chin-Fu Lin , Chih-Chien Liu , Teng-Chun Tsai , Chun-Yuan Wu
IPC: H01L29/78
CPC classification number: H01L29/785 , H01L29/66795
Abstract: A non-planar semiconductor structure includes a substrate, at least two fin-shaped structures, at least an isolation structure, and a plurality of epitaxial layers. The fin-shaped structures are located on the substrate. The isolation structure is located between the fin-shaped structures, and the isolation structure has a nitrogen-containing layer. The epitaxial layers respectively cover a part of the fin-shaped structures and are located on the nitrogen-containing layer. Anon-planar semiconductor process is also provided for forming the semiconductor structure.
Abstract translation: 非平面半导体结构包括衬底,至少两个鳍状结构,至少一个隔离结构和多个外延层。 鳍状结构位于基底上。 隔离结构位于鳍状结构之间,隔离结构具有含氮层。 外延层分别覆盖了鳍状结构的一部分并且位于含氮层上。 还提供了用于形成半导体结构的非平面半导体工艺。
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