公开(公告)号：US5914500A

公开(公告)日：1999-06-22

申请号：US821159

申请日：1997-03-20

申请人： Mietek Bakowski ,  Ulf Gustafsson

发明人： Mietek Bakowski ,  Ulf Gustafsson

IPC分类号： H01L21/04 ,  H01L29/06 ,  H01L29/24 ,  H01L29/47 ,  H01L29/872 ,  H01L31/0312 ,  H01L27/095 ,  H01L29/812

CPC分类号： H01L29/0615 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/872 ,  H01L29/0657

摘要： A semiconductor diode structure with a Schottky junction, wherein a metal contact and a silicon carbide semiconductor layer of a first conducting type form the junction and wherein the edge of the junction exhibits a junction termination divided into a transition belt (TB) having gradually increasing total charge or effective sheet charge density closest to the metal contact and a Junction Termination Extension (JTE) outside the transition belt, the JTE having a charge profile with a stepwise or uniformly deceasing total charge or effective sheet charge density from an initial value to a zero or almost zero total charge at the outermost edge of the termination following a radial direction from the center part of the JTE towards the outermost edge of the termination. The purpose of the transition belt is to reduce the electric field concentration at the edge of the metal contact of the Schottky diode, while the purpose of the junction termination extension is to control the electric field at the periphery of the diode.

摘要翻译： 具有肖特基结的半导体二极管结构，其中金属接触和第一导电类型的碳化硅半导体层形成结，并且其中所述接合部的边缘表现出分为逐渐增加总和的过渡带（TB）的接合端接 充电或有效的薄片电荷密度最接近金属触点和在转换带外部的结端接延伸（JTE），JTE具有从初始值到零的逐步或均匀衰减总电荷或有效片电荷密度的电荷分布 或者在从JTE的中心部分到终端的最外边缘的径向方向上在终端的最外边缘处的总电荷几乎为零。 过渡带的目的是减小肖特基二极管金属接触边缘处的电场浓度，同时连接终止延伸的目的是控制二极管外围的电场。

公开(公告)号：US06313488B1

公开(公告)日：2001-11-06

申请号：US09333296

申请日：1999-06-15

申请人： Mietek Bakowski ,  Bo Breitholtz ,  Ulf Gustafsson ,  Lennart Zdansky

发明人： Mietek Bakowski ,  Bo Breitholtz ,  Ulf Gustafsson ,  Lennart Zdansky

IPC分类号： H01L29737

CPC分类号： H01L29/1004 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/7371 ,  H01L29/739

摘要： A bipolar transistor having at least a low doped drift layer (14) of crystalline SiC comprises at least one first layer (13) of a semi-conductor material having a wider energy gap between the conduction band and the valence band than an adjacent layer (14) of SiC.

摘要翻译： 具有晶体SiC的至少低掺杂漂移层（14）的双极晶体管包括半导体材料的至少一个第一层（13），其在导带和价带之间具有比相邻层更宽的能隙（ 14）。

公开(公告)号：US5831287A

公开(公告)日：1998-11-03

申请号：US706264

申请日：1996-09-04

申请人： Mietek Bakowski ,  Ulf Gustafsson ,  Henry Bleichner

发明人： Mietek Bakowski ,  Ulf Gustafsson ,  Henry Bleichner

IPC分类号： H01L21/04 ,  H01L29/24 ,  H01L29/739 ,  H01L31/0312

CPC分类号： H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/7395

摘要： A bipolar semiconductor comprising layers of SiC semiconductor material. At least one pn-junction is formed between two of the layers having charged carrier transport across the junction when the device is in a conductive state. A resistive element in series with the pn-junction lowers the current through the pn-junction as the voltage drop across the device increases with an increase in temperature. The temperature coefficient for the device switches from a negative to a positive at a lower current through the device.

摘要翻译： 包括SiC半导体材料层的双极半导体。 当器件处于导通状态时，在具有带电荷的载流子传输跨越结的两个层之间形成至少一个pn结。 与pn结串联的电阻元件随着温度的升高随着器件上的电压降而降低通过pn结的电流。 器件的温度系数从负值切换到低电流通过器件的正温度。

公开(公告)号：US5773849A

公开(公告)日：1998-06-30

申请号：US636940

申请日：1996-04-24

申请人： Christopher Harris ,  Mietek Bakowski ,  Ulf Gustafsson ,  Mats Andersson

发明人： Christopher Harris ,  Mietek Bakowski ,  Ulf Gustafsson ,  Mats Andersson

IPC分类号： H01L21/04 ,  H01L29/24 ,  H01L29/739 ,  H01L29/745 ,  H01L29/749 ,  H01L31/0312

CPC分类号： H01L29/1608 ,  H01L29/66068 ,  H01L29/7397 ,  H01L29/7455 ,  H01L29/749

摘要： A field controlled semiconductor device of SiC has a drain, a highly doped substrate layer on top of the drain and a low doped n-type drift layer on top of the substrate layer. A p-type base layer is located on the drift layer and a vertical trench extends through the base layer. In the trench an n-type channel region extends vertically along a wall of the trench and connects a source region layer to the drift layer. A gate electrode is arranged in the trench to be on the opposite side of the channel region with respect to the base layer.

摘要翻译： SiC的场控半导体器件具有漏极，在漏极顶部具有高度掺杂的衬底层，在衬底层的顶部具有低掺杂的n型漂移层。 p型基层位于漂移层上，垂直沟槽延伸通过基层。 在沟槽中，n型沟道区域沿着沟槽的壁垂直延伸，并将源极区域层连接到漂移层。 沟槽中布置有栅电极，以相对于基层在通道区域的相对侧。

公开(公告)号：US06469359B2

公开(公告)日：2002-10-22

申请号：US09760885

申请日：2001-01-17

申请人： Mietek Bakowski ,  Ulf Gustafsson ,  Heinz Lendenmann

发明人： Mietek Bakowski ,  Ulf Gustafsson ,  Heinz Lendenmann

IPC分类号： H01L2358

CPC分类号： H01L29/66068 ,  H01L29/1608 ,  H01L29/7722 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device of planar structure has a pn-junction (10) formed by a first layer (1) doped according to a first conductivity type, n or p, and on top thereof a second layer (2) doped according to a second conductivity type. The second layer has a higher doping concentration than the first layer and a lateral edge thereof is provided with an edge termination with second zones of said second conductivity type separated by first zones (4) of said first conductivity type arranged so that the total charge and/or the effective sheet charge density of dopants according to said second conductivity type is decreasing towards the laterally outer border (8) of the edge termination. A third layer (5) doped according to said first conductivity type is arranged on top of said second layer at least in the region of the edge termination for burying the edge termination of the device thereunder.

摘要翻译： 平面结构的半导体器件具有由根据第一导电类型n或p掺杂的第一层（1）形成的pn结（10），并且在其顶部上具有根据第二导电性掺杂的第二层（2） 类型。 第二层具有比第一层更高的掺杂浓度，并且其侧边缘设置有边缘终端，其中所述第二导电类型的第二区被所述第一导电类型的第一区（4）隔开，以使总电荷和 /或根据所述第二导电类型的掺杂剂的有效片电荷密度朝着边缘终端的横向外边界（8）减小。 根据所述第一导电类型掺杂的第三层（5）至少在边缘终端的区域中布置在所述第二层的顶部上，用于掩埋其下方的器件的边缘终端。

公开(公告)号：US6040237A

公开(公告)日：2000-03-21

申请号：US956959

申请日：1997-10-23

申请人： Mietek Bakowski ,  Ulf Gustafsson ,  Kurt Rottner ,  Susan Savage

发明人： Mietek Bakowski ,  Ulf Gustafsson ,  Kurt Rottner ,  Susan Savage

IPC分类号： H01L29/861 ,  H01L21/04 ,  H01L29/06 ,  H01L29/24 ,  H01L21/26

CPC分类号： H01L29/0619 ,  H01L21/0465 ,  H01L29/0615 ,  H01L29/1608 ,  H01L29/6606 ,  H01L2924/0002 ,  Y10S438/931

摘要： A semiconductor component and a method for processing said component, which comprises a pn junction, where both the p-conducting (3) and the n-conducting layers (2) of the pn junction constitute doped silicon carbide layers and where the edge of the higher doped conducting layer of the pn junction exhibits a charge profile with a stepwise or uniformly decreasing total charge or effective surface charge density from the initial value at the main pn junction to a zero or almost zero total charge or charge density at the outermost edge of the junction following a radial direction from the central part of the junction towards the outermost edge.

摘要翻译： 一种用于处理所述元件的半导体元件和方法，其包括pn结，其中pn结的p导电（3）和n导电层（2）都构成掺杂的碳化硅层，并且其中 pn结的较高掺杂导电层表现出电荷分布，其逐次或均匀地减小总电荷或有效表面电荷密度，从主pn结处的初始值到零或几乎为零的总电荷或电荷密度在最外边缘处 在从连接的中心部分到最外边缘的径向方向上的连接处。

公开(公告)号：US5977605A

公开(公告)日：1999-11-02

申请号：US954165

申请日：1997-10-20

申请人： Mietek Bakowsky ,  Bo Bijlenga ,  Ulf Gustafsson ,  Christopher Harris ,  Susan Savage

发明人： Mietek Bakowsky ,  Bo Bijlenga ,  Ulf Gustafsson ,  Christopher Harris ,  Susan Savage

IPC分类号： H01L29/06 ,  H01L29/16 ,  H01L29/24 ,  H01L29/861 ,  H01L23/58

CPC分类号： H01L29/1608 ,  H01L29/0615 ,  H01L29/0661 ,  H01L29/8611 ,  H01L2924/0002 ,  Y10S438/931

摘要： A semiconductor component, which comprises a pn junction, where both the p-conducting and the n-conducting layers of the pn junction constitute doped silicon carbide layers and where the edge of at least one of the conducting layers of the pn junction, exhibits a stepwise or uniformly decreasing total charge or effective surface charge density from the initial value at the defined working junction to a zero or almost zero total charge at the outermost edge of the junction following a radial direction from the central part of the junction towards the outermost edge.

摘要翻译： 一种半导体部件，其包括pn结，其中pn结的p导电层和n导电层都构成掺杂的碳化硅层，并且其中pn结的至少一个导电层的边缘呈现出 在从结合的中心部分到最外边缘的径向方向上，从总限制的工作结点处的初始值逐渐或均匀地减小总电荷或有效表面电荷密度，从而在连接的最外边缘处的零电荷或几乎为零的总电荷 。

公开(公告)号：US5923051A

公开(公告)日：1999-07-13

申请号：US953420

申请日：1997-10-17

申请人： Christopher Harris ,  Mietek Bakowski ,  Ulf Gustafsson ,  Mats Andersson

发明人： Christopher Harris ,  Mietek Bakowski ,  Ulf Gustafsson ,  Mats Andersson

IPC分类号： H01L21/04 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L31/0312 ,  H01L29/74 ,  H01L31/111

CPC分类号： H01L29/7813 ,  H01L29/66068 ,  H01L29/7455 ,  H01L29/749 ,  H01L29/7828 ,  H01L29/1608

摘要： A field controlled semiconductor device of SiC comprises superimposed in the order mentioned at least a drain (12), a highly doped substrate layer (1) and a low doped n-type drift layer (2). It has also a highly doped n-type source region layer (6) and a source (11) connected thereto. A doped channel region layer (4) connects the source region layer to the drift layer, and a current is intended to flow therethrough when the device is in an on-state. The device has also a gate electrode (9). The channel region layer has a substantially lateral extension and is formed by a low doped n-type layer (4). The gate electrode (9) is arranged to influence the channel region layer from above for giving a conducting channel (17) created therein from the source region layer to the drift layer a substantially lateral extension.

摘要翻译： SiC的场控半导体器件以至少漏极（12），高度掺杂的衬底层（1）和低掺杂n型漂移层（2）的顺序叠加。 它还具有高掺杂的n型源区域层（6）和与其连接的源极（11）。 掺杂沟道区域层（4）将源区域层连接到漂移层，并且当器件处于导通状态时，电流意图流过其中。 器件还具有栅电极（9）。 沟道区层具有基本上横向的延伸，并由低掺杂n型层（4）形成。 栅电极（9）被布置成从上方影响沟道区域层，以从源极区域向漂移层形成基本上横向延伸的导电沟道（17）。

公开(公告)号：US5909039A

公开(公告)日：1999-06-01

申请号：US783579

申请日：1997-01-13

申请人： Mietek Bakowski ,  Christopher Harris ,  Ulf Gustafsson

发明人： Mietek Bakowski ,  Christopher Harris ,  Ulf Gustafsson

IPC分类号： H01L29/06 ,  H01L29/739 ,  H01L29/74

CPC分类号： H01L29/7396 ,  H01L29/0649

摘要： An IGBT comprises a drain, a highly doped p-type substrate layer, a highly doped n-type buffer layer, a drift layer, a p-type base layer, a highly doped n-type source region layer and a source electrode. A trench is etched in the base layer and an insulating layer with a gate electrode thereon is arranged on the base layer from the source region layer to the drift layer for the creation of a conducting inversion channel there. A contact portion is provided vertically separated from the source region layer and has the source electrode applied thereon for collecting holes injected from the substrate layer to the drift layer at a vertical distance from the source region layer.

摘要翻译： IGBT包括漏极，高掺杂的p型衬底层，高掺杂的n型缓冲层，漂移层，p型基极层，高掺杂的n型源极区域层和源极电极。 在基底层上蚀刻沟槽，并且其上具有栅极电极的绝缘层被布置在从源极区域到漂移层的基底层上，用于在那里形成导电反转通道。 提供了与源区域层垂直分离的接触部分，并且其上施加有源电极，用于从源区域层垂直距离收集从衬底层注入到漂移层的空穴。

公开(公告)号：US5763902A

公开(公告)日：1998-06-09

申请号：US637105

申请日：1996-04-24

申请人： Christopher Harris ,  Ulf Gustafsson ,  Mietek Bakowski

发明人： Christopher Harris ,  Ulf Gustafsson ,  Mietek Bakowski

IPC分类号： H01L21/331 ,  H01L29/06 ,  H01L29/10 ,  H01L29/739 ,  H01L29/74

CPC分类号： H01L29/6634 ,  H01L29/0649 ,  H01L29/1095 ,  H01L29/7396

摘要： An insulated gate bipolar transistor comprises a drain which supports a highly doped p-type substrate layer; a low doped n-type drift layer supported over the substrate layer; a base layer supported over the drift layer including a trench extending into the base layer, and supporting an insulated gate on an upper surface thereof separated from the trench by a highly doped n-type source region, the trench having a highly doped p-type layer at the bottom thereof vertically separated from the source region; and a source layer disposed over the n-type source region and extending into the trench covering the highly doped p-type layer in the trench bottom, wherein an applied voltage to the gate forms a conducting inversion channel in the base layer for electron transport from the source region to the drain, and the highly doped p-type layer in the bottom of the trench collects holes injected from the substrate layer into the drift layer thereby improving latch up immunity for the transistor.

摘要翻译： 绝缘栅双极晶体管包括支持高掺杂p型衬底层的漏极; 支撑在衬底层上的低掺杂n型漂移层; 支撑在漂移层上的基底层包括延伸到基底层中的沟槽，以及通过高度掺杂的n型源区域在与沟槽分离的上表面上支撑绝缘栅极，该沟槽具有高度掺杂的p型 在与源区垂直分离的底部的层; 以及源极层，设置在n型源极区域上并延伸到覆盖沟槽底部中的高掺杂p型层的沟槽中，其中施加到栅极的电压在基极层中形成用于电子传输的导电反转沟道 到漏极的源极区域和沟槽底部中的高掺杂p型层将从衬底层注入的空穴收集到漂移层中，从而提高晶体管的闭锁抗扰度。