-
公开(公告)号：US20120151247A1
公开(公告)日：2012-06-14
申请号：US13159580
申请日：2011-06-14
IPC分类号： G06F11/20
CPC分类号： H04L45/28 , H04L1/22 , H04L1/24 , H04L7/0025 , H04L7/0337 , H04L25/14 , H04L45/22 , H04L69/40
摘要： A communications link of multiple parallel communications lines includes at least one redundant line. In a first aspect, the lines are periodically recalibrated one at a time while the others carry functional data. If a fault is detected, the faulty line is disabled and the remaining previously calibrated lines transmit functional data. In a second aspect, impending line malfunction is detected from anomalies during calibration. In a third aspect, line malfunction is detected from receiver circuit output by determining a logical lane upon which each detected error occurs, and by mapping the logical lane to a physical line currently carrying the logical lane data.
摘要翻译： 多个并行通信线路的通信链路包括至少一个冗余线路。 在第一方面，线路一次一个地重新校准，而其他线路携带功能数据。 如果检测到故障，故障线路被禁用，其余的已校准线路传输功能数据。 在第二方面，在校准期间从异常检测到即将发生的线路故障。 在第三方面，通过确定发生每个检测到的错误的逻辑通道，并且将逻辑通道映射到当前携带逻辑车道数据的物理线路，从接收器电路输出检测线路故障。
-
公开(公告)号：US08139700B2
公开(公告)日：2012-03-20
申请号：US12492419
申请日：2009-06-26
申请人： Troy J. Beukema , Steven M. Clements , Chun-Ming Hsu , William R. Kelly , Elizabeth M. May , Sergey V. Rylov
发明人： Troy J. Beukema , Steven M. Clements , Chun-Ming Hsu , William R. Kelly , Elizabeth M. May , Sergey V. Rylov
IPC分类号： H04L25/00
CPC分类号： H03K5/1565 , H03K5/15013 , H03K2005/00052
摘要： A system and method for closed loop clock correction includes adjusting two or more input signals comprising at least one in-phase clock and one quadrature clock, and applying adjusted quadrature clock signals to a device capable of generating a 4-quadrant interpolated output clock phase. An interpolated output clock phase is delayed to form a clock for a measurement device. Two or more adjusted input signals are measured on a measurement device over a range of interpolated output clock phases. Errors are determined on the in-phase clock and the quadrature clock using sampled information from the measurement device. The in-phase clock and the quadrature clock are adapted using determined error information.
摘要翻译： 用于闭环时钟校正的系统和方法包括调整包括至少一个同相时钟和一个正交时钟的两个或更多个输入信号，并将调整的正交时钟信号应用于能够产生4象限内插输出时钟相位的器件。 内插输出时钟相位被延迟以形成用于测量设备的时钟。 在内插输出时钟相位的范围内，在测量装置上测量两个或多个调整后的输入信号。 使用来自测量装置的采样信息，在同相时钟和正交时钟上确定错误。 使用确定的误差信息适配同相时钟和正交时钟。
-
13.发明授权On-chip detection and measurement of data lock in a high-speed serial data link 有权在高速串行数据链路中片内检测和测量数据锁定公开(公告)号：US07675966B2
公开(公告)日：2010-03-09
申请号：US11537053
申请日：2006-09-29
IPC分类号： H04B3/46
CPC分类号： G06F17/30985
摘要： A method for on-chip detection of data lock and measurement of data lock time in a high-speed serial data link, including: permitting one or more incoming data streams into the high-speed data link; establishing a pattern to be searched in the one or more incoming data streams; comparing patterns in the one or more incoming data streams to a programmable data pattern; holding a repetitive pattern of bits in the one or more incoming data streams by one or more programmable data pattern registers, wherein when one or more occurrences of a byte are detected, an appropriate bit in the one or more programmable data pattern registers is set to indicate the byte's relative position; and filtering false indications in the repetitive pattern by using a byte detection state machine, the state machine controlling and keeping track of a search progress.
摘要翻译： 一种用于在高速串行数据链路中片内检测数据锁定和数据锁定时间的测量的方法，包括：允许一个或多个输入数据流进入高速数据链路; 在所述一个或多个输入数据流中建立要搜索的模式; 将一个或多个输入数据流中的模式与可编程数据模式进行比较; 通过一个或多个可编程数据模式寄存器保持所述一个或多个输入数据流中的位的重复模式，其中当检测到一个或多个字节出现时，所述一个或多个可编程数据模式寄存器中的适当位被设置为 表示字节的相对位置; 并通过使用字节检测状态机对重复模式中的错误指示进行过滤，状态机控制并跟踪搜索进度。
-
14.发明授权Systems for producing a plurality of different microporous phase inversion membrane each having any one of a plurality of different pore sizes from a single master dope batch 失效用于生产多个不同微孔相转换膜的系统，每个膜都具有多个不同孔径中的任何一种，单个主胶束批次
公开(公告)号：US6056529A
公开(公告)日：2000-05-02
申请号：US022295
申请日：1998-02-11
CPC分类号： B01D71/56 , B01D67/0009 , B01D67/0011 , B01D69/02 , B01D2323/12 , B01D2325/34
摘要： Systems for processing dope for the manufacture of microporous phase inversion membrane having any one of a plurality of different pore sizes from a single master dope batch is disclosed. The systems and methods include formulating a single master batch of dope preferably maximizing the non-solvent to solvent ratio for a given weight percentage of polymer for use in a microporous phase inversion membrane casting operation to produce phase inversion membranes having one of a plurality of different predetermined pore sizes. The master dope batch is controllably formulated in a vessel such that the temperature of the dope does not exceed a predetermined maximum mixing temperature and is maintained at a relatively low temperature (lower than the mixing temperature) suitable for storage. A small portion of the dope is then sequentially heated to a temperature no higher than any one of a plurality of target temperatures, the target temperature corresponding to a specific desired pore size to be formed in the microporous phase inversion membrane that results from casting the dope. As portions of the dope are incrementally transferred from the vessel to the dope casting apparatus, the dope portions are heated to a temperature no higher than within about .+-.0.15.degree. C. of the target temperature. The dope is then cooled to about room temperature or the temperature which results in a suitable and/or optimal casting viscosity and transferred to the dope casting apparatus to be forming microporous phase inversion membrane having any one of a plurality of different possible pore sizes.
摘要翻译： 公开了用于制造具有从单个母胶浆批次具有多个不同孔径的任何一种的微孔相转换膜的加工用系统。 该系统和方法包括配制单一母料批料，优选最大化给定重量百分比的聚合物的非溶剂与溶剂比，用于微孔相转移膜操作以产生具有多种不同的其中之一的相转移膜 预定孔径。 主料浆料可控地配制在容器中，使得涂料的温度不超过预定的最大混合温度，并保持在适合储存的相对低的温度（低于混合温度）。 然后将一小部分的涂料依次加热到不高于多个目标温度中的任何一个的温度，对应于在微孔相转化膜中形成的特定所需孔径的目标温度，其由铸造原液 。 由于涂料的一部分从容器中逐渐转移到涂料浇铸设备中，所以将涂料部分加热到不高于目标温度的约+/- 0.15℃的温度。 然后将涂料冷却至约室温或温度，其导致合适和/或最佳浇铸粘度并转移到涂料浇注设备中以形成具有多种不同可能孔径中的任何一种的微孔相转移膜。
-
公开(公告)号：US5266267A
公开(公告)日：1993-11-30
申请号：US23331
申请日：1993-02-26
申请人： Thomas Albano , William R. Kelly
发明人： Thomas Albano , William R. Kelly
CPC分类号： G01N35/00029 , G01N2035/00079 , G01N2035/00297 , Y10T436/112499
摘要： A method and apparatus for preventing spotting of the undersurface of the evaporation caps of an incubator in a clinical analyzer. It has been discovered that the surprising cause of the problem was electrostatic attraction building up on the caps, due to the use of plastic parts. The solution to that problem is the provision, in a plastic cover plate mounting the incubator housing on its drive spindle, with carbon fibers rather than glass fibers, in an amount sufficient to provide a volume resistivity throughout the plastic of between about 10.sup.5 and about 10.sup.9 ohm-cm, and grounding the housing through the spindle on which it is mounted.
摘要翻译： 一种用于在临床分析仪中防止培养箱的蒸发盖的下表面发现的方法和装置。 已经发现，由于使用塑料部件，问题的令人惊奇的原因是由于静电吸引而在盖上形成。 该问题的解决方案是在塑料盖板中将培养箱安装在其驱动主轴上，碳纤维而不是玻璃纤维，其量足以提供整个塑料的体积电阻率介于约105至约109之间 ohm-cm，并通过其所安装的主轴将外壳接地。
-
公开(公告)号：US4491089A
公开(公告)日：1985-01-01
申请号：US437818
申请日：1982-10-29
申请人： Michael F. Kelly , William R. Kelly
发明人： Michael F. Kelly , William R. Kelly
摘要： This invention concerns a support device for raising an animal from a collapsed position to an upright position. The support structure is a fluid inflatable bag which may be inflated by air or water. The bag has four apertures to receive the legs of collapsed animals thereby enabling the animal to be supported with its legs clear of the ground. In the preferred form the bag comprises three compartments which are separately inflatable. The compartments may be further provided with a plurality of additional compartments underneath or to each side. The bag may be made from a strong canvas outer skin with an interior lining of a suitable plastics material. There is no frame or other form of support member for the bag, it being entirely self-supporting and self-raising by virtue of the fluid pressure of air or water.
摘要翻译： 本发明涉及一种用于将动物从折叠位置升高到直立位置的支撑装置。 支撑结构是可以由空气或水膨胀的流体充气袋。 该袋具有四个孔以接收塌陷的动物的腿，从而使得动物能够以其腿部远离地面而被支撑。 在优选的形式中，该袋包括可独立充气的三个隔间。 隔室还可以在其下方或每侧具有多个附加隔室。 袋子可以由具有适当塑料材料的内衬的强帆布外皮制成。 袋子没有框架或其他形式的支撑构件，由于空气或水的流体压力，它完全是自支撑和自升高的。
-
17.发明授权公开(公告)号：US08401135B2
公开(公告)日：2013-03-19
申请号：US12698629
申请日：2010-02-02
IPC分类号： H04B1/10
CPC分类号： H04L27/01
摘要： A serial data receiver includes an amplitude path including a first signal conditioner that adds a first offset or subtracts a second offset based on a selection input, a preamp configured to receive a signal from a transmitter and provide an input signal to the amplitude path, an amplitude latch coupled to the amplitude path, a data latch having a data output and a decision feedback equalization (DFE) logic block coupled to the first conditioning element and the data output and configured to generate the selection output based on the data output of the data latch.
摘要翻译： 串行数据接收器包括幅度路径，该幅度路径包括基于选择输入添加第一偏移或减去第二偏移的第一信号调节器，被配置为从发送器接收信号并且向幅度路径提供输入信号的前置放大器， 耦合到振幅路径的振幅锁存器，具有数据输出的数据锁存器和耦合到第一调理元件和数据输出的判定反馈均衡（DFE）逻辑块，并且被配置为基于数据的数据输出生成选择输出 锁定。
-
公开(公告)号：US20100329403A1
公开(公告)日：2010-12-30
申请号：US12492419
申请日：2009-06-26
申请人： Troy J. Beukema , Steven M. Clements , Chun-Ming Hsu , William R. Kelly , Elizabeth M. May , Sergey V. Rylov
发明人： Troy J. Beukema , Steven M. Clements , Chun-Ming Hsu , William R. Kelly , Elizabeth M. May , Sergey V. Rylov
IPC分类号： H04L7/00
CPC分类号： H03K5/1565 , H03K5/15013 , H03K2005/00052
摘要： A system and method for closed loop clock correction includes adjusting two or more input signals comprising at least one in-phase clock and one quadrature clock, and applying adjusted quadrature clock signals to a device capable of generating a 4-quadrant interpolated output clock phase. An interpolated output clock phase is delayed to form a clock for a measurement device. Two or more adjusted input signals are measured on a measurement device over a range of interpolated output clock phases. Errors are determined on the in-phase clock and the quadrature clock using sampled information from the measurement device. The in-phase clock and the quadrature clock are adapted using determined error information.
摘要翻译： 用于闭环时钟校正的系统和方法包括调整包括至少一个同相时钟和一个正交时钟的两个或更多个输入信号，并将调整的正交时钟信号应用于能够产生4象限内插输出时钟相位的器件。 内插输出时钟相位被延迟以形成用于测量设备的时钟。 在内插输出时钟相位的范围内，在测量装置上测量两个或多个调整后的输入信号。 使用来自测量装置的采样信息，在同相时钟和正交时钟上确定错误。 使用确定的误差信息适配同相时钟和正交时钟。
-
公开(公告)号：US07512201B2
公开(公告)日：2009-03-31
申请号：US11160218
申请日：2005-06-14
申请人： William R. Kelly , Victor Moy
发明人： William R. Kelly , Victor Moy
IPC分类号： H04L7/00
CPC分类号： H04L7/0091
摘要： The present invention provides a robust global timing resynchronization architecture, a multi-link communications system including the same, and a method for minimizing the effects of resynchronization signal skew, reference clock skew, and PLL static phase error variations on resynchronization of multi-link communications systems.
摘要翻译： 本发明提供了一种鲁棒的全局定时重新同步架构，包括该多路链路通信系统的多链路通信系统，以及一种用于最小化多链路通信重新同步的再同步信号偏移，参考时钟偏差和PLL静态相位误差变化的影响的方法 系统。
-
20.发明申请ON-CHIP DETECTION AND MEASUREMENT OF DATA LOCK IN A HIGH SPEED SERIAL DATA LINK 有权数据锁定在高速串行数据链路中的片上检测和测量公开(公告)号：US20080080603A1
公开(公告)日：2008-04-03
申请号：US11537053
申请日：2006-09-29
IPC分类号： H04B17/00
CPC分类号： G06F17/30985
摘要： A method for on-chip detection of data lock and measurement of data lock time in a high-speed serial data link, including: permitting one or more incoming data streams into the high-speed data link; establishing a pattern to be searched in the one or more incoming data streams; comparing patterns in the one or more incoming data streams to a programmable data pattern; holding a repetitive pattern of bits in the one or more incoming data streams by one or more programmable data pattern registers, wherein when one or more occurrences of a byte are detected, an appropriate bit in the one or more programmable data pattern registers is set to indicate the byte's relative position; and filtering false indications in the repetitive pattern by using a byte detection state machine, the state machine controlling and keeping track of a search progress.
摘要翻译： 一种用于在高速串行数据链路中片内检测数据锁定和数据锁定时间的测量的方法，包括：允许一个或多个输入数据流进入高速数据链路; 在所述一个或多个输入数据流中建立要搜索的模式; 将一个或多个输入数据流中的模式与可编程数据模式进行比较; 通过一个或多个可编程数据模式寄存器保持所述一个或多个输入数据流中的位的重复模式，其中当检测到一个或多个字节出现时，所述一个或多个可编程数据模式寄存器中的适当位被设置为 表示字节的相对位置; 并通过使用字节检测状态机对重复模式中的错误指示进行过滤，状态机控制并跟踪搜索进度。
-
-
-
-
-
-
-
-
-
搜索结果
24 条记录 (耗时 0.022 秒)
