公开(公告)号：US20090268515A1

公开(公告)日：2009-10-29

申请号：US12498597

申请日：2009-07-07

申请人： Won-Cheol Jeong ,  Jae-Hyun Park

发明人： Won-Cheol Jeong ,  Jae-Hyun Park

IPC分类号： G11C11/14 ,  G11C7/02

CPC分类号： G11C11/1675 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673

摘要： Twin cell type semiconductor memory devices are provided that include a plurality of main bit lines and a plurality of reference bit lines. Each of the reference bit lines correspond to respective ones of the main bit lines to form a plurality of bit line pairs. A plurality of sense amplifiers are provided that are electrically connected to a respective one of the plurality of bit line pairs. At least one of the plurality of main bit lines or the plurality of reference bit lines is interposed between the main bit line and the corresponding reference bit line of each bit line pair. At least some of the main bit lines may cross respective ones of the reference bit lines in a sense amplifier region of the semiconductor memory device that contains the plurality of sense amplifiers.

摘要翻译： 提供了包括多个主位线和多个参考位线的双电池型半导体存储器件。 每个参考位线对应于主位线中的相应位线以形成多个位线对。 提供多个读出放大器，其电连接到多个位线对中的相应一个。 多个主位线或多个参考位线中的至少一个被插入在每个位线对的主位线和对应的参考位线之间。 至少一些主位线可以在包含多个读出放大器的半导体存储器件的读出放大器区域中交叉相应的参考位线。

公开(公告)号：US07589994B2

公开(公告)日：2009-09-15

申请号：US12171893

申请日：2008-07-11

申请人： Won-Cheol Jeong ,  Jae-Hyun Park

发明人： Won-Cheol Jeong ,  Jae-Hyun Park

IPC分类号： G11C11/00

CPC分类号： H01L43/08 ,  G11C11/16 ,  H01L27/222

摘要： A magnetic random access memory (MRAM) device may include a substrate, a first magnetic layer on the substrate, and a digit line on the first magnetic layer. A magnetic tunnel junction structure may be provided adjacent the digit line, and a bit line may be provided on the magnetic tunnel junction structure such that the magnetic tunnel junction structure is between the bit line and the digit line. In addition, a second magnetic layer may be provided on the bit line.

摘要翻译： 磁性随机存取存储器（MRAM）器件可以包括衬底，衬底上的第一磁性层和第一磁性层上的数字线。 可以在数字线附近提供磁性隧道结结构，并且可以在磁性隧道结结构上提供位线，使得磁性隧道结结构位于位线和数字线之间。 此外，可以在位线上设置第二磁性层。

公开(公告)号：US07442602B2

公开(公告)日：2008-10-28

申请号：US11389996

申请日：2006-03-27

申请人： Jae-Hyun Park ,  Jae-Hee Oh ,  Se-Ho Lee ,  Won-Cheol Jeong

发明人： Jae-Hyun Park ,  Jae-Hee Oh ,  Se-Ho Lee ,  Won-Cheol Jeong

IPC分类号： H01L21/8234

CPC分类号： H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675

摘要： Integrated circuit devices are provided having a vertical diode therein. The devices include an integrated circuit substrate and an insulating layer on the integrated circuit substrate. A contact hole penetrates the insulating layer. A vertical diode is in a lower region of the contact hole and a bottom electrode in the contact hole has a bottom surface on a top surface of the vertical diode. The bottom electrode is self-aligned with the vertical diode. A top surface area of the bottom electrode is less than a horizontal section area of the contact hole. Methods of forming the integrated circuit devices and phase change memory cells are also provided.

摘要翻译： 在其中提供具有垂直二极管的集成电路器件。 这些器件包括集成电路衬底和集成电路衬底上的绝缘层。 接触孔穿透绝缘层。 垂直二极管位于接触孔的下部区域中，接触孔中的底部电极在垂直二极管的顶面具有底面。 底部电极与垂直二极管自对准。 底部电极的顶表面积小于接触孔的水平截面面积。 还提供了形成集成电路器件和相变存储器单元的方法。

公开(公告)号：US07372722B2

公开(公告)日：2008-05-13

申请号：US11263521

申请日：2005-10-31

申请人： Won-Cheol Jeong ,  Jae-Hyun Park

发明人： Won-Cheol Jeong ,  Jae-Hyun Park

IPC分类号： G11C11/00 ,  G11C11/34

CPC分类号： G11C11/15

摘要： Methods may be provided for operating a magnetic random access memory (MRAM device including a magnetic tunnel junction structure and a heat generating layer. More particularly, a write current may be provided through the magnetic tunnel junction structure and through the heat generating layer, and the write current may have a magnitude sufficient to change a program state of the magnetic tunnel junction structure. Related devices are also discussed.

摘要翻译： 可以提供用于操作磁性随机存取存储器（包括磁性隧道结结构和发热层的MRAM器件）的方法，更具体地说，可以通过磁性隧道结结构和通过发热层提供写入电流， 写入电流可能具有足以改变磁性隧道结结构的编程状态的量值，还讨论了相关器件。

公开(公告)号：US07307874B2

公开(公告)日：2007-12-11

申请号：US11177641

申请日：2005-07-08

申请人： Won-Cheol Jeong ,  Jae-Hyun Park

发明人： Won-Cheol Jeong ,  Jae-Hyun Park

IPC分类号： G11C11/14 ,  G11C11/15 ,  G11C11/16

CPC分类号： G11C11/15

摘要： A magnetic random access memory device may include a memory cell access transistor on a substrate, a bit line spaced apart from the substrate, and a magnetic tunnel junction structure electrically coupled between the bit line and the memory cell access transistor. At least one magnet may be positioned adjacent a sidewall of the magnetic tunnel junction structure and may be configured to provide a magnetic field through the magnetic tunnel junction structure. Related methods of operating magnetic random access memory devices are also discussed.

摘要翻译： 磁性随机存取存储器件可以包括衬底上的存储单元存取晶体管，与衬底间隔开的位线，以及电耦合在位线和存储单元存取晶体管之间的磁性隧道结结构。 至少一个磁体可以邻近磁性隧道结结构的侧壁定位，并且可以被配置为通过磁性隧道结结构提供磁场。 还讨论了操作磁随机存取存储器件的相关方法。

公开(公告)号：US20070155093A1

公开(公告)日：2007-07-05

申请号：US11586820

申请日：2006-10-26

申请人： Won-Cheol Jeong ,  Hyeong-Jun Kim ,  Se-Ho Lee ,  Jae-Hyun Park ,  Chang-Wook Jeong

发明人： Won-Cheol Jeong ,  Hyeong-Jun Kim ,  Se-Ho Lee ,  Jae-Hyun Park ,  Chang-Wook Jeong

IPC分类号： H01L21/336

CPC分类号： H01L45/06 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

摘要： A phase-change random-access memory (PRAM) device includes a chalcogenide element, the chalcogenide element comprising a material which can assume a crystalline state or an amorphous state upon application of a heating current. A first contact is connected to a first region of the chalcogenide element and has a first cross-sectional area. A second contact is connected to a second region of the chalcogenide element and having a second cross-sectional area. A first programmable volume of the chalcogenide material is defined in the first region of the chalcogenide element, a state of the first programmable volume being programmable according to a resistance associated with the first contact. A second programmable volume of the chalcogenide material is defined in the second region of the chalcogenide element, a state of the second programmable volume being programmable according to a second resistance associated with the second contact.

摘要翻译： 相变随机存取存储器（PRAM）装置包括硫族化物元素，硫族化物元素包括在施加加热电流时可以呈现结晶状态或非晶状态的材料。 第一触点连接到硫族化物元件的第一区域并且具有第一横截面积。 第二接触件连接到硫族化物元件的第二区域并且具有第二横截面积。 硫族化物材料的第一可编程体积被限定在硫族化物元素的第一区域中，第一可编程体积的状态可根据与第一接触相关联的电阻来编程。 硫族化物材料的第二可编程体积被限定在硫族化物元素的第二区域中，第二可编程体积的状态可根据与第二接触相关联的第二电阻来编程。

公开(公告)号：US20060228853A1

公开(公告)日：2006-10-12

申请号：US11388111

申请日：2006-03-23

申请人： Won-Cheol Jeong ,  Se-Ho Lee ,  Kyung-Chang Ryoo ,  Jae-Hyun Park

发明人： Won-Cheol Jeong ,  Se-Ho Lee ,  Kyung-Chang Ryoo ,  Jae-Hyun Park

IPC分类号： H01L21/8244 ,  H01L21/8234

CPC分类号： H01L43/12 ,  B82Y10/00 ,  H01L27/228 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675

摘要： A method of forming a memory device may include forming an insulating layer on a substrate, and forming a first electrode through at least a portion of the insulating layer. A memory storage element may be formed on the first electrode so that the first electrode is between the memory storage element and the substrate, and a second electrode may be formed on the memory storage element so that the memory storage element is between the first and second electrodes. After forming the memory storage element and after forming the second electrode, insulating spacers may be formed on sidewalls of the memory storage element. After forming the insulating spacers, an interconnection line may be formed on the second electrode, on the insulating spacers, and on the insulating layer beyond the insulating spacers. Related memory devices are also discussed.

摘要翻译： 形成存储器件的方法可以包括在衬底上形成绝缘层，以及通过绝缘层的至少一部分形成第一电极。 存储器存储元件可以形成在第一电极上，使得第一电极位于存储器存储元件和衬底之间，并且可以在存储器存储元件上形成第二电极，使得存储器存储元件位于第一和第二电极之间 电极。 在形成存储器元件之后，在形成第二电极之后，可以在存储器存储元件的侧壁上形成绝缘间隔物。 在形成绝缘间隔物之后，可以在第二电极，绝缘间隔物上以及绝缘层上形成互连线，超过绝缘间隔物。 还讨论了相关的存储器件。

公开(公告)号：US20060092698A1

公开(公告)日：2006-05-04

申请号：US11177641

申请日：2005-07-08

申请人： Won-Cheol Jeong ,  Jae-Hyun Park

发明人： Won-Cheol Jeong ,  Jae-Hyun Park

IPC分类号： G11C11/15

CPC分类号： G11C11/15

摘要： A magnetic random access memory device may include a memory cell access transistor on a substrate, a bit line spaced apart from the substrate, and a magnetic tunnel junction structure electrically coupled between the bit line and the memory cell access transistor. At least one magnet may be positioned adjacent a sidewall of the magnetic tunnel junction structure and may be configured to provide a magnetic field through the magnetic tunnel junction structure. Related methods of operating magnetic random access memory devices are also discussed.

摘要翻译： 磁性随机存取存储器件可以包括衬底上的存储单元存取晶体管，与衬底间隔开的位线以及电耦合在位线和存储单元存取晶体管之间的磁性隧道结结构。 至少一个磁体可以邻近磁性隧道结结构的侧壁定位，并且可以被配置为通过磁性隧道结结构提供磁场。 还讨论了操作磁随机存取存储器件的相关方法。

公开(公告)号：US20100044667A1

公开(公告)日：2010-02-25

申请号：US12612377

申请日：2009-11-04

申请人： Jae-Hyun Park ,  Jae-Hee Oh ,  Won-Cheol Jeong

发明人： Jae-Hyun Park ,  Jae-Hee Oh ,  Won-Cheol Jeong

IPC分类号： H01L47/00

CPC分类号： G11C11/16 ,  B82Y10/00 ,  G11C13/0004 ,  G11C2213/79 ,  H01L21/76819 ,  H01L27/228 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/16

摘要： A semiconductor device includes at least one phase-change pattern disposed on a semiconductor substrate. A planarized capping layer, a planarized protecting layer, and a planarized insulating layer are sequentially stacked to surround sidewalls of the at least one phase-change pattern. An interconnection layer pattern is disposed on the planarized capping layer, the planarized protecting layer, and the planarized insulating layer. The interconnection layer pattern is in contact with the phase-change pattern.

摘要翻译： 半导体器件包括设置在半导体衬底上的至少一个相变图案。 依次层叠有平面化覆盖层，平坦化保护层和平坦化绝缘层，以包围至少一个相变图案的侧壁。 互连层图案设置在平坦化覆盖层，平坦化保护层和平坦化绝缘层上。 互连层图案与相变图案接触。

公开(公告)号：US07667998B2

公开(公告)日：2010-02-23

申请号：US11507573

申请日：2006-08-22

申请人： Won-Cheol Jeong ,  Se-Ho Lee ,  Jae-Hyun Park ,  Chang-Wook Jeong

发明人： Won-Cheol Jeong ,  Se-Ho Lee ,  Jae-Hyun Park ,  Chang-Wook Jeong

IPC分类号： G11C11/00 ,  H01L27/16 ,  H01L21/20

CPC分类号： G11C13/0069 ,  G11C13/0004 ,  G11C2013/008 ,  G11C2213/52 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144

摘要： A PRAM and method of forming the same are disclosed. In various embodiments, the PRAM includes a lower insulation layer formed on a semiconductor substrate, a phase change material pattern formed on the lower insulation layer and a heating electrode contacting the phase change material pattern. The heating electrode can be formed of a material having a positive temperature coefficient such that specific resistance of the material increases as a function of temperature.

摘要翻译： 公开了一种PRAM及其制造方法。 在各种实施例中，PRAM包括形成在半导体衬底上的下绝缘层，形成在下绝缘层上的相变材料图案和与相变材料图案接触的加热电极。 加热电极可以由具有正温度系数的材料形成，使得材料的电阻率随着温度的升高而增加。