公开(公告)号：US06583063B1

公开(公告)日：2003-06-24

申请号：US09263634

申请日：1999-03-05

申请人： Anisul Khan ,  Dragan Podlesnik ,  Nam-Hun Kim ,  Gene Lee

发明人： Anisul Khan ,  Dragan Podlesnik ,  Nam-Hun Kim ,  Gene Lee

IPC分类号： H01L21302

CPC分类号： H01L21/32137

摘要： A method of etching silicon using a plasma generated from a gas comprising fluorine (F), oxygen (O), hydrogen (H) and carbon (C).

摘要翻译： 使用由包含氟（F），氧（O），氢（H）和碳（C）的气体产生的等离子体来蚀刻硅的方法。

公开(公告)号：US06954561B1

公开(公告)日：2005-10-11

申请号：US09907183

申请日：2001-07-16

申请人： Anisul Khan ,  Ajay Kumar

发明人： Anisul Khan ,  Ajay Kumar

IPC分类号： G02F1/01 ,  G02F1/313 ,  G02B6/12

CPC分类号： G02F1/0147 ,  G02F1/011 ,  G02F1/313

摘要： Thermo-optic devices including a bottom cladding layer, a patterned core material and a top cladding layer, each having a different refractive index, can be made by depositing a heater material, such as tungsten or chromium, on the outside of the bottom and/or top cladding layer. Depending on the refractive index differences between the cladding layers and the core layers, the amount of heater material can also be varied. The heater material can surround the cladding layers, can be present on the sidewalls and top only, or the sidewalls alone, to provide sufficient heat to change the refractive index of the layers and thus the path of light passing-through the device. These devices when built into the substrate can be connected to underlying devices for vertical integration, or connected to other devices and components formed on the same substrate for increased integration.

摘要翻译： 可以通过在底部和/或底部的外侧沉积诸如钨或铬的加热材料来形成包括底部包层，图案化芯材料和折射率不同的顶部包层的热光器件， 或上覆层。 取决于包覆层和芯层之间的折射率差异，加热器材料的量也可以变化。 加热器材料可以围绕包覆层，可以仅存在于侧壁和顶部或单独的侧壁上，以提供足够的热量来改变层的折射率，从而改变穿过该装置的光的路径。 当这些器件内置于基板中时，可以连接到底层器件以进行垂直整合，或者连接到形成在同一衬底上的其他器件和元件，以增加集成度。

公开(公告)号：US06696365B2

公开(公告)日：2004-02-24

申请号：US10041540

申请日：2002-01-07

申请人： Ajay Kumar ,  Anisul Khan ,  Sanjay Thekdi ,  Dragan V. Podlesnik

发明人： Ajay Kumar ,  Anisul Khan ,  Sanjay Thekdi ,  Dragan V. Podlesnik

IPC分类号： H01L21302

CPC分类号： H01L21/3081 ,  H01L21/0276 ,  H01L21/3065 ,  H01L21/31116

摘要： A method of etching high aspect ratio, anisotropic deep trench openings in a silicon substrate coated with a multilayer mask comprising in sequence a pad oxide layer, a silicon nitride layer, a doped or undoped silicon oxide hard mask layer, a polysilicon hard mask layer, an antireflection coating and a patterned photoresist layer in a single chamber comprising patterning the antireflection coating and hard mask layer, removing the photoresist and antireflection layers with oxygen, using the patterned polysilicon as a hard mask layer etching an opening in the silicon oxide hard mask layer, the silicon nitride layer and the pad oxide layer, removing the polysilicon hard mask layer with CF4/CHF3, and etching an anisotropic deep trench in the silicon substrate using the patterned silicon oxide hard mask layer as a mask and an etchant mixture including nitrogen trifluoride that self-cleans the chamber.

摘要翻译： 一种在涂覆有多层掩模的硅衬底中蚀刻高纵横比的各向异性深沟槽开口的方法，其中依次包括衬垫氧化物层，氮化硅层，掺杂或未掺杂的氧化硅硬掩模层，多晶硅硬掩模层， 抗反射涂层和图案化的光致抗蚀剂层，其包括使抗反射涂层和硬掩模层图案化，用氧去除光致抗蚀剂和抗反射层，使用图案化多晶硅作为蚀刻氧化硅硬掩模层中的开口的硬掩模层 ，氮化硅层和焊盘氧化物层，用CF4 / CHF3去除多晶硅硬掩模层，并使用图案化的氧化硅硬掩模层作为掩模蚀刻硅衬底中的各向异性深沟槽，以及包括三氟化氮的蚀刻剂混合物 自我清理的房间。

公开(公告)号：US06471833B2

公开(公告)日：2002-10-29

申请号：US09853847

申请日：2001-05-11

申请人： Ajay Kumar ,  Anisul Khan ,  Jeffrey D Chin ,  Dragan V Podlesnik

发明人： Ajay Kumar ,  Anisul Khan ,  Jeffrey D Chin ,  Dragan V Podlesnik

IPC分类号： C23C1434

CPC分类号： H01L21/67069 ,  H01J37/321 ,  H01J37/32935 ,  H01L21/3065

摘要： This invention is directed to a method for rapid plasma etching of materials which are difficult to etch at a high rate. The method is particularly useful in plasma etching silicon nitride layers more than five microns thick. The method includes the use of a plasma source gas that includes an etchant gas and a sputtering gas. Two separate power sources are used in the etching process and the power to each power source as well as the ratio between the flow rates of the etchant gas and sputtering gas can be advantageously adjusted to obtain etch rates of silicon nitride greater than two microns per minute. Additionally, an embodiment of the method of the invention provides a two etch step process which combines a high etch rate process with a low etch rate process to achieve high throughput while minimizing the likelihood of damage to underlying layers. The first etch step of the two-step method provides a high etch rate of about two microns per minute to remove substantially all of a layer to be etched. In the second step, a low etch rate process having an etch rate below about two microns per minute is used to remove any residual material not removed by the first etch step.

摘要翻译： 本发明涉及用于快速等离子体蚀刻难以高速蚀刻的材料的方法。 该方法在等离子体蚀刻中超过5微米厚的氮化硅层特别有用。 该方法包括使用包括蚀刻剂气体和溅射气体的等离子体源气体。 在蚀刻工艺中使用两个单独的电源，并且可以有利地调整蚀刻剂气体和溅射气体的流量之间的比例，以获得大于每分钟2微米的氮化硅的蚀刻速率 。 另外，本发明的方法的一个实施例提供了两个蚀刻步骤方法，其将高蚀刻速率工艺与低蚀刻速率工艺组合以实现高通量，同时最小化对下层的损伤的可能性。 两步法的第一蚀刻步骤提供了每分钟约2微米的高蚀刻速率，以便基本上除去所有待蚀刻的层。 在第二步骤中，使用蚀刻速率低于每分钟约2微米的低蚀刻速率工艺来去除通过第一蚀刻步骤未被去除的任何残留材料。

公开(公告)号：US06642151B2

公开(公告)日：2003-11-04

申请号：US10093050

申请日：2002-03-06

申请人： Anisul Khan ,  Ajay Kumar ,  Padmapani Nallan

发明人： Anisul Khan ,  Ajay Kumar ,  Padmapani Nallan

IPC分类号： H01L21302

CPC分类号： H01L21/3065 ,  G02B6/136

摘要： The present invention provides novel etching techniques for etching Si—Ge, employing SF6/fluorocarbon etch chemistries at a low bias power. These plasma conditions are highly selective to organic photoresist. The techniques of the present invention are suitable for fabricating optically smooth Si—Ge surfaces. A cavity was etched in a layer of a first Si—Ge composition using SF6/C4F8 etch chemistry at low bias power. The cavity was then filled with a second Si—Ge composition having a higher refractive index than the first Si—Ge composition. A waveguide was subsequently fabricated by depositing a cladding layer on the second Si—Ge composition that was formed in the cavity. In a further embodiment a cluster tool is employed for executing processing steps of the present invention inside the vacuum environment of the cluster tool. In an additional embodiment a manufacturing system is provided for fabricating waveguides of the present invention. The manufacturing system includes a controller that is adapted for interacting with a plurality of fabricating stations.

摘要翻译： 本发明提供了用于蚀刻Si-Ge的新颖蚀刻技术，其采用SF6 /氟碳蚀刻化学品，以低偏压功率。 这些等离子体条件对有机光致抗蚀剂具有高选择性。 本发明的技术适用于制造光学平滑的Si-Ge表面。 在低偏压功率下，使用SF6 / C4F8蚀刻化学法在第一Si-Ge组合物的层中蚀刻空腔。 然后用具有比第一Si-Ge组合物更高的折射率的第二Si-Ge组合物填充空腔。 随后通过在形成在空腔中的第二Si-Ge组合物上沉积包覆层来制造波导。 在另一个实施例中，采用集群工具来在集群工具的真空环境内执行本发明的处理步骤。 在另外的实施例中，提供制造系统用于制造本发明的波导。 该制造系统包括适于与多个制造站相互作用的控制器。

公开(公告)号：US06303513B1

公开(公告)日：2001-10-16

申请号：US09326334

申请日：1999-06-07

申请人： Anisul Khan ,  Ajay Kumar ,  Dragan V. Podlesnik ,  Jeffrey D. Chinn

发明人： Anisul Khan ,  Ajay Kumar ,  Dragan V. Podlesnik ,  Jeffrey D. Chinn

IPC分类号： H01L2100

CPC分类号： H01L21/67069 ,  H01J37/321 ,  H01J37/3299 ,  H01L21/3065

摘要： A method for controlling a profile of a structure formed on a substrate using nitrogen trifluoride (NF3) in a high density plasma (HDP) process. Changing the amount of NF3 in the plasma controls the profile of the structure. It has been found that the best results are obtained with an inductively coupled plasma wherein the ion density is at least 1012 ions/cm3. The method is particularly suited to etch processes such as deep trench etch in silicon wafers.

摘要翻译： 一种用于在高密度等离子体（HDP）工艺中使用三氟化氮（NF 3）在基板上形成的结构的轮廓进行控制的方法。 改变等离子体中NF3的量控制结构的轮廓。 已经发现，使用电感耦合等离子体获得最佳结果，其中离子密度为至少1012离子/ cm3。 该方法特别适用于蚀刻诸如硅晶片中的深沟槽蚀刻的工艺。

公开(公告)号：US20050211664A1

公开(公告)日：2005-09-29

申请号：US11130553

申请日：2005-05-16

申请人： Anisul Khan ,  Ajay Kumar

发明人： Anisul Khan ,  Ajay Kumar

IPC分类号： G02B6/12 ,  G02B6/122 ,  G02B6/30 ,  B29D11/00

CPC分类号： G02B6/122 ,  G02B6/30 ,  G02B2006/12061 ,  G02B2006/12078 ,  G02B2006/12176

摘要： Embodiments of optical waveguides and method for their fabrication are provided herein. In one embodiment, a method of making an optical waveguide, includes the steps of providing a substrate comprising a semiconductor layer disposed on a first insulating layer. A hard mask is formed on the semiconductor layer. An opening is then etched in the semiconductor layer to expose a portion of the first insulating layer using the hard mask. A core material is deposited on the first insulating layer to fill the opening. The core material is then planarized and the hard mask removed. A top cladding layer is finally deposited over the core material.

摘要翻译： 本文提供光波导的实施例及其制造方法。 在一个实施例中，制造光波导的方法包括提供包括设置在第一绝缘层上的半导体层的衬底的步骤。 在半导体层上形成硬掩模。 然后在半导体层中蚀刻开口，以使用硬掩模露出第一绝缘层的一部分。 芯材沉积在第一绝缘层上以填充开口。 然后将芯材料平坦化并除去硬掩模。 顶层包层最终沉积在芯材上。

公开(公告)号：US06642127B2

公开(公告)日：2003-11-04

申请号：US10035372

申请日：2001-10-19

申请人： Ajay Kumar ,  Padmapani C. Nallan ,  Anisul Khan ,  Dragan V. Podlesnik

发明人： Ajay Kumar ,  Padmapani C. Nallan ,  Anisul Khan ,  Dragan V. Podlesnik

IPC分类号： H01L21301

CPC分类号： H01L21/304 ,  H01L21/78

摘要： A method and apparatus for dicing a semiconductor wafer using a plasma etch process. The method begins by applying a patterned mask to the integrated circuits on a wafer. The pattern covers the circuits and exposes the streets between the dice. Next, the method deposits a uniform layer of adhesive material upon a carrier wafer. The wafer to be diced is affixed to the carrier wafer via the adhesive material that is sandwiched between the bottom surface of the wafer to be diced and the top surface of the carrier wafer. The combination assembly of the carrier wafer, adhesive and wafer to be diced is placed in an etch reactor that is capable of etching silicon. When the reactive gas is applied to the combination assembly, the etch plasma will consume the unprotected silicon within the streets and dice the wafer into individual integrated circuit chips. The carrier wafer is then removed from the etch chamber with the dice still attached to the adhesive layer. A well-known process is used to remove the adhesive material as well as any mask material and detach the dice from the carrier wafer.

摘要翻译： 一种使用等离子体蚀刻工艺对半导体晶片进行切割的方法和装置。 该方法开始于将图案化掩模应用于晶片上的集成电路。 模式涵盖电路并暴露骰子之间的街道。 接下来，该方法将均匀的粘合剂材料层沉积在载体晶片上。 要切割的晶片通过夹在要切割的晶片的底表面和载体晶片的顶表面之间的粘合剂材料固定到载体晶片上。 将要切割的载体晶片，粘合剂和晶片的组合组件放置在能够蚀刻硅的蚀刻反应器中。 当将反应性气体施加到组合组件时，蚀刻等离子体将消耗街道内的未受保护的硅，并将晶片切割成单独的集成电路芯片。 然后将载体晶片从蚀刻室移除，其中骰子仍附着到粘合剂层。 使用众所周知的方法去除粘合剂材料以及任何掩模材料，并将骰子从载体晶片上分离。

公开(公告)号：US06491835B1

公开(公告)日：2002-12-10

申请号：US09467560

申请日：1999-12-20

申请人： Ajay Kumar ,  Anisul Khan ,  Wei Liu ,  John Chao ,  Jeff Chinn

发明人： Ajay Kumar ,  Anisul Khan ,  Wei Liu ,  John Chao ,  Jeff Chinn

IPC分类号： H01L2100

CPC分类号： H01L21/3081

摘要： The present disclosure provides a method for etching trenches, contact vias, or similar features to a depth of 100 &mgr;m and greater while permitting control of the etch profile (the shape of the sidewalls surrounding the etched opening). The method requires the use of a metal-comprising masking material in combination with a fluorine-comprising plasma etchant. The byproduct produced by a combination of the metal with reactive fluorine species must be essentially non-volatile under etch process conditions, and sufficiently non-corrosive to features on the substrate being etched, that the substrate remains unharmed by the etch process. Although aluminum is a preferred metal for the metal-comprising mask, other metals can be used for the masking material, so long as they produce an essentially non-volatile, non-corrosive etch byproduct under etch process conditions. By way of example, and not by way of limitation, metallic materials recommended for the mask include aluminum, cadmium, copper, chromium, gallium, indium, iron, magnesium, manganese, nickel, and combinations thereof. In particular, aluminum in combination with copper or magnesium is particularly useful, where the copper or magnesium content is less than about 8% by weight, and other constituents total less than about 2% by weight. The plasma feed gas includes at least one fluorine-containing compound such as nitrogen trifluoride (NF3), carbon tetrafluoride (CF4), and sulfur hexafluoride (SF6), by way of example and not by way of limitation. Oxygen (O2), or an oxygen-comprising compound, or hydrogen bromide (HBr), or a combination thereof may be added to the plasma feed gases to help provide a protective layer over etched sidewalls, assisting in profile control of the etched feature.

摘要翻译： 本公开提供了一种用于将沟槽，接触通孔或类似特征蚀刻至100μm和更大深度的方法，同时允许控制蚀刻轮廓（围绕蚀刻开口的侧壁的形状）。 该方法需要使用含金属的掩模材料与含氟等离子体蚀刻剂的组合。 由金属与反应性氟物质的组合产生的副产物在蚀刻工艺条件下必须基本上是非挥发性的，并且对被蚀刻的衬底上的特征具有足够的非腐蚀性，衬底保持不受蚀刻过程的伤害。 虽然铝是用于含金属掩模的优选金属，但是其它金属可以用于掩模材料，只要它们在蚀刻工艺条件下产生基本上非挥发性，非腐蚀性的蚀刻副产物即可。 作为示例而非限制，推荐用于掩模的金属材料包括铝，镉，铜，铬，镓，铟，铁，镁，锰，镍及其组合。 特别地，与铜或镁组合的铝是特别有用的，其中铜或镁含量小于约8重量％，其它组分总计小于约2重量％。 作为示例而非限制，等离子体进料气体包括至少一种含氟化合物如三氟化氮（NF 3），四氟化碳（CF 4）和六氟化硫（SF 6）。 可以将氧（O 2）或含氧化合物或溴化氢（HBr）或其组合添加到等离子体进料气体中以帮助在蚀刻的侧壁上提供保护层，有助于蚀刻特征的轮廓控制。

公开(公告)号：US20060032833A1

公开(公告)日：2006-02-16

申请号：US10915519

申请日：2004-08-10

申请人： Mark Kawaguchi ,  Thorsten Lill ,  Anisul Khan

发明人： Mark Kawaguchi ,  Thorsten Lill ,  Anisul Khan

IPC分类号： B44C1/22

CPC分类号： H01L21/0206 ,  H01L21/02063 ,  H01L21/02071 ,  H01L21/32136

摘要： A method of etching is provided that includes transferring a substrate into a vacuum environment, etching a material layer on the substrate and depositing a polymeric film encapsulating etch residues on the substrate without removing the substrate from the vacuum environment.

摘要翻译： 提供了一种蚀刻方法，其包括将衬底转移到真空环境中，蚀刻衬底上的材料层并且在衬底上沉积封装蚀刻残留物的聚合物膜，而不从真空环境中移除衬底。