公开(公告)号：US5371713A

公开(公告)日：1994-12-06

申请号：US207677

申请日：1994-03-09

申请人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

发明人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

IPC分类号： G11C11/413 ,  G11C7/00 ,  G11C7/06 ,  G11C7/10 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  G11C11/34 ,  G11C11/414 ,  G11C11/417 ,  H03K19/0944

CPC分类号： G11C7/1057 ,  G11C7/00 ,  G11C7/062 ,  G11C7/1051 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1096 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  H03K19/09448

摘要： In order to provide high speed and low power consumption, a semiconductor integrated circuit is constructed to utilize both CMOS elements and bipolar transistors. The bipolar transistors are used in the output portions to take advantage of their speed of operation to allow rapid charging and discharging of output lines. In the meantime, the principal operating portions of the circuit use CMOS elements of low power consumption. This arrangement is particularly advantageous in memory circuits.

公开(公告)号：US5042010A

公开(公告)日：1991-08-20

申请号：US520620

申请日：1990-05-08

申请人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

发明人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

IPC分类号： G11C11/413 ,  G11C7/00 ,  G11C7/06 ,  G11C7/10 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  G11C11/34 ,  G11C11/414 ,  G11C11/417 ,  H03K19/0944

CPC分类号： G11C7/1057 ,  G11C7/00 ,  G11C7/062 ,  G11C7/1051 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1096 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  H03K19/09448

摘要： In order to provide high speed and lower power consumption, a semiconductor integrated circuit is constructed to utilize both CMOS elements and bipolar transistors. The bipolar transistors are used in the output portions to take advantage of their speed of operation to allow rapid charging and discharging of output lines. In the meantime, the principal operating portiosn of the circuit use CMOS elements of lower power consumption. This arrangement is particulary advantageous in memory circuits.

公开(公告)号：US4924439A

公开(公告)日：1990-05-08

申请号：US358262

申请日：1989-05-30

申请人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

发明人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

IPC分类号： G11C11/413 ,  G11C7/00 ,  G11C7/06 ,  G11C7/10 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  G11C11/34 ,  G11C11/414 ,  G11C11/417 ,  H03K19/0944

CPC分类号： G11C7/1057 ,  G11C7/00 ,  G11C7/062 ,  G11C7/1051 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1096 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  H03K19/09448

摘要： In order to provide high speed and low power consumption, a semiconductor integrated circuit is constructed to utilize both CMOS elements and bipolar transistors. The bipolar transistors are used in the output portions to take advantage of their speed of operation to allow rapid charging and discharging of output lines. In the meantime, the principal operating portions of the circuit use CMOS elements of low power consumption. This arrangement is particularly advantageous in memory circuits.

公开(公告)号：US4858189A

公开(公告)日：1989-08-15

申请号：US121914

申请日：1987-11-17

申请人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

发明人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

IPC分类号： G11C11/413 ,  G11C7/00 ,  G11C7/06 ,  G11C7/10 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  G11C11/34 ,  G11C11/414 ,  G11C11/417 ,  H03K19/0944

CPC分类号： G11C7/1057 ,  G11C7/00 ,  G11C7/062 ,  G11C7/1051 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1096 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  H03K19/09448

摘要： In order to provide high speed and low power consumption, a semiconductor integrated circuit is constructed to utilize both CMOS elements and bipolar transistors. The bipolar transistors are used in the output portions to take advantage of their speed of operation to allow rapid charging and discharging of output lines. In the meantime, the principal operating portions of the circuit use CMOS elements of low power consumption. This arrangement is particularly advantageous in memory circuits.

摘要翻译： 为了提供高速度和低功耗，构造半导体集成电路以利用CMOS元件和双极晶体管。 双极晶体管用于输出部分以利用其运行速度，以允许输出线的快速充电和放电。 同时，电路的主要工作部分使用低功耗的CMOS元件。 这种布置在存储器电路中是特别有利的。

公开(公告)号：US4713796A

公开(公告)日：1987-12-15

申请号：US701226

申请日：1985-02-13

申请人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

发明人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

IPC分类号： G11C11/413 ,  G11C7/00 ,  G11C7/06 ,  G11C7/10 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  G11C11/34 ,  G11C11/414 ,  G11C11/417 ,  H03K19/0944

CPC分类号： G11C7/1057 ,  G11C7/00 ,  G11C7/062 ,  G11C7/1051 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1096 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  H03K19/09448

摘要： In order to provide high speed and low power consumption, a semiconductor integrated circuit is constructed to utilize both CMOS elements and bipolar transistors. The bipolar transistors are used in the output portions to take advantage of their speed of operation to allow rapid charging and discharging of output lines. In the meantime, the principal operating portions of the circuit use CMOS elements of low power consumption. This arrangement is particularly advantageous in memory circuits.

摘要翻译： 为了提供高速度和低功耗，构造半导体集成电路以利用CMOS元件和双极晶体管。 双极晶体管用于输出部分以利用其运行速度，以允许输出线的快速充电和放电。 同时，电路的主要工作部分使用低功耗的CMOS元件。 这种布置在存储器电路中是特别有利的。

公开(公告)号：US5311482A

公开(公告)日：1994-05-10

申请号：US93511

申请日：1993-07-16

申请人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

发明人： Katsumi Ogiue ,  Yukio Suzuki ,  Ikuro Masuda ,  Masanori Odaka ,  Hideaki Uchida

IPC分类号： G11C11/413 ,  G11C7/00 ,  G11C7/06 ,  G11C7/10 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  G11C11/34 ,  G11C11/414 ,  G11C11/417 ,  H03K19/0944

CPC分类号： G11C7/1057 ,  G11C7/00 ,  G11C7/062 ,  G11C7/1051 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1096 ,  G11C7/12 ,  G11C8/00 ,  G11C8/06 ,  G11C8/08 ,  G11C8/10 ,  G11C8/18 ,  H03K19/09448

摘要： In order to provide high speed and low power consumption, a semiconductor integrated circuit is constructed to utilize both CMOS elements and bipolar transistors. The bipolar transistors are used in the output portions to take advantage of their speed of operation to allow rapid charging and discharging of output lines. In the meantime, the principal operating portions of the circuit use CMOS elements of low power consumption. This arrangement is particularly advantageous in memory circuits.

摘要翻译： 为了提供高速度和低功耗，构造半导体集成电路以利用CMOS元件和双极晶体管。 双极晶体管用于输出部分以利用其运行速度，以允许输出线的快速充电和放电。 同时，电路的主要工作部分使用低功耗的CMOS元件。 这种布置在存储器电路中是特别有利的。

公开(公告)号：US20060126686A1

公开(公告)日：2006-06-15

申请号：US11294698

申请日：2005-12-05

申请人： Yukio Suzuki

发明人： Yukio Suzuki

IPC分类号： H01S3/16

CPC分类号： G03B21/208 ,  G03B33/10 ,  H04N9/3152

摘要： A light source unit including a mirror tunnel which has a prism-like shape and of which external sides are formed to taper and a light source made up of a light emitting device which is disposed on a side of the mirror tunnel. To provide a light source unit which is made small in size while enabling the installation therein of a larger number of light emitting devices such as LED's which constitute a light source than a conventional light source unit, as well as the expansion of a usable range of light radiated from the light emitting devices and a projector system utilizing the light source unit.

摘要翻译： 一种光源单元，包括具有棱镜形状并且其外侧形成为锥形的反射镜通道，以及由设置在镜面通道侧的发光器件构成的光源。 为了提供一种尺寸小的光源单元，同时能够在其中安装比常规光源单元更多数量的构成光源的LED的发光装置，以及可扩展的可用范围 从发光装置照射的光和利用光源单元的投影仪系统。

公开(公告)号：US20050208301A1

公开(公告)日：2005-09-22

申请号：US11028227

申请日：2005-01-04

申请人： Tetsushi Okamoto ,  Hiroyoshi Tsuchiya ,  Fumio Sawa ,  Noriyuki Iwata ,  Mitsuhiko Koyama ,  Yukio Suzuki ,  Akihiko Suzuki ,  Tooru Ootaka ,  Shigehito Ishii ,  Susumu Nagano

发明人： Tetsushi Okamoto ,  Hiroyoshi Tsuchiya ,  Fumio Sawa ,  Noriyuki Iwata ,  Mitsuhiko Koyama ,  Yukio Suzuki ,  Akihiko Suzuki ,  Tooru Ootaka ,  Shigehito Ishii ,  Susumu Nagano

IPC分类号： B32B5/16 ,  H01B3/00 ,  H01B3/30

CPC分类号： H01B3/006 ,  H01B3/30 ,  Y10T428/25 ,  Y10T428/256 ,  Y10T428/2982 ,  Y10T428/2991 ,  Y10T428/2993 ,  Y10T428/2998

摘要： The present invention provides a solution to the above-described drawbacks, and more specifically, as the tape-like or sheet-like insulation member, the resin matrix in which the first particles having a heat conductivity of 1 W/mK or higher and 300 W/mK or lower, that are diffused in the resin matrix, and the second particles having a heat conductivity of 0.5 W/mK or higher and 300 W/mK or lower, are diffused, is employed.

摘要翻译： 本发明提供了上述缺点的解决方案，更具体地说，作为带状或片状绝缘部件，其中第一颗粒的导热率为1W / mK以上且300以下的树脂基体 W / mK以下，散布在树脂基体中，并且具有0.5W / m·K以上且300W / m·K以下的导热率的第二粒子被扩散。

公开(公告)号：US06840842B2

公开(公告)日：2005-01-11

申请号：US10316915

申请日：2002-12-12

申请人： Miyoko Hirai ,  Yukio Suzuki ,  Kazuo Irobe ,  Takanobu Haruki ,  Yoshihiro Suzuki ,  Naohiko Shimono ,  Hiroki Kanamaru

发明人： Miyoko Hirai ,  Yukio Suzuki ,  Kazuo Irobe ,  Takanobu Haruki ,  Yoshihiro Suzuki ,  Naohiko Shimono ,  Hiroki Kanamaru

IPC分类号： B24D13/14 ,  B24B1/00

CPC分类号： B24D13/147

摘要： An objective of the present invention is to provide a burnishing pad, capable of removing dirt by burnishing a place (i.e., a dirty point) onto which dirt attaches to impart sufficient luster, and being biodegraded; a burnishing machine equipped with the burnishing pad; and a burnishing method using the burnishing pad. The burnishing pad of the invention is comprised of a lock-like fiber composite in which adjacent fibers are bonded at intersection thereof, wherein said fiber is at least one selected from the group consisting of a vegetable fiber and an animal fiber. And another burnishing pad is a fiber composite comprised of thick fibers of 150 μm or more in fiber diameter. These pads can be equipped with a porous supporting layer, respectively. The porous supporting layer has a mean 5% modulus strength of 20 N/5 cm width or more at 70° C. and a unit area weight of 100 g/m2 or less.

摘要翻译： 本发明的目的是提供一种抛光垫，其能够通过抛光污垢附着在其上的地方（即，脏点）去除污垢以赋予足够的光泽并被生物降解; 配有抛光垫的抛光机; 以及使用抛光垫的抛光方法。 本发明的抛光垫由相邻的纤维在其相交处结合的锁状纤维复合体构成，其中所述的纤维是选自植物纤维和动物纤维中的至少一种。 另一种抛光垫是由纤维直径为150μm或更大的粗纤维组成的纤维复合材料。 这些垫可分别装有多孔支撑层。 多孔支持层在70℃下的平均5％模量强度为20N / 5cm以上，单位面积重量为100g / m 2以下。

公开(公告)号：US06794523B2

公开(公告)日：2004-09-21

申请号：US10245167

申请日：2002-09-17

申请人： Robert A. Holton ,  Ki-byung Chai ,  Hamid Idmoumaz ,  Hossain Nadizadeh ,  Kasthuri Rengan ,  Yukio Suzuki ,  Chunlin Tao

发明人： Robert A. Holton ,  Ki-byung Chai ,  Hamid Idmoumaz ,  Hossain Nadizadeh ,  Kasthuri Rengan ,  Yukio Suzuki ,  Chunlin Tao

IPC分类号： C07D30514

CPC分类号： C07D405/12 ,  C07C227/22 ,  C07C231/12 ,  C07C233/87 ,  C07C2601/14 ,  C07C2601/16 ,  C07C2603/62 ,  C07D205/08 ,  C07D305/14 ,  C07D407/12 ,  C07D407/14 ,  C07D409/12 ,  C07D409/14 ,  C07F7/003 ,  C07F7/1804

摘要： Taxane derivatives having an alkoxy, alkenoxy or aryloxy substituted C13 side chain.

摘要翻译： 具有烷氧基，烯氧基或芳氧基取代的C13侧链的紫杉烷衍生物。