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    Semiconductor memory device
    1.
    发明授权
    Semiconductor memory device 失效
    半导体存储器件

    公开(公告)号：US06208010B1

    公开(公告)日：2001-03-27

    申请号：US08574110

    申请日：1995-12-18

    申请人： Shinji Nakazato ,  Hideaki Uchida ,  Yoshikazu Saito ,  Masahiro Yamamura ,  Yutaka Kobayashi ,  Takahide Ikeda ,  Ryoichi Hori ,  Goro Kitsukawa ,  Kiyoo Itoh ,  Nobuo Tanba ,  Takao Watanabe ,  Katsuhiro Shimohigashi ,  Noriyuki Homma

    发明人： Shinji Nakazato ,  Hideaki Uchida ,  Yoshikazu Saito ,  Masahiro Yamamura ,  Yutaka Kobayashi ,  Takahide Ikeda ,  Ryoichi Hori ,  Goro Kitsukawa ,  Kiyoo Itoh ,  Nobuo Tanba ,  Takao Watanabe ,  Katsuhiro Shimohigashi ,  Noriyuki Homma

    IPC分类号： H01L2900

    CPC分类号： H01L27/10805 ,  H01L27/0214 ,  H01L27/0218 ,  H01L27/0623 ,  H01L27/0922 ,  H01L27/105 ,  Y10S257/901 ,  Y10S257/904

    摘要： Disclosed is a semiconductor device, such as a semiconductor memory device, having structure wherein invasion of minority carriers from the semiconductor substrate into components of the device, formed on the substrate, can be avoided. The semiconductor memory device can be an SRAM or DRAM, for example, and includes a memory array and peripheral circuit on a substrate. In one aspect of the present invention, a buried layer of the same conductivity type as that of the substrate, but with a higher impurity concentration than that of the substrate, is provided beneath at least one of the peripheral circuit and memory array. A further region can extend from the buried layer, for example, to the surface of the semiconductor substrate, the buried layer and further region in combination acting as a shield to prevent minority carriers from penetrating to the device elements. As a second aspect of the present invention, first carrier absorbing areas (to absorb minority carriers) are located between the memory array and the switching circuit of the peripheral circuit, and second carrier absorbing areas are provided to surround input protective elements of the device. As a third embodiment of the present invention, a plurality of isolation regions of the same conductivity type are provided, with unequal voltages applied to these isolation regions, or unequal voltages applied to the substrate, on the one hand, and to these isolation regions, on the other.

    摘要翻译： 公开了一种半导体器件，例如半导体存储器件，其结构可以避免少数载流子从半导体衬底侵入形成在衬底上的器件的部件。 半导体存储器件例如可以是SRAM或DRAM，并且在衬底上包括存储器阵列和外围电路。 在本发明的一个方面中，在外围电路和存储器阵列中的至少一个之下提供与衬底相同的导电类型但具有比衬底的杂质浓度更高的杂质浓度的掩埋层。 另外的区域可以例如从掩埋层延伸到半导体衬底的表面，掩埋层和组合的另外的区域用作屏蔽以防止少数载流子穿透到器件元件。 作为本发明的第二方面，第一载流子吸收区域（以吸收少数载流子）位于存储器阵列和外围电路的开关电路之间，并且第二载流子吸收区域被设置为环绕该器件的输入保护元件。 作为本发明的第三实施例，提供了相同导电类型的多个隔离区域，一方面施加到这些隔离区域的不同电压或施加到基板的不同电压以及这些隔离区域， 在另一。

    Circuit for driving a liquid crystal display
    2.
    发明授权
    Circuit for driving a liquid crystal display 失效
    用于驱动液晶显示器的电路

    公开(公告)号：US6166726A

    公开(公告)日：2000-12-26

    申请号：US66770

    申请日：1998-04-27

    申请人： Hideaki Uchida ,  Kouji Ohhashi

    发明人： Hideaki Uchida ,  Kouji Ohhashi

    IPC分类号： G02F1/133 ,  G09G3/18 ,  G09G3/36 ,  H01L29/786 ,  G09G5/00

    CPC分类号： G09G3/3696 ,  G09G2320/0247 ,  G09G2330/02

    摘要： A power supply applies a power-supply voltage VDD to operate an LCD driver circuit. A booster circuit increases the power-supply voltage VDD, generating an LCD-driving voltage VLDC. When the power-supply voltage VDD is equal to or higher than a predetermined voltage, a power-supply voltage detecting circuit outputs the LCD-driving voltage VLCD to a switch circuit. The switch circuit disconnects the line for applying the voltage VLCD, from the line for applying a reference voltage GND. When the power-supply voltage VDD is lower than the predetermined voltage, the power-supply voltage detecting circuit outputs an indefinite voltage to the switch circuit. In this case, the switch circuit short-circuits the line for applying the voltage VLCD, to the line for applying the reference voltage GND. This prevents undesired phenomena, such as flickering, from occurring on the screen of the liquid crystal display, even if the application of power-supply voltage VDD is interrupted.

    摘要翻译： 电源施加电源电压VDD以操作LCD驱动器电路。 升压电路增加电源电压VDD，产生LCD驱动电压VLDC。 当电源电压VDD等于或高于预定电压时，电源电压检测电路将LCD驱动电压VLCD输出到开关电路。 开关电路从用于施加参考电压GND的线路断开施加电压VLCD的线路。 当电源电压VDD低于预定电压时，电源电压检测电路向开关电路输出不定电压。 在这种情况下，开关电路将用于施加电压VLCD的线路短路到用于施加参考电压GND的线路。 这防止了液晶显示器的屏幕上出现不期望的现象，例如闪烁，即使电源电压VDD的施加被中断。

    Semiconductor device
    3.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US5619151A

    公开(公告)日：1997-04-08

    申请号：US473742

    申请日：1995-06-07

    申请人： Takashi Akioka ,  Masahiro Iwamura ,  Atsushi Hiraishi ,  Yuji Yokoyama ,  Nozomu Matsuzaki ,  Tatsumi Yamauchi ,  Yutaka Kobayashi ,  Nobuyuki Gotou ,  Akira ide ,  Masahiro Yamamura ,  Hideaki Uchida

    发明人： Takashi Akioka ,  Masahiro Iwamura ,  Atsushi Hiraishi ,  Yuji Yokoyama ,  Nozomu Matsuzaki ,  Tatsumi Yamauchi ,  Yutaka Kobayashi ,  Nobuyuki Gotou ,  Akira ide ,  Masahiro Yamamura ,  Hideaki Uchida

    IPC分类号： G11C7/10 ,  G11C8/06 ,  G11C8/10 ,  G11C8/18 ,  H03K5/1534 ,  H03K19/0175 ,  H03K5/153 ,  G01R29/02 ,  H03K3/033

    CPC分类号： G11C7/1057 ,  G11C7/1051 ,  G11C8/06 ,  G11C8/10 ,  G11C8/18 ,  H03K19/017518 ,  H03K5/1534

    摘要： A semiconductor memory device which includes at least one of (1) an input buffer circuit which generates internal address signals in response to an incoming address; (2) a decoder circuit formed of plural logic gates each of which is composed of the combination of MOS and bipolar circuitry; (3) a sense amplifier circuit including a multiemitter transistor; (4) a signal or address transition detector circuit which includes input circuits each receiving, for example, an address signal of a voltage amplitude and outputting a current amplitude signal in response to a change in level of the address signal, and a detector circuit connected thereto which has a cascode amplifier arranged such that it receives current amplitude signals at an input thereof and in which the cascode amplifier input is maintained at a substantially constant voltage, in which the detection circuit detects a transition of one or more of the current amplitude signals and, in response thereto, generates an ATD signal of a voltage amplitude; and (5) an output buffer circuit, in which the decoder, sense amplifier and output buffer of the device are controlled in accordance with signals from a clock generator, which is responsive to the ATD signal.

    摘要翻译： 一种半导体存储器件，包括以下中的至少一个：（1）响应于输入地址产生内部地址信号的输入缓冲器电路; （2）由多个逻辑门形成的解码器电路，每个逻辑门由MOS和双极电路的组合组成; （3）包括多端子晶体管的读出放大器电路; （4）信号或地址转换检测器电路，其包括各自接收例如电压幅度的地址信号并且响应于地址信号的电平的变化而输出当前振幅信号的输入电路，以及连接的检测器电路 具有共源共栅放大器，其布置成使得其在其输入处接收电流幅度信号，并且其中共源共栅放大器输入保持在基本上恒定的电压，其中检测电路检测到一个或多个当前幅度信号的转变 并且响应于此产生电压幅度的ATD信号; 以及（5）输出缓冲器电路，其中根据响应于ATD信号的时钟发生器的信号来控制器件的解码器，读出放大器和输出缓冲器。

    Method for screening human ABO blood group-binding lactobacilli
    7.
    发明授权
    Method for screening human ABO blood group-binding lactobacilli 有权
    筛选人ABO血型结合乳杆菌的方法

    公开(公告)号：US08465933B2

    公开(公告)日：2013-06-18

    申请号：US12987518

    申请日：2011-01-10

    申请人： Tadao Saito ,  Yasushi Kawai ,  Hideaki Uchida ,  Katsunori Kimura ,  Kakuhei Isawa ,  Keisuke Furuichi

    发明人： Tadao Saito ,  Yasushi Kawai ,  Hideaki Uchida ,  Katsunori Kimura ,  Kakuhei Isawa ,  Keisuke Furuichi

    IPC分类号： G01N33/53

    CPC分类号： A23C9/1234 ,  A23Y2220/37 ,  C12Q1/04 ,  G01N33/54373 ,  G01N33/56911 ,  G01N33/80 ,  G01N2333/335

    摘要： Lactobacillus screening methods were carried out using surface plasmon resonance spectrums and human intestinal mucin and blood group antigens as probes. A trial to set selection criteria in the above-mentioned methods of screening for lactobacilli was made to adapt the methods to mass screening, and it was discovered that lactobacilli compatible with ABO blood groups can be screened by setting 100 RU as a criterion for judging bacterial binding under certain conditions. Using 238 lactobacillus strains, the above-mentioned screening methods and tests to judge their compatibility for the use of yogurt production were carried out, to at long last specifically discover bacillus strains compatible with blood groups A, B, and O.

    摘要翻译： 使用表面等离子体共振光谱和人肠粘蛋白和血型抗原作为探针进行乳杆菌筛选方法。 对上述筛选乳酸杆菌的方法设定选择标准的试验进行了适应性筛选的方法，发现与ABO血型相容的乳杆菌可以通过设定100RU作为判断细菌的标准进行筛选 在某些条件下结合。 使用238种乳酸杆菌菌株，进行上述筛选方法和测试来判断其与酸奶生产的相容性，最后特别发现与血型A，B和O相容的芽孢杆菌菌株。

    Voltage transforming circuit
    9.
    发明授权
    Voltage transforming circuit 失效
    电压变换电路

    公开(公告)号：US5513091A

    公开(公告)日：1996-04-30

    申请号：US409092

    申请日：1995-03-23

    申请人： Hideaki Uchida ,  Kouji Oohashi

    发明人： Hideaki Uchida ,  Kouji Oohashi

    IPC分类号： G02F1/133 ,  G05F1/46 ,  G09G3/04 ,  G09G3/18 ,  H02M3/07 ,  H03K19/096 ,  H02M3/18 ,  H03K3/01

    CPC分类号： H02M3/07 ,  G05F1/465

    摘要： A voltage transforming circuit comprises a constant-voltage regulator circuit for receiving a first voltage from a first voltage source and outputting a second voltage having the same polarity as the first voltage and a predetermined absolute value lower than the same, a step-up circuit, having a plurality of output terminals, for receiving the second voltage and a first synchronization signal, the step-up circuit stepping up the absolute value of the second voltage and controlling the operation of charging capacitors, thereby outputting from the output terminals a plurality of stepped-up voltages of the same polarity having absolute values higher than the second voltage, a level shifter circuit for receiving a second synchronization signal which uses the first voltage as one of logic levels, and receiving that one of the stepped-up voltages which has a highest absolute value higher than that of the first voltage, the level shifter circuit shifting the voltage of the one of logic levels to the highest absolute value of the stepped-up voltages, thereby creating the first synchronization signal, and a one-way conductive element connected between the first voltage source and that one of the output terminals of the step-up circuit from which the stepped-up voltage of the highest absolute value is output.

    摘要翻译： 电压变换电路包括恒压调节器电路，用于从第一电压源接收第一电压并输出具有与第一电压相同极性的第二电压和低于其的预定绝对值;升压电路， 具有多个输出端子，用于接收第二电压和第一同步信号，升压电路加强第二电压的绝对值并控制充电电容器的操作，从而从输出端子输出多个阶梯 - 具有高于第二电压的绝对值的相同极性的电压;电平移位器电路，用于接收使用第一电压作为逻辑电平之一的第二同步信号，并且接收具有 最高绝对值高于第一电压，电平移位器电路将逻辑电平的电压移位 s到升压电压的最高绝对值，从而产生第一同步信号，以及连接在第一电压源与升压电路的输出端之一的单向导电元件，阶跃 输出最高绝对值的电压。