公开(公告)号：US06613618B1

公开(公告)日：2003-09-02

申请号：US09542200

申请日：2000-04-04

申请人： Shiro Nakanishi ,  Tsutomu Yamada

发明人： Shiro Nakanishi ,  Tsutomu Yamada

IPC分类号： H01L2184

CPC分类号： H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678

摘要： A thin-film transistor is provided in which the thickness of the insulating film is optimized. A gate electrode is formed on a transparent substrate. A silicon nitride film and a silicon oxide film, acting as a gate insulating film, are formed over the transparent substrate. A polycrystalline silicon film, being a semiconductor film, is formed acting as an active region. A stopper is formed on the polycrystalline silicon film corresponding to the gate electrode. A silicon oxide film and a silicon nitride film, acting as an interlayer insulating film, are deposited as to cover the stopper region. The total film thickness T1 of the stopper and the silicon oxide film is formed to be thinner than (the thickness T2 of the silicon nitride film×8000 Å)½. This structure allows hydrogen atoms to be sufficiently supplied from the silicon nitride film into the polycrystalline silicon film via the stopper and the silicon oxide film, so that crystalline defects in the polycrystalline silicon film can be filled with the hydrogen atoms.

摘要翻译： 提供了薄膜晶体管，其中绝缘膜的厚度被优化。 在透明基板上形成栅电极。 在透明基板上形成用作栅极绝缘膜的氮化硅膜和氧化硅膜。 作为半导体膜的多晶硅膜被形成为起主动区域的作用。 在与栅电极相对应的多晶硅膜上形成止动件。 作为层间绝缘膜的氧化硅膜和氮化硅膜被沉积以覆盖阻挡区域。 阻挡层和氧化硅膜的总膜厚T1形成为比（氮化硅膜的厚度T2）薄。 这种结构使得氢原子能够通过阻挡层和氧化硅膜从氮化硅膜充分供给到多晶硅膜中，从而可以用氢原子填充多晶硅膜中的晶体缺陷。

公开(公告)号：US06191452B1

公开(公告)日：2001-02-20

申请号：US09162836

申请日：1998-09-29

申请人： Nobuhiko Oda ,  Shiro Nakanishi ,  Shinji Yuda ,  Tsutomu Yamada

发明人： Nobuhiko Oda ,  Shiro Nakanishi ,  Shinji Yuda ,  Tsutomu Yamada

IPC分类号： H01L2900

CPC分类号： H01L29/66765 ,  H01L29/78636

摘要： On a transparent substrate to which a gate electrode is arranged, a silicon nitride film and a silicon oxide film to be gate insulating films are deposited, and further, a polycrystalline silicon film as a semiconductor film to be an active region is formed. On the polycrystalline silicon film corresponding to the gate electrode, a stopper is arranged, and a silicon oxide film and a silicon nitride film to be an interlayer insulating films are deposited so as to cover this stopper. The film thickness T0 of the stopper is set in a range of 800 angstroms to 1200 angstroms. Furthermore, the film thickness T0 of the stopper is set in the range to fulfill the following expression: T0+T1≦(T2×8000 Å)½ where T1 is the film thickness of the silicon oxide film and T2 is the film thickness of the silicon nitride film.

摘要翻译： 在配置有栅电极的透明基板上，淀积作为栅绝缘膜的氮化硅膜和氧化硅膜，形成作为有源区的半导体膜的多晶硅膜。 在对应于栅电极的多晶硅膜上，设置有阻挡层，并且沉积作为层间绝缘膜的氧化硅膜和氮化硅膜以覆盖该阻挡层。 挡块的膜厚度T0设定在800〜1200埃的范围内。 此外，阻挡层的膜厚度T0设定在满足以下表达式的范围内：其中，T1是氧化硅膜的膜厚度，T2是氮化硅膜的膜厚度。

公开(公告)号：US06555419B2

公开(公告)日：2003-04-29

申请号：US09746253

申请日：2000-12-21

申请人： Nobuhiko Oda ,  Shiro Nakanishi ,  Shinji Yuda ,  Tsutomu Yamada

发明人： Nobuhiko Oda ,  Shiro Nakanishi ,  Shinji Yuda ,  Tsutomu Yamada

IPC分类号： H01L2100

CPC分类号： H01L29/66765 ,  H01L29/78636

摘要： On a transparent substrate to which a gate electrode is arranged, a silicon nitride film and a silicon oxide film to be gate insulating films are deposited, and further, a polycrystalline silicon film as a semiconductor film to be an active region is formed. On the polycrystalline silicon film corresponding to the gate electrode, a stopper is arranged, and a silicon oxide film and a silicon nitride film to be an interlayer insulating films are deposited so as to cover this stopper. The film thickness T0 of the stopper is set in a range of 800 angstroms to 1200 angstroms. Furthermore, the film thickness T0 of the stopper is set in the range to fulfill the following expression: T0+T1≦(T2×8000 Å)½ where T1 is the film thickness of the silicon oxide film and T2 is the film thickness of the silicon nitride film.

摘要翻译： 在配置有栅电极的透明基板上，淀积作为栅绝缘膜的氮化硅膜和氧化硅膜，形成作为有源区的半导体膜的多晶硅膜。 在对应于栅电极的多晶硅膜上，设置有阻挡层，并且沉积作为层间绝缘膜的氧化硅膜和氮化硅膜以覆盖该阻挡层。 挡块的膜厚度T0设定在800〜1200埃的范围内。 此外，阻挡层的膜厚度T0设定在满足以下表达式的范围内：其中，T1是氧化硅膜的膜厚度，T2是氮化硅膜的膜厚度。

公开(公告)号：US06265730B1

公开(公告)日：2001-07-24

申请号：US09161870

申请日：1998-09-28

申请人： Shiro Nakanishi ,  Tsutomu Yamada

发明人： Shiro Nakanishi ,  Tsutomu Yamada

IPC分类号： H01L29786

CPC分类号： H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678

摘要： A thin-film transistor is provided in which the thickness of the insulating film is optimized. A gate electrode is formed on a transparent substrate. A silicon nitride film and a silicon oxide film, acting as a gate insulating film, are formed over the transparent substrate. A polycrystalline silicon film, being a semiconductor film, is formed acting as an active region. A stopper is formed on the polycrystalline silicon film corresponding to the gate electrode. A silicon oxide film and a silicon nitride film, acting as an interlayer insulating film, are deposited as to cover the stopper region. The total film thickness T1 of the stopper and the silicon oxide film is formed to be thinner than (the thickness T2 of the silicon nitride film×8000 Å)½. This structure allows hydrogen atoms to be sufficiently supplied from the silicon nitride film into the polycrystalline silicon film via the stopper and the silicon oxide film, so that crystalline defects in the polycrystalline silicon film can be filled with the hydrogen atoms.

摘要翻译： 提供了薄膜晶体管，其中绝缘膜的厚度被优化。 在透明基板上形成栅电极。 在透明基板上形成用作栅极绝缘膜的氮化硅膜和氧化硅膜。 作为半导体膜的多晶硅膜被形成为起主动区域的作用。 在与栅电极相对应的多晶硅膜上形成止动件。 作为层间绝缘膜的氧化硅膜和氮化硅膜被沉积以覆盖阻挡区域。 阻挡层和氧化硅膜的总膜厚T1形成为比（氮化硅膜的厚度T2）薄。 这种结构使得氢原子能够通过阻挡层和氧化硅膜从氮化硅膜充分供给到多晶硅膜中，从而可以用氢原子填充多晶硅膜中的晶体缺陷。

公开(公告)号：US06265247B1

公开(公告)日：2001-07-24

申请号：US09334444

申请日：1999-06-15

申请人： Shiro Nakanishi ,  Nobuhiko Oda

发明人： Shiro Nakanishi ,  Nobuhiko Oda

IPC分类号： H01L2100

CPC分类号： H01L29/66765 ,  H01L21/76804 ,  H01L29/41733 ,  Y10S438/978

摘要： On a transparent substrate, on which is positioned a gate electrode, a silicon nitride film and a silicon oxide film are formed as gate insulating films, and furthermore a polycrystalline silicon film is formed as a semiconductor film to become an active region. A stopper is positioned on the polycrystalline silicon film to correspond to a gate electrode, and a silicon oxide film, a silicon nitride film, and a silicon oxide film are formed as interlayer insulating film so as to cover the stopper. Contact holes are formed in the layer insulating film to correspond to a source region and a drain region, and a source electrode and a drain electrode are positioned through these contact holes. Since the silicon oxide film having a fast etching rate is formed on the silicon nitride film having a slow etching rate, the etching from the silicon oxide film above the silicon nitride film dominates when forming the contact holes in the layer insulating film so that the etched shape of the silicon nitride film assumes a tapered shape widening toward the top.

摘要翻译： 在其上设置有栅电极的透明基板上形成氮化硅膜和氧化硅膜作为栅极绝缘膜，此外，形成多晶硅膜作为半导体膜以成为有源区。 阻挡器位于多晶硅膜上以对应于栅电极，并且形成氧化硅膜，氮化硅膜和氧化硅膜作为层间绝缘膜以覆盖止动器。 在层间绝缘膜上形成有与源极区域和漏极区域对应的接触孔，源极电极和漏极电极通过这些接触孔定位。 由于在具有缓慢蚀刻速率的氮化硅膜上形成具有快蚀刻速率的氧化硅膜，所以在形成层间绝缘膜中的接触孔时，来自氮化硅膜上方的氧化硅膜的蚀刻占主导地位，使得蚀刻 氮化硅膜的形状呈朝向顶部变宽的锥形形状。

公开(公告)号：US06335232B1

公开(公告)日：2002-01-01

申请号：US09165771

申请日：1998-10-02

申请人： Mitsutaka Ohori ,  Shiro Nakanishi

发明人： Mitsutaka Ohori ,  Shiro Nakanishi

IPC分类号： H01L2144

CPC分类号： H01L27/1285 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78675 ,  H01L29/78678

摘要： On a transparent substrate where a gate electrode is formed, an amorphous silicon film is deposited by plasma CVD with a gate insulating film interposed therebetween. The silicon film is heated in an nitrogen atmosphere at 430±20° C. for an hour or longer to discharge hydrogen remaining in the film when it is formed. The silicon film is then melted by laser irradiation to crystallize, to thereby form a polycrystalline silicon film serving as an active region. Thus, when amorphous silicon is crystallized to form a polycrystalline silicon film, it is made possible to prevent creation of a rough film surface and penetration of impurity ions in the atmosphere into the polycrystalline silicon.

摘要翻译： 在形成栅电极的透明基板上，通过等离子体CVD沉积非晶硅膜，其间插入有栅极绝缘膜。 将硅膜在氮气气氛中在430±20℃下加热1小时或更长时间，以便在其形成时排出残留在膜中的氢。 然后通过激光照射使硅膜熔融结晶，从而形成用作活性区域的多晶硅膜。 因此，当非晶硅结晶以形成多晶硅膜时，可以防止粗糙膜表面的产生和杂质离子在大气中的渗入到多晶硅中。

公开(公告)号：US6103557A

公开(公告)日：2000-08-15

申请号：US169833

申请日：1998-10-12

申请人： Shiro Nakanishi

发明人： Shiro Nakanishi

IPC分类号： H01L21/205 ,  H01L21/00 ,  H01L21/31 ,  H01L21/336 ,  H01L21/677 ,  H01L29/786 ,  H01L21/4763

CPC分类号： H01L21/67167 ,  H01L21/67207 ,  H01L21/67745 ,  H01L29/66765

摘要： First through fourth film formation chambers PC1 to PC4 are disposed in the periphery of a transfer chamber TC. If, for example, the ratio of the time required to form gate insulating films to the time required to form the silicon film as a semiconductor film is 1:3, a silicon nitride film and silicon oxide film are formed in the first through third film formation films PC1 to PC3 to become gate insulating films, and an amorphous silicon layer is formed in the fourth film formation chamber PC4 to become an active region. This makes it possible to perform formation of the amorphous silicon layer, which requires film cleaning, in a film formation chamber different from the film formation chamber for other films, and to manufacture thin-film transistors at high productivity.

公开(公告)号：US5962916A

公开(公告)日：1999-10-05

申请号：US162209

申请日：1998-09-28

申请人： Shiro Nakanishi ,  Nobuhiko Oda

发明人： Shiro Nakanishi ,  Nobuhiko Oda

IPC分类号： H01L21/318 ,  H01L21/336 ,  H01L21/768 ,  H01L29/417 ,  H01L29/786 ,  H01L23/58 ,  H01L29/76 ,  H01L31/036 ,  H01L31/112

CPC分类号： H01L29/66765 ,  H01L21/76804 ,  H01L29/41733 ,  Y10S438/978

摘要： On a transparent substrate, on which is positioned a gate electrode, a silicon nitride film and a silicon oxide film are formed as gate insulating films, and furthermore a polycrystalline silicon film is formed as a semiconductor film to become an active region. A stopper is positioned on the polycrystalline silicon film to correspond to a gate electrode, and a silicon oxide film, a silicon nitride film, and a silicon oxide film are formed as interlayer insulating film so as to cover the stopper. Contact holes are formed in the layer insulating film to correspond to a source region and a drain region, and a source electrode and a drain electrode are positioned through these contact holes. Since the silicon oxide film having a fast etching rate is formed on the silicon nitride film having a slow etching rate, the etching from the silicon oxide film above the silicon nitride film dominates when forming the contact holes in the layer insulating film so that the etched shape of the silicon nitride film assumes a tapered shape widening toward the top.

摘要翻译： 在其上设置有栅电极的透明基板上形成氮化硅膜和氧化硅膜作为栅极绝缘膜，此外，形成多晶硅膜作为半导体膜以成为有源区。 阻挡器位于多晶硅膜上以对应于栅电极，并且形成氧化硅膜，氮化硅膜和氧化硅膜作为层间绝缘膜以覆盖止动器。 在层间绝缘膜上形成有与源极区域和漏极区域对应的接触孔，源极电极和漏极电极通过这些接触孔定位。 由于在具有缓慢蚀刻速率的氮化硅膜上形成具有快蚀刻速率的氧化硅膜，所以在形成层间绝缘膜中的接触孔时，来自氮化硅膜上方的氧化硅膜的蚀刻占主导地位，使得蚀刻 氮化硅膜的形状呈朝向顶部变宽的锥形形状。