Abstract:
A low noise amplifier that includes a first cascode, a second cascode, an input circuit, an output node, a first switch, and a second switch. A source of a first common gate transistor and a drain of a first common source transistor of the first cascode are coupled to a first node of the low noise amplifier. The output node is coupled to a drain of the first common gate transistor, and to a drain of a second common gate transistor of the second cascode, thereby coupling the first cascode and the second cascode to a power supply via a load. The first switch is coupled between a gate of the first common gate transistor and the power supply. The second switch is coupled between the first node and the power supply. The first switch is configured to be open and the second switch is configured to be closed when the low noise amplifier operates at a first operational node. The first switch is configured to be closed and the second switch is configured to be open when the low noise amplifier operates at a second operational node that differs from the first operational mode by at least a gain of the low noise amplifier.
Abstract:
A system may be provided and may include a trusted DECT device; and a DECT base station; wherein the trusted DECT device is arranged to send, to the DECT base station, registration allowable DECT device credentials; wherein the DECT base station is arranged to: receive from a requesting DECT device a request for registration of the requesting DECT device to the DECT base station; wherein the request comprises requesting DECT device credentials; register the requesting DECT device to the DECT base station if the requesting DECT device credentials match the registration allowable DECT device credentials; and prevent a registration of the requesting DECT device to the DECT base station if the requesting DECT device credentials differ from the registration allowable DECT device credentials.
Abstract:
A method for charge-reuse, the method may include performing multiple repetitions of the steps of: operating a second capacitive load while the second capacitive load is disconnected from a first capacitive load; wherein the second capacitive load is a Microelectromechanical systems (MEMS) capacitive load or a Nanoelectromechanical systems (NEMS) capacitive load; electrically coupling a first capacitive load to a second capacitive load via a path that comprises an inductor; charging the first capacitive load with a second charge provided from the second capacitive load; electrically disconnecting the first capacitive load, the second capacitive load and the inductor from each other; feeding the inductor with a supply current provided by a supply circuit; disconnecting the inductor from the supply circuit and coupling the inductor to the first capacitive load; charging the first capacitive load by the inductor; electrically coupling the first capacitive load to the second capacitive load via the path that comprises the inductor; charging the second capacitive load with a first charge provided from the first capacitive load; and operating the second capacitive load while the second capacitive load is disconnected from the first capacitive load.
Abstract:
A system that may include a first direct current to direct current (DC) converter that is arranged to determine at a first determination rate whether to alter a parameter of operation of the first DC to DC converter and to selectively alter the parameter of operation of operation of the first DC to DC converter in response to the determination; and a second switched-mode DC to DC converter that is arranged to determine at a second determination rate whether to alter the parameter of operation of the second DC to DC converter and to selectively alter the parameter of operation of operation of the second DC to DC converter in response to the determination. The second determination rate is higher by at least a factor of two than the first determination rate. The first and second DC to DC converters are mutually unsynchronized.
Abstract:
A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.
Abstract:
A wireless communication device that includes an interface and a processor; wherein the interface is arranged to receive input signals; wherein the processor is arranged to: calculate an input signal's attribute; and determine an attribute of a collision avoidance scheme in response to the input signal's attribute.
Abstract:
A digital enhanced cordless telecommunication (DECT) base station, the DECT base station may include a transmitter that is arranged to transmit, at different points of time, downlink transmitted DECT signals to another DECT device that differs from the DECT base station; a receiver that is arranged to receive from the other DECT device downlink reception information indicative of attributes of downlink received DECT signals that were received by the other DECT device as a result of the transmission of the downlink transmitted DECT signals; a processor that is arranged to process the downlink reception information to detect a motion that affects a reception of the downlink received DECT signals by the other device.
Abstract:
A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.
Abstract:
A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.
Abstract:
Methods and systems are provided for enhanced stereo audio recordings in electronic devices. Stereophonic recording performance in an electronic device, using a first microphone and a second microphone in the electronic device, may be assessed; and processing of signals generated by the first microphone and the second microphone may be configured based on the assessed stereophonic recording performance. The configuring may comprises adaptively modifying the processing to enhance stereophonic recording performance, to match or approximate an ideal performance. The assessing of the stereophonic recording in the electronic device may be based on a type of each of the first microphone and the second microphone, and/or based on a spacing therebetween. The processing may be adaptively modified to simulate directional reception of signals by the first microphone and the second microphone when the microphones are omnidirectional.