METHOD OF MANUFACTURING ELECTRONIC DEVICES AND CORRESPONDING ELECTRONIC DEVICE

    公开(公告)号:US20230110259A1

    公开(公告)日:2023-04-13

    申请号:US18079704

    申请日:2022-12-12

    IPC分类号: B81C1/00 B81B7/00

    摘要: A first electronic component, such as a sensor having opposed first and second surfaces and a first thickness, is arranged on a support member with the second surface facing towards the support member. A second electronic component, such as an integrated circuit mounted on a substrate and having a second thickness less than the first thickness, is arranged on the support member with a substrate surface opposed the second electronic component facing towards the support member. A package molding material is molded onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component. The support member is then removed to expose the second surface of the first electronic component and the substrate surface of the substrate.

    MICROFLUIDIC MEMS DEVICE COMPRISING A BURIED CHAMBER AND MANUFACTURING PROCESS THEREOF

    公开(公告)号:US20230110175A1

    公开(公告)日:2023-04-13

    申请号:US17948075

    申请日:2022-09-19

    摘要: Process for manufacturing a microfluidic device, wherein a sacrificial layer is formed on a semiconductor substrate; a carrying layer is formed on the sacrificial layer; the carrying layer is selectively removed to form at least one release opening extending through the carrying layer; a permeable layer of a permeable semiconductor material is formed in the at least one release opening; the sacrificial layer is selectively removed through the permeable layer to form a fluidic chamber; the at least one release opening is filled with non-permeable semiconductor filling material, forming a monolithic body having a membrane region; an actuator element is formed on the membrane region and a cap element is attached to the monolithic body and surrounds the actuator element.

    Control circuit and corresponding method

    公开(公告)号:US11626880B2

    公开(公告)日:2023-04-11

    申请号:US17450711

    申请日:2021-10-13

    IPC分类号: H03K19/17736 H03K19/08

    摘要: A circuit receives an input signal having a first level and a second level. A logic circuit includes a finite state machine circuit, an edge detector circuit, and a timer circuit. The finite state machine circuit is configured to set a mode of operation of the circuit. The edge detector circuit is configured to detect a transition between the first and second level. The timer circuit is configured to determine whether the first or second level is maintained over an interval, which starts from a transition detected by the edge detector circuit. The finite state machine circuit is configured to change the mode of operation based on the timer circuit determining that the first or second level has been maintained over the interval.

    Stacked buck converters and associated method of operation

    公开(公告)号:US11626801B2

    公开(公告)日:2023-04-11

    申请号:US17496523

    申请日:2021-10-07

    IPC分类号: H02M3/158 G01R31/327 H02M1/00

    摘要: A converter includes two switching stages coupled in series between positive and negative input terminals. A control circuit is configured for driving the switching stages based on an output voltage of the converter. A first switching stage includes two switches coupled in series between a positive input terminal and a first node. A capacitor and an inductor are coupled in series between the two switches and a positive output terminal. A third switch is coupled between a node between the capacitor and the inductor and the negative input terminal. A second capacitor is coupled between the first node and the negative input terminal. A second switching stage includes a second node coupled to the first node. Two additional electronic switches are coupled in series between the second node and the negative input terminal. A second inductor is coupled between the two additional switches and the positive output terminal.

    Converter circuit, corresponding device and method

    公开(公告)号:US11626799B2

    公开(公告)日:2023-04-11

    申请号:US17393243

    申请日:2021-08-03

    IPC分类号: H02M3/158 H02M1/00

    摘要: A converter circuit includes first and second electronic switches coupled at an intermediate node, with an inductor coupled between the intermediate node and an output node. Switching drive control circuitry causes the first and the second electronic switch to switch between a conductive state and a non-conductive state. The drive control circuitry includes a first feedback signal path to control switching of the first and the second electronic switch as a function of the difference between a feedback signal indicative of the signal at the output node and a reference value. A second feedback signal path includes a low-pass filter coupled to the output node and configured to provide a low-pass filtered feedback signal resulting from low-pass filtering of the output signal. The second feedback signal path compensates the feedback signal as a function of the difference between the low-pass filtered feedback signal and a respective reference value.

    Semiconductor device and corresponding method

    公开(公告)号:US11626355B2

    公开(公告)日:2023-04-11

    申请号:US17470269

    申请日:2021-09-09

    摘要: Methods of forming a semiconductor device comprising a lead-frame having a die pad having at least one electrically conductive die pad area and an insulating layer applied onto the electrically conductive die pad area. An electrically conductive layer is applied onto the insulating layer with one or more semiconductor dice coupled, for instance adhesively, to the electrically conductive layer. The electrically conductive die pad area, the electrically conductive layer and the insulating layer sandwiched therebetween form at least one capacitor integrated in the device. The electrically conductive die pad area comprises a sculptured structure with valleys and peaks therein; the electrically conductive layer comprises electrically conductive filling material extending into the valleys in the sculptured structure of the electrically conductive die pad area.

    REVERSE-CONDUCTING IGBT DEVICE AND MANUFACTURING METHOD THEREOF, INVERTER STAGE

    公开(公告)号:US20230103191A1

    公开(公告)日:2023-03-30

    申请号:US17947703

    申请日:2022-09-19

    摘要: A RC-IGBT with fast recovery integrated diode is proposed adopting the concept of a hybrid structure with conventional IGBT emitter trench-stop, separated from an embedded low efficiency injection anode diode. The body region of the IGBT and the anode region of the diode are separately patterned and doped, and the metal barrier layer is removed from the diode area allowing a direct ohmic contact of AlSi alloy on the underneath P-doped anode. A full-anode contact opening is present in the diode area. Moreover, corresponding dummy trenches in the diode area are short-circuited to the emitter electrode giving the benefit to reduce the transfer Miller capacitance. In this way, a good trade-off of VF vs Err can be obtained for the integrated diode without downgrading the IGBT performances both in terms of VCEsat and leakage, differently from the case of devices manufactured by lifetime control techniques.

    QR-OPERATED SWITCHING CONVERTER CURRENT DRIVER

    公开(公告)号:US20230098059A1

    公开(公告)日:2023-03-30

    申请号:US17487966

    申请日:2021-09-28

    IPC分类号: H05B45/375

    摘要: In an embodiment, a control circuit includes: an output terminal configured to be coupled to a control terminal of a transistor that is coupled to an inductor; a logic circuit configured to control the transistor using a first signal; a zero crossing detection circuit configured to generate a freewheeling signal indicative of a demagnetization of the inductor; a comparator having first and second inputs configured to receive a sense voltage indicative of a current flowing through the transistor and a reference voltage, respectively, and an output configured to cause the logic circuit to dessert the first signal; and a reference generator configured to generate the reference voltage and including: a current generator, a capacitor and a resistor coupled to the output of the reference generator, and a switch coupled in series with the resistor and configured to be controlled based on the first signal and the freewheeling signal.

    ANTI-WHISKER COUNTER MEASURE USING A METHOD FOR MULTIPLE LAYER PLATING OF A LEAD FRAME

    公开(公告)号:US20230096480A1

    公开(公告)日:2023-03-30

    申请号:US17488056

    申请日:2021-09-28

    发明人: Paolo CREMA

    摘要: A substrate of a lead frame is made of a first material. The substrate is covered by a barrier film made of a second material, different from the first material. The barrier film is then covered by a further film made of the first material. A first portion of the lead frame is encapsulated within an encapsulating body in a way which leaves a second portion of lead frame extending out from and not being covered by the encapsulating body. A first portion of the further film which is not covered by the encapsulating body is then stripped away to expose the barrier film at the second portion of the lead frame. A second portion of the further film is left remaining encapsulated by the encapsulating body. The exposed barrier film at the second portion of the lead frame is then covered with a tin or tin-based layer.

    METHOD FOR OPERATING IN BURST MODE ACTIVE CLAMP FLYBACK CONVERTERS AND CORRESPONDING ACTIVE CLAMP FLYBACK CONVERTER APPARATUS

    公开(公告)号:US20230096383A1

    公开(公告)日:2023-03-30

    申请号:US17951703

    申请日:2022-09-23

    IPC分类号: H02M3/335

    摘要: An active flyback converter is transitioned between a plurality of operational states based on a comparison of a control voltage signal to voltage thresholds and a count of a number of consecutive switching cycles during which a clamp switch is kept off. The plurality of operational states includes a run state, an idle state, a first burst state, and a second burst state. Each set of consecutive switching cycles of the first burst state includes a determined number of switching cycles during which signals are generated to turn the power switch on and off and to maintain an off state of the clamp switch, and a switching cycle in a determined position in the set of switching cycles during which signals are sequentially generated to turn the power switch on, turn the power switch off, turn the clamp switch on and turn the clamp switch off.