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    Floating Body Field-Effect Transistors, and Methods of Forming Floating Body Field-Effect Transistors
    191.
    发明申请
    Floating Body Field-Effect Transistors, and Methods of Forming Floating Body Field-Effect Transistors 有权
    浮体场效应晶体管，以及形成浮体场效应晶体管的方法

    公开(公告)号：US20140051214A1

    公开(公告)日：2014-02-20

    申请号：US13761587

    申请日：2013-02-07

    Applicant: Micron Technology, Inc.

    Inventor： Jun Liu ,  Michael P. Violette ,  Chandra Mouli ,  Howard Kirsch ,  Di Li

    IPC: H01L27/12 ,  H01L27/108 ,  H01L29/66

    CPC classification number: H01L27/1203 ,  H01L27/10802 ,  H01L29/66477 ,  H01L29/7841 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In one embodiment, a floating body field-effect transistor includes a pair of source/drain regions having a floating body channel region received therebetween. The source/drain regions and the floating body channel region are received over an insulator. A gate electrode is proximate the floating body channel region. A gate dielectric is received between the gate electrode and the floating body channel region. The floating body channel region has a semiconductor SixGe(1-x)-comprising region. The floating body channel region has a semiconductor silicon-comprising region received between the semiconductor SixGe(1-x)-comprising region and the gate dielectric. The semiconductor SixGe(1-x)-comprising region has greater quantity of Ge than any quantity of Ge within the semiconductor silicon-comprising region. Other embodiments are contemplated, including methods of forming floating body field-effect transistors.

    Abstract translation: 在一个实施例中，浮体场效应晶体管包括一对在其间容纳浮体通道区的源/漏区。 源极/漏极区域和浮体沟道区域被接纳在绝缘体上。 栅电极靠近浮体通道区域。 门电介质被接收在栅电极和浮体沟道区之间。 浮体通道区域具有半导体SixGe（1-x）区域。 浮体通道区域具有容纳在半导体SixGe（1-x）区域和栅极电介质之间的半导体硅包覆区域。 半导体SixGe（1-x）含量区域在含半导体硅的区域内具有比任何Ge量更大的Ge量。 考虑了其他实施例，包括形成浮体场效应晶体管的方法。

    METHODS AND SYSTEMS FOR POLISHING PHASE CHANGE MATERIALS
    193.
    发明申请
    METHODS AND SYSTEMS FOR POLISHING PHASE CHANGE MATERIALS 有权
    抛光相变材料的方法与系统

    公开(公告)号：US20130295771A1

    公开(公告)日：2013-11-07

    申请号：US13924790

    申请日：2013-06-24

    Applicant: Micron Technology, Inc.

    Inventor： Zhenyu Lu ,  Jun Liu

    IPC: H01L21/306

    CPC classification number: H01L21/30625 ,  C09G1/02 ,  C09K3/1409 ,  C09K3/1463

    Abstract: A slurry for polishing a phase change material, such as Ge—Sb—Te, or germanium-antimony-tellurium (GST), includes abrasive particles of sizes that minimize at least one of damage to (e.g., scratching of) a polished surface of phase change material, an amount of force to be applied during polishing, and a static etch rate of the phase change material, while optionally providing selectivity for the phase change material over adjacent dielectric materials. A polishing method includes applying a slurry with one or more of the above-noted properties to a phase change material, as well as bringing the polishing pad into frictional contact with the phase change material. Polishing systems are disclosed that include a plurality of sources of solids (e.g., abrasive particles) and provide for selectivity in the solids that are applied to a substrate or polishing pad.

    Abstract translation: 用于抛光相变材料（例如Ge-Sb-Te或锗 - 锑 - 碲（GST））的浆料包括尺寸小的磨料颗粒，其至少使得抛光表面的（例如，划伤） 相变材料，在抛光期间施加的力的量和相变材料的静态蚀刻速率，同时可选地为相变材料在相邻介电材料上提供选择性。 抛光方法包括将具有上述性质的一种或多种的浆料施加到相变材料上，以及使抛光垫与相变材料摩擦接触。 公开了抛光系统，其包括多个固体源（例如，磨料颗粒），并提供施加到基底或抛光垫的固体中的选择性。

    Methods Of Forming Memory Cells, And Methods Of Patterning Chalcogenide-Containing Stacks
    195.
    发明申请
    Methods Of Forming Memory Cells, And Methods Of Patterning Chalcogenide-Containing Stacks 有权
    形成记忆细胞的方法和含硫族化合物堆叠图案的方法

    公开(公告)号：US20130149834A1

    公开(公告)日：2013-06-13

    申请号：US13761609

    申请日：2013-02-07

    Applicant: MICRON TECHNOLOGY INC.

    Inventor： Jun Liu ,  Jerome Imonigie

    IPC: H01L45/00

    CPC classification number: H01L45/1675 ,  H01L45/06 ,  H01L45/144

    Abstract: Some embodiments include methods of forming memory cells. Chalcogenide is formed over a plurality of bottom electrodes, and top electrode material is formed over the chalcogenide. Sacrificial material is formed over the top electrode material. A plurality of memory cell structures is formed by etching through the sacrificial material, top electrode material and chalcogenide. Each of the memory cell structures has a cap of the sacrificial material thereover. The etching forms polymeric residue over the sacrificial material caps, and damages chalcogenide along sidewalls of the structures. The sacrificial material is removed with an HF-containing solution, and such removes the polymeric residue off of the memory cell structures. After the sacrificial material is removed, the sidewalls of the structures are treated with one or both of H2O2 and HNO3 to remove damaged chalcogenide from the sidewalls of the memory cell structures.

    Abstract translation: 一些实施例包括形成存储器单元的方法。 硫族化物形成在多个底部电极上，顶部电极材料形成在硫族化物上。 牺牲材料形成在顶部电极材料上。 通过蚀刻牺牲材料，顶电极材料和硫族化物来形成多个存储单元结构。 每个存储单元结构都具有其上的牺牲材料的盖。 蚀刻在牺牲材料盖上形成聚合物残余物，并且沿着结构的侧壁损坏硫属元素。 牺牲材料用含HF的溶液除去，这样将聚合物残留物从记忆电池结构中除去。 在去除牺牲材料之后，用H 2 O 2和HNO 3中的一种或两种处理结构的侧壁以从存储单元结构的侧壁去除损坏的硫族化物。

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