公开(公告)号：US07550900B2

公开(公告)日：2009-06-23

申请号：US11009688

申请日：2004-12-10

Applicant: Guillaume Bouche ,  Gregory Caruyer ,  Pascal Ancey

Inventor： Guillaume Bouche ,  Gregory Caruyer ,  Pascal Ancey

IPC: H01L41/08

CPC classification number: H03H9/587 ,  H03H9/564

Abstract: Acoustic resonator device (1) includes an active element (6) and a support provided with a membrane (5). The active element (6) is provided with at least one piezoelectric layer (10) and is surmounted by a multilayer stack (12). The multilayer stack (12) is provided with at least three layers, including at least one layer (15) of high acoustic impedance and at least one layer (13) of low acoustic impedance. An integrated circuit including at least one such acoustic resonator device is also disclosed.

Abstract translation: 声谐振器装置（1）包括有源元件（6）和具有膜（5）的支撑件。 有源元件（6）设置有至少一个压电层（10），并被多层叠层（12）所覆盖。 多层堆叠（12）设置有至少三层，包括至少一层高声阻抗层（15）和至少一层低声阻抗层（13）。 还公开了包括至少一个这样的声谐振器装置的集成电路。

公开(公告)号：US07539721B2

公开(公告)日：2009-05-26

申请号：US11244773

申请日：2005-10-06

Applicant: Fabrice Belveze ,  Luc Garcia

Inventor： Fabrice Belveze ,  Luc Garcia

IPC: G06G7/02

CPC classification number: H03H15/00

Abstract: A filter intended to receive a discrete time signal at a sampling clock frequency, comprising a determined number, greater than 2, of filtering units, each filtering unit comprising head capacitors in a number equal to the determined number, assembled in parallel between an input terminal and the terminal of an integration capacitor; and means for connecting, in successive clock cycles in a number equal to the determined number, successively each head capacitor to the input terminal, and for then simultaneously connecting the head capacitors to the integration capacitor, and in which the successive clock cycles during which the head capacitors of a filtering unit are connected to the input terminal are offset by one clock cycle from one filtering unit to the next one.

Abstract translation: 旨在以采样时钟频率接收离散时间信号的滤波器，包括大于2的滤波单元的确定数量，每个滤波单元包括数量等于所确定数量的头电容器，并联在输入端子 和集成电容器的端子; 以及用于在等于确定数量的连续时钟周期中连续地将每个头电容器连接到输入端子并且然后同时将头电容器连接到积分电容器的装置，并且其中连续的时钟周期 连接到输入端子的滤波单元的头电容器从一个滤波单元偏移到一个时钟周期。

公开(公告)号：US07521764B2

公开(公告)日：2009-04-21

申请号：US11142661

申请日：2005-06-01

Applicant: Jean-Pierre Schoellkopf ,  Richard Fournel

Inventor： Jean-Pierre Schoellkopf ,  Richard Fournel

IPC: H01L29/76

CPC classification number: G11C17/16 ,  G11C11/5692 ,  Y10S257/903

Abstract: A one-time programmable, dual-bit memory device comprises one MOS storage transistor having a semiconductor substrate, first and second active regions formed under the surface of the substrate being separated by a part of the substrate forming a channel region, a gate formed on the surface of the said substrate in line with the channel region and whose respective distal ends are aligned with a part of the first active region and with a part of the second active region, respectively, which gate is permanently held at ground potential, and a gate oxide layer running between the gate and the surface of the substrate. The intact or broken down state between the gate and the first active region determines a stored value of a first bit, and the intact or broken down state between the gate and the second active region determines a stored value of a second bit.

Abstract translation: 一次性可编程双位存储器件包括具有半导体衬底的一个MOS存储晶体管，形成在衬底表面下方的第一和第二有源区被由形成沟道区的衬底的一部分分隔开，栅形成在 所述衬底的表面与沟道区域一致，并且其各自的远端分别与第一有源区域的一部分和第二有源区域的一部分对准，该栅极被永久地保持在地电位，并且 栅极氧化层在衬底的栅极和表面之间延伸。 门和第一有源区之间的完整或分解状态确定第一位的存储值，并且门和第二有源区之间的完整或分解状态确定第二位的存储值。

公开(公告)号：US20090093079A1

公开(公告)日：2009-04-09

申请号：US12244051

申请日：2008-10-02

Applicant: Serdar Manakli ,  Jessy Bustos ,  Philippe Coronel ,  Laurent Pain

Inventor： Serdar Manakli ,  Jessy Bustos ,  Philippe Coronel ,  Laurent Pain

IPC: H01L21/3205 ,  H01L21/02

CPC classification number: H01L21/263 ,  H01L21/0277 ,  H01L29/42392 ,  H01L29/78648 ,  H01L29/78696

Abstract: A method is for producing an asymmetric architecture semi-conductor device. The device includes a substrate, and in stacked relation, a first photosensitive layer, a non-photosensitive layer, and a second photosensitive layer. The method includes a first step of exposing a first zone in each of the photosensitive layers by a first beam of electrons traversing the non-photosensitive layer. A second step includes exposing at least one second zone of one of the two photosensitive layers by a second beam of electrons or photons or ions, thereby producing a widening of one of the first zones compared to the other first zone such that the second zone is in part superimposed on one of the first zones.

Abstract translation: 一种用于制造非对称架构半导体器件的方法。 该装置包括基板，并且以堆叠关系，包括第一感光层，非感光层和第二感光层。 该方法包括通过穿过非感光层的第一电子束暴露每个感光层中的第一区的第一步骤。 第二步骤包括通过第二电子束或光子或离子暴露两个感光层中的一个的至少一个第二区域，从而与其它第一区域相比产生第一区域之一的加宽，使得第二区域 部分地叠加在第一区域之一上。

公开(公告)号：US07511570B2

公开(公告)日：2009-03-31

申请号：US11648146

申请日：2006-12-29

Applicant: David Chamla ,  Andreia Cathelin ,  Andreas Kaiser

Inventor： David Chamla ,  Andreia Cathelin ,  Andreas Kaiser

IPC: H03B1/00 ,  H03K5/00 ,  H04B1/10

CPC classification number: H03H11/0472 ,  H03H11/0444

Abstract: A transconductance filtering device with a flexible architecture that can selectively present a different topology and/or order beginning with the same initial structure is disclosed. For example, depending on the communications standard detected, the elementary cells of the filtering circuit required to form the adapted filter are selected and connected in such a manner as to obtain the configuration desired for the filtering means. As an example, the filter may be for use with a wireless communications system forming, in particular, a cellular mobile telephone. The filter is configurable by means of at least two elementary cells of the same structure and of controllable interconnection means each having an open or closed state.

Abstract translation: 公开了一种具有柔性架构的跨导滤波装置，其能够以相同的初始结构开始选择性地呈现不同的拓扑和/或顺序。 例如，根据检测到的通信标准，选择并连接形成适配滤波器所需的滤波电路的基本单元，以获得滤波装置所需的配置。 作为示例，滤波器可以用于形成特别是蜂窝移动电话的无线通信系统。 滤波器可以通过至少两个相同结构的基本单元和每个具有打开或关闭状态的可控互连装置来配置。

公开(公告)号：US07501291B2

公开(公告)日：2009-03-10

申请号：US11379246

申请日：2006-04-19

Applicant: Michael Gros-Jean ,  Nicolas Casanova ,  Jean Michailos

Inventor： Michael Gros-Jean ,  Nicolas Casanova ,  Jean Michailos

IPC: H01L21/00 ,  H01L21/8242

CPC classification number: H01L28/57 ,  H01L28/75

Abstract: The process and integrated circuit include at least one capacitor in which at least one of the electrodes is made of copper. The method includes forming a nitrogen-doped silicon carbide film between the copper electrode and the dielectric film of the capacitor.

Abstract translation: 该工艺和集成电路包括至少一个电容器，其中至少一个电极由铜制成。 该方法包括在铜电极和电容器的电介质膜之间形成氮掺杂碳化硅膜。

公开(公告)号：US20090051626A1

公开(公告)日：2009-02-26

申请号：US12043631

申请日：2008-03-06

Applicant: Jean-Raphael Bezal ,  Gilles Troussel

Inventor： Jean-Raphael Bezal ,  Gilles Troussel

IPC: G09G3/28 ,  G09G3/20

CPC classification number: G09G3/2965 ,  G09G3/293

Abstract: A method controls electrodes for addressing a display panel having pixels distributed in lines and in columns, each addressing electrode being associated with a column in the panel, each line in the panel being successively selected for the addressing of the pixels in the line. The method includes maintaining, at least for part of the selection of each line, of at least one addressing electrode at a given reference voltage when the pixel of the line associated with the at least one addressing electrode is to be addressed, and setting to high impedance of the at least one addressing electrode between the successive selection of two lines having their pixels associated with the at least one addressing electrode which are to be addressed.

Abstract translation: 一种方法控制用于寻址具有以行和列分布的像素的显示面板的电极，每个寻址电极与面板中的列相关联，面板中的每一行连续地被选择用于行中的像素的寻址。 该方法包括当与至少一个寻址电极相关联的线的像素要寻址时，至少在给定参考电压下保持至少一个寻址电极的至少一个选择线，并且设置为高 在连续选择具有与要被寻址的至少一个寻址电极相关联的像素的两条线之间的至少一个寻址电极的阻抗。

公开(公告)号：US20090040684A1

公开(公告)日：2009-02-12

申请号：US12134490

申请日：2008-06-06

Applicant: Sebastien Cremer ,  Philippe Delpech ,  Sylvie Bruyere

Inventor： Sebastien Cremer ,  Philippe Delpech ,  Sylvie Bruyere

IPC: H01G4/30 ,  H01G9/00

CPC classification number: H01L28/87 ,  H01L28/91 ,  Y10T29/417

Abstract: The method for forming the microelectronic device having at least one two or three dimensional capacitor includes creating, on a substrate, a plurality of components and a number of superimposed metal interconnection levels. An insulating layer is formed above a metal interconnection level, and a horizontal metal zone of a next metal interconnection level in which one or more of the insulating blocks created from this insulating layer are incorporated is formed therein. The zone is designed to form a lower structural part of the capacitor.

Abstract translation: 用于形成具有至少一个二维或三维电容器的微电子器件的方法包括在衬底上产生多个部件和多个叠加的金属互连电平。 在金属互连层上形成绝缘层，在其中形成有一个或多个由该绝缘层形成的绝缘块的下一个金属互连层的水平金属区。 该区域被设计成形成电容器的下部结构部分。

公开(公告)号：US20090027352A1

公开(公告)日：2009-01-29

申请号：US12170849

申请日：2008-07-10

Applicant: M. Nicolas Abele

Inventor： M. Nicolas Abele

IPC: H01L29/84 ,  G01L7/08 ,  G06F3/041

CPC classification number: G06K9/0002 ,  G06F3/0412

Abstract: A microelectronic pressure sensor comprises a MOSFET transistor adapted with a mobile gate and a cavity between the mobile gate and a substrate. The sensor includes a gate actuator configured to move mobile gate in response to a pressure being exercised. A fingerprint recognition system includes a matrix of such sensors.

Abstract translation: 微电子压力传感器包括适用于移动栅极和移动栅极与衬底之间的空腔的MOSFET晶体管。 传感器包括门致动器，该门致动器被配置为响应于正在施加的压力移动移动门。 指纹识别系统包括这种传感器的矩阵。

公开(公告)号：US20090014764A1

公开(公告)日：2009-01-15

申请号：US12171213

申请日：2008-07-10

Applicant: Perceval COUDRAIN ,  Philippe CORONEL ,  Xavier BELREDON

Inventor： Perceval COUDRAIN ,  Philippe CORONEL ,  Xavier BELREDON

IPC: H01L31/00 ,  H01L21/00

CPC classification number: H01L27/14645 ,  H01L27/14621 ,  H01L27/1463 ,  H01L27/14689

Abstract: An embodiment of an image sensor comprising photosensitive cells, each photosensitive cell comprising at least one charge storage means formed at least partly in a substrate of a semiconductor material. The substrate comprises, for at least one first photosensitive cell, a portion of a first silicon and germanium alloy having a first germanium concentration, possibly zero, and for at least one second photosensitive cell, a portion of a second silicon and germanium alloy having a second germanium concentration, non-zero, greater than the first germanium concentration.

Abstract translation: 包括感光单元的图像传感器的实施例，每个感光单元包括至少部分地形成在半导体材料的衬底中的至少一个电荷存储装置。 对于至少一个第一感光单元，衬底包括具有第一锗浓度的可能为零的第一硅和锗合金的一部分，并且对于至少一个第二光敏电池，第二硅和锗合金的一部分具有 第二锗浓度非零，大于​​第一锗浓度。