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    MOTION-SENSITIVE FIELD EFFECT TRANSISTOR, MOTION DETECTION SYSTEM, AND METHOD
    203.
    发明申请
    MOTION-SENSITIVE FIELD EFFECT TRANSISTOR, MOTION DETECTION SYSTEM, AND METHOD 有权

    公开(公告)号：US20220268805A1

    公开(公告)日：2022-08-25

    申请号：US17183432

    申请日：2021-02-24

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Romain H.A. Feuillette ,  David C. Pritchard ,  Elizabeth Strehlow ,  James P. Mazza

    IPC: G01P15/00

    Abstract: Disclosed are a motion-sensitive field effect transistor (MSFET), a motion detection system, and a method. The MSFET includes a gate structure with a reservoir containing conductive fluid and gate electrode(s). Given position(s) of the gate electrode(s) and a fill level of the fluid within the reservoir, contact between the gate electrode(s) and the fluid depends upon the orientation the MSFET channel region relative to the top surface of the conductive fluid and the orientation of the MSFET channel region relative to the top surface of the conductive fluid depends upon position in space and/or movement of the MSFET and, particularly, position in space and/or movement of the chip on which the MSFET is formed. An electrical property of the MSFET in response to specific bias conditions varies depending on whether or not or to what extent the gate electrode(s) contact the fluid and is, thus, measurable for sensing chip motion.

    Waveguide with attenuator
    204.
    发明授权
    Waveguide with attenuator 有权

    公开(公告)号：US11422303B2

    公开(公告)日：2022-08-23

    申请号：US17108732

    申请日：2020-12-01

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Mark D. Levy ,  Siva P. Adusumilli ,  Yusheng Bian

    IPC: G02B6/12 ,  G02B6/122 ,  G02B6/13 ,  G02B6/24

    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a waveguide structure with attenuator and methods of manufacture. The structure includes: a waveguide structure including semiconductor material; an attenuator underneath the waveguide structure; an airgap structure vertically aligned with and underneath the waveguide structure and the attenuator; and shallow trench isolation structures on sides of the waveguide structure and merging with the airgap structure.

    Field effect transistor (FET) stack and methods to form same
    206.
    发明授权
    Field effect transistor (FET) stack and methods to form same 有权

    公开(公告)号：US11411081B2

    公开(公告)日：2022-08-09

    申请号：US16855236

    申请日：2020-04-22

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Steven M. Shank ,  Anthony K. Stamper ,  Vibhor Jain ,  John J. Ellis-Monaghan

    IPC: H01L27/092 ,  H01L29/08 ,  H01L29/78

    Abstract: The disclosure provides a field effect transistor (FET) stack with methods to form the same. The FET stack includes a first transistor over a substrate. The first transistor includes a first active semiconductor material including a first channel region between a first set of source/drain terminals, and a first gate structure over the first channel region. The first gate structure includes a first gate insulator of a first thickness above the first channel region. A second transistor is over the substrate and horizontally separated from the first transistor. A second gate structure of the second transistor may include a second gate insulator of a second thickness above a second channel region, the second thickness being greater than the first thickness. A shared gate node may be coupled to each of the first gate structure and the second gate structure.

    Optical couplers for ridge-to-rib waveguide core transitions
    207.
    发明授权
    Optical couplers for ridge-to-rib waveguide core transitions 有权

    公开(公告)号：US11409040B1

    公开(公告)日：2022-08-09

    申请号：US17209689

    申请日：2021-03-23

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yusheng Bian

    IPC: G02B6/24 ,  G02B6/30 ,  G02B6/122 ,  G02B6/02 ,  G02B6/12

    Abstract: Structures for an optical coupler and methods of fabricating a structure for an optical coupler. A first plurality of segments are positioned with a first spaced arrangement along a longitudinal axis, and a second plurality of segments are positioned with a second spaced arrangement along the longitudinal axis between the first plurality of segments and a waveguide core. A slab layer has a plurality of sections respectively connected to the second plurality of segments. The second plurality of segments have a first thickness, and the slab layer has a second thickness that is less than the first thickness.

    NON-VOLATILE MEMORY STRUCTURE USING SEMICONDUCTOR LAYER AS FLOATING GATE AND BULK SEMICONDUCTOR SUBSTRATE AS CHANNEL REGION
    210.
    发明申请
    NON-VOLATILE MEMORY STRUCTURE USING SEMICONDUCTOR LAYER AS FLOATING GATE AND BULK SEMICONDUCTOR SUBSTRATE AS CHANNEL REGION 有权

    公开(公告)号：US20220223740A1

    公开(公告)日：2022-07-14

    申请号：US17147684

    申请日：2021-01-13

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Thomas Melde ,  Stefan Dünkel ,  Ralf Richter

    IPC: H01L29/788 ,  H01L27/11521 ,  H01L27/12 ,  H01L29/423

    Abstract: A non-volatile memory (NVM) structure includes a first memory device including: a first inter-poly dielectric defined by an isolation layer over a first semiconductor layer over an insulator layer (SOI) stack over a bulk semiconductor substrate, a first tunneling insulator defined by the insulator layer, a first floating gate defined by the semiconductor layer of the SOI stack, and a first channel region defined in the bulk semiconductor substrate between a source region and a drain region. The memory device may also include a control gate over the SOI stack, an erase gate over a source region in the bulk substrate, and a bitline contact coupled to a drain region in the bulk substrate. The NVM structure may also include another memory device similar to the first memory device and sharing the source region.

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