VARIABLE-CAPACITANCE DIODE
    213.
    发明公开

    公开(公告)号:US20240204114A1

    公开(公告)日:2024-06-20

    申请号:US18537135

    申请日:2023-12-12

    Abstract: A variable-capacitance diode is formed in a doped semiconductor substrate of a first conductivity type. The diode includes a first doped region of a second conductivity type in semiconductor substrate. A second doped region of the first conductivity type in a portion of the first doped region and a third doped region of second conductivity type in a further portion of the first doped region form a PN junction of the diode. First insulating trenches laterally delimit the each PN junction. Doped areas having a doping level heavier than the first doped region are provided within the first doped region under and in contact with a bottom of each first insulating trench. The diode is surrounded by a second insulating trench deeper than the first insulating trench.

    OPTOELECTRONIC DEVICE
    219.
    发明公开

    公开(公告)号:US20240142806A1

    公开(公告)日:2024-05-02

    申请号:US18383266

    申请日:2023-10-24

    Inventor: Arthur ARNAUD

    CPC classification number: G02F1/0126 B82Y20/00

    Abstract: A device includes a first pixel, based on quantum dots, configured to deliver event-based data for generating an event-based image, and second pixels, each second pixel based on quantum dots, configured to deliver light intensity data for generating a light intensity image.

    IMAGE SENSOR
    220.
    发明公开
    IMAGE SENSOR 审中-公开

    公开(公告)号:US20240128289A1

    公开(公告)日:2024-04-18

    申请号:US18391222

    申请日:2023-12-20

    Abstract: The present disclosure concerns an image sensor including a plurality of pixels, each including: a doped photosensitive region of a first conductivity type extending vertically in a semiconductor substrate; a charge collection region more heavily doped with the first conductivity type than the photosensitive region, extending vertically in the substrate from an upper surface of the substrate and being arranged above the photosensitive region; and a vertical stack including a vertical transfer gate and a vertical electric insulation wall, the stack crossing the substrate and being in contact with the charge collection region, the gate being arranged on the upper surface side of the substrate and penetrating into the substrate deeper than the charge collection region.

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