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公开(公告)号:US12034046B2
公开(公告)日:2024-07-09
申请号:US17851872
申请日:2022-06-28
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Nicolas Guitard
IPC: H01L29/08 , H01L27/02 , H01L27/102 , H01L29/167 , H01L29/66 , H01L29/74
CPC classification number: H01L29/083 , H01L27/0248 , H01L27/1027 , H01L29/167 , H01L29/66363 , H01L29/74
Abstract: Thyristor semiconductor device comprising an anode region, a first base region and a second base region having opposite types of conductivity, and a cathode region, all superimposed along a vertical axis.
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公开(公告)号:US20240213153A1
公开(公告)日:2024-06-27
申请号:US18541497
申请日:2023-12-15
Applicant: STMicroelectronics (Crolles 2) SAS , STMicroelectronics International N.V. , STMicroelectronics France
Inventor: Olivier Weber , Rohit Kumar Gupta , Eric Vandenbossche
IPC: H01L27/092 , H01L23/528 , H01L27/02
CPC classification number: H01L27/0928 , H01L23/528 , H01L27/0207
Abstract: An electronic device including a first active area of a first transistor, a first insulating region forming a first insulation of the first active area, a first insulating gate extending above the first active area and forming a second insulation of the first active area, and a first insulating gate contact coupled to the first insulating gate and positioned above both the first active area and the first insulating region, wherein the first insulating gate contact couples the first insulating gate to a power supply rail.
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公开(公告)号:US20240204114A1
公开(公告)日:2024-06-20
申请号:US18537135
申请日:2023-12-12
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Frederic MONSIEUR
IPC: H01L29/93 , H01L21/265 , H01L21/266 , H01L29/66 , H01L29/861
CPC classification number: H01L29/93 , H01L21/26513 , H01L21/266 , H01L29/66136 , H01L29/8611
Abstract: A variable-capacitance diode is formed in a doped semiconductor substrate of a first conductivity type. The diode includes a first doped region of a second conductivity type in semiconductor substrate. A second doped region of the first conductivity type in a portion of the first doped region and a third doped region of second conductivity type in a further portion of the first doped region form a PN junction of the diode. First insulating trenches laterally delimit the each PN junction. Doped areas having a doping level heavier than the first doped region are provided within the first doped region under and in contact with a bottom of each first insulating trench. The diode is surrounded by a second insulating trench deeper than the first insulating trench.
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公开(公告)号:US20240204029A1
公开(公告)日:2024-06-20
申请号:US18536511
申请日:2023-12-12
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Laurent GAY , Magali GREGOIRE , Bilel SAIDI , Sylvain JOBLOT , Benjamin VIANNE
IPC: H01L27/146
CPC classification number: H01L27/14636 , H01L27/14634 , H01L27/14683
Abstract: An image sensor includes photodetection pixels formed inside and on top of a semiconductor substrate. An interconnection network coats a surface of the semiconductor substrate. The interconnection network includes a level of conductive vias in contact, by their lower surface, with the photodetection pixels. The conductive vias are made of doped polysilicon and have a heavier doping on their lower surface side than on their upper surface side.
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公开(公告)号:US20240178869A1
公开(公告)日:2024-05-30
申请号:US18520741
申请日:2023-11-28
Applicant: STMicroelectronics SA , STMicroelectronics (Crolles 2) SAS , Centre National De La Recherche Scientifique , Universite Du Mans
Inventor: Clement BONNAFOUX , Paul SVENSSON , Pascal URARD , Kosai RAOOF , Youssef SERRESTOU
IPC: H04B1/12
CPC classification number: H04B1/12
Abstract: A reception element receives an analog signal. The received analog signal is converted by a reception chain into a digital signal. Based on the digital signal and a first filtering operation, a correction chain generates a correction digital signal reconstituting dynamic nonlinearities generated by the reception chain. A corrected signal from which the reconstituted dynamic nonlinearities have been removed is then generated by subtracting the correction digital signal from the digital signal.
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公开(公告)号:US11994424B2
公开(公告)日:2024-05-28
申请号:US17569171
申请日:2022-01-05
Applicant: STMicroelectronics (Research & Development) Limited , STMicroelectronics (Grenoble 2) SAS , STMicroelectronics (Crolles 2) SAS
Inventor: Pierre Malinge , Frédéric Lalanne , Jeffrey M. Raynor , Nicolas Moeneclaey
IPC: G01J1/42 , G09G3/3225 , H04N25/53 , H05B47/105
CPC classification number: G01J1/4204 , G09G3/3225 , H04N25/53 , H05B47/105 , G09G2320/0626 , G09G2360/144
Abstract: In an embodiment a method for measuring ambient light includes successively synchronizing optical signal acquisition phases with extinction phases of a disruptive light source, wherein the disruptive light source periodically provides illumination phases and the extinction phases, accumulating, in each acquisition phase, photo-generated charges by at least one photosensitive pixel comprising a pinned photodiode, wherein an area of the pinned photodiode is less than or equal to 1/10 of an area of the at least one photosensitive pixel, transferring, for each pixel, the accumulated photo-generated charges to a sensing node, converting, for each pixel, the transferred charges to a voltage at a voltage node and converting, for each pixel, the transferred charges to a digital number.
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公开(公告)号:US20240162329A1
公开(公告)日:2024-05-16
申请号:US18387325
申请日:2023-11-06
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Alexis GAUTHIER , Pascal CHEVALIER , Edoardo BREZZA , Nicolas GUITARD
IPC: H01L29/66 , H01L29/08 , H01L29/10 , H01L29/737
CPC classification number: H01L29/66242 , H01L29/0817 , H01L29/1004 , H01L29/6653 , H01L29/66553 , H01L29/6656 , H01L29/737
Abstract: An electronic device includes an insulating first layer covering a second layer made of a doped semiconductor material. A cavity is formed to cross through the first layer and reach the second layer. Insulating spacers are forming against lateral walls of the cavity. A first doped semiconductor region fills the cavity. The first doped semiconductor region has a doping concentration decreasing from the second layer.
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公开(公告)号:US20240154034A1
公开(公告)日:2024-05-09
申请号:US18386159
申请日:2023-11-01
Inventor: Julien DURA , Franck JULIEN , Julien AMOUROUX , Stephane MONFRAY
IPC: H01L29/78 , H01L21/225 , H01L21/265 , H01L21/84 , H01L27/12
CPC classification number: H01L29/7838 , H01L21/2253 , H01L21/26513 , H01L21/84 , H01L27/1203
Abstract: A transistor includes a source region, a drain region and a body region arranged in a semiconductor layer. A gate region tops the body region. The body region includes a first doped layer and a second layer between the first doped layer and the gate region. The second layer is an epitaxial layer that is less heavily doped than the first doped layer.
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公开(公告)号:US20240142806A1
公开(公告)日:2024-05-02
申请号:US18383266
申请日:2023-10-24
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Arthur ARNAUD
CPC classification number: G02F1/0126 , B82Y20/00
Abstract: A device includes a first pixel, based on quantum dots, configured to deliver event-based data for generating an event-based image, and second pixels, each second pixel based on quantum dots, configured to deliver light intensity data for generating a light intensity image.
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公开(公告)号:US20240128289A1
公开(公告)日:2024-04-18
申请号:US18391222
申请日:2023-12-20
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Francois ROY , Andrej SULER
IPC: H01L27/146
CPC classification number: H01L27/14614 , H01L27/14621 , H01L27/14627 , H01L27/1464 , H01L27/14645 , H01L27/14689
Abstract: The present disclosure concerns an image sensor including a plurality of pixels, each including: a doped photosensitive region of a first conductivity type extending vertically in a semiconductor substrate; a charge collection region more heavily doped with the first conductivity type than the photosensitive region, extending vertically in the substrate from an upper surface of the substrate and being arranged above the photosensitive region; and a vertical stack including a vertical transfer gate and a vertical electric insulation wall, the stack crossing the substrate and being in contact with the charge collection region, the gate being arranged on the upper surface side of the substrate and penetrating into the substrate deeper than the charge collection region.
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