公开(公告)号：US09939667B1

公开(公告)日：2018-04-10

申请号：US15488950

申请日：2017-04-17

Applicant: INPHI CORPORATION

Inventor： Abdellatif El-Moznine ,  Bruno Tourette ,  Hessam Mohajeri

IPC: G02F1/025 ,  G02F1/01 ,  G02F1/225 ,  H03G3/20 ,  H04B10/54 ,  G02F1/21

CPC classification number: G02F1/025 ,  G02F1/0121 ,  G02F1/2255 ,  G02F1/2257 ,  G02F2001/212 ,  G02F2201/12 ,  H03G3/20 ,  H04B10/54

Abstract: A driver configuration for driving a Mach-Zehnder modulator (MZM) includes a first driver supplied by a first voltage and a second voltage and configured to provide a first two complimentary outputs respectively to a first N-electrode of a first branch of the MZM and a second N-electrode of a second branch of the MZM. Additionally, the driver configuration includes a second driver supplied by a third voltage and a fourth voltage and configured to provide a second two complimentary outputs respectively to a first P-electrode of the first branch and a second P-electrode of the second branch. The driver configuration sets a difference between the third voltage and the fourth voltage equal to a difference between the first voltage and the second voltage to provide a same peak-to-peak differential swing for modulating light wave through each transmission line and output a modulated light with twice of the peak-to-peak differential swing.

公开(公告)号：US09935706B2

公开(公告)日：2018-04-03

申请号：US15679008

申请日：2017-08-16

Applicant: INPHI CORPORATION

Inventor： Radhakrishnan L. Nagarajan

IPC: H04B10/071 ,  H04L12/26 ,  H04L12/933 ,  H04Q11/00 ,  H04B10/40

CPC classification number: H04B10/071 ,  H04B10/40 ,  H04L43/50 ,  H04L49/109 ,  H04Q11/0005 ,  H04Q2011/0018 ,  H04Q2011/0035

Abstract: In an example, the present invention includes an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.

公开(公告)号：US20180069632A1

公开(公告)日：2018-03-08

申请号：US15797898

申请日：2017-10-30

Applicant: INPHI CORPORATION

Inventor： Paul VOOIS ,  Diego Ernesto CRIVELLI ,  Ramiro Rogelio LOPEZ ,  Jorge Manuel FINOCHIETTO ,  Oscar Ernesto AGAZZI ,  Nariman YOUSEFI ,  Norman L. SWENSON

IPC: H04B10/40 ,  H04B10/2507 ,  H04B10/58

CPC classification number: H04B10/40 ,  H04B10/2507 ,  H04B10/58

Abstract: Methods of operating an optical communication system in coherent optical transmissions for metro applications. Relative to conventional solutions, the optical communication system can be implemented with reduced cost and can operate with reduced power consumption, while maintaining high data rate performance (e.g., 100 G). Furthermore, a programmable transceiver enables compatibility with a range of different types of optical networks having varying performance and power tradeoffs. In one embodiment, the optical communication system uses 100 Gb/s dual-polarization 16-point quadrature amplitude modulation (DP-16QAM) with non-linear pre-compensation of Indium Phosphide (InP) optics for low power consumption.

公开(公告)号：US20180067888A1

公开(公告)日：2018-03-08

申请号：US15810556

申请日：2017-11-13

Applicant: Inphi Corporation

Inventor： Siddharth SHETH ,  Radhakrishnan L. NAGARAJAN

IPC: G06F13/42

CPC classification number: G06F13/42 ,  G06F13/364 ,  G06F13/4072 ,  G06F13/4282 ,  G06F15/7817 ,  H04L1/0003 ,  H04L25/03006

Abstract: The present invention provides an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. The device further includes a driver interface and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.

公开(公告)号：US20180067887A1

公开(公告)日：2018-03-08

申请号：US15812493

申请日：2017-11-14

Applicant: INPHI CORPORATION

Inventor： Sreenivas KRISHNAN ,  Nirmal Raj SAXENA

IPC: G06F13/40 ,  H04L12/64 ,  G06F13/42 ,  H04B10/27 ,  H04L12/66 ,  H04J14/02 ,  H04L12/933

CPC classification number: G06F13/4022 ,  G06F13/4027 ,  G06F13/4282 ,  H04B10/27 ,  H04J14/0267 ,  H04L12/64 ,  H04L12/66 ,  H04L49/15 ,  H04Q11/0005 ,  H04Q2011/009 ,  Y02D10/14 ,  Y02D10/151

Abstract: A method of operating a computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. Each of rack modules can include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.

公开(公告)号：US20180041287A1

公开(公告)日：2018-02-08

申请号：US15786108

申请日：2017-10-17

Applicant: INPHI CORPORATION

Inventor： Oscar Ernesto AGAZZI ,  Diego Ernesto CRIVELLI ,  Hugo Santiago CARRER ,  Mario Rafael HUEDA ,  Martin Ignacio DEL BARCO ,  Pablo GIANNI ,  Ariel POLA ,  Elvio Adrian SERRANO ,  Alfredo Javier TADDEI ,  Mario Alejandro CASTRILLON ,  Martin SERRA ,  Ramiro MATTEODA

IPC: H04B10/61 ,  H04L7/00 ,  H04L27/01

CPC classification number: H04B10/6161 ,  H04B10/616 ,  H04L7/0075 ,  H04L27/01

Abstract: A receiver for fiber optic communications.

公开(公告)号：US20180032467A1

公开(公告)日：2018-02-01

申请号：US15730479

申请日：2017-10-11

Applicant: INPHI CORPORATION

Inventor： Siddharth SHETH ,  Radhakrishnan L. NAGARAJAN

IPC: G06F13/42

CPC classification number: G06F13/42 ,  G06F13/364 ,  G06F13/4072 ,  G06F13/4282 ,  G06F15/7807 ,  G06F15/7817 ,  H04L1/0003 ,  H04L25/03006 ,  H04L27/34

Abstract: The present invention provides an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. The device further includes a driver interface and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.

公开(公告)号：US20170366259A1

公开(公告)日：2017-12-21

申请号：US15693856

申请日：2017-09-01

Applicant: Inphi Corporation

Inventor： Todd ROPE

IPC: H04B10/079 ,  H04B10/60 ,  H04L27/06

CPC classification number: H04B10/07953 ,  H04B10/0795 ,  H04B10/40 ,  H04B10/508 ,  H04B10/54 ,  H04B10/60 ,  H04B10/801 ,  H04L27/06

Abstract: A Pulse Amplitude Modulated (PAM) optical device utilizing multiple wavelengths, features a communications interface having enhanced diagnostics capability. New registers are created to house additional diagnostic information, such as error rates. The diagnostic information may be stored in raw form, or as processed on-chip utilizing local resources.

公开(公告)号：US20170366147A1

公开(公告)日：2017-12-21

申请号：US15633521

申请日：2017-06-26

Applicant: INPHI CORPORATION

Inventor： Rajasekhar NAGULAPALLI ,  Simon FOREY ,  Parmanand MISHRA

IPC: H03F3/45 ,  H03F1/34

CPC classification number: H03F3/45183 ,  H03F1/34 ,  H03F3/45475 ,  H03F3/45479 ,  H03F3/4565 ,  H03F3/45659 ,  H03F2203/45008 ,  H03F2203/45022 ,  H03F2203/45112 ,  H03F2203/45244 ,  H03F2203/45642

Abstract: The present invention is directed to electrical circuits and techniques thereof. More specifically, embodiments of the present invention provide a differential amplifier that has a differential amplifier section, a current source, and a feedback section. The differential amplifier section comprises NMOS transistors that receives two voltage inputs and generate a differential output. The current source provides a long tail for the differential amplifier section. The feedback section generates a feedback voltage based on a reference bias voltage. The feedback voltage is used by an amplifier to control the current source and to keep the biasing and gain of the differential amplifier substantially constant. There are other embodiments as well.

公开(公告)号：US09846347B2

公开(公告)日：2017-12-19

申请号：US15459528

申请日：2017-03-15

Applicant: INPHI CORPORATION

Inventor： Masaki Kato

IPC: G02F1/225 ,  G02F1/025 ,  G02F1/21

CPC classification number: G02F1/2257 ,  G02F1/025 ,  G02F2001/212 ,  G02F2201/121 ,  G02F2201/126

Abstract: An apparatus for modulating a beam of light with balanced push-pull mechanism. The apparatus includes a first waveguide comprising a first PN junction on a silicon-on-insulator substrate and a second waveguide comprising a second PN junction on the silicon-on-insulator substrate. The second PN junction is a replica of the first PN junction shifted with a distance. The apparatus further includes a first source electrode and a first ground electrode coupled respectively with the first PN junction and a second source electrode and a second ground electrode coupled respectively with the second PN junction. The apparatus additionally includes a third ground electrode disposed near the second PN junction at the distance away from the second ground electrode, wherein the first ground electrode, the second ground electrode, and the third ground electrode are commonly grounded to have both PN junctions subjected to a substantially same electric field varied in ground-source-ground pattern.