Abstract:
A touch controller processes a captured data frame and detects the presence of touch points in the data frame. The data frame includes a plurality of digital capacitance values organized as groups of sense line data and the touch controller determines for each digital capacitance value in a group of sense line data the difference between the digital capacitance value and an associated no-touch threshold to generate a baseline delta value for each digital capacitance value in the group. The touch controller selects the minimum baseline delta and adjusts each digital capacitance value in the group by the minimum baseline delta to generate adjusted sense line data. The touch control generates adjusted sense line data for each group of sense line data in the data frame and thereafter processes the groups of adjusted sense line data to detect the presence of touch points in the data frame.
Abstract:
According to an embodiment of the present disclosure, a plurality of light-emitting diode (LED) modules in series are monitored. When an LED module is detected as failing or operating inadequately, a bypass switch removes the particular LED module from the series and the voltage provided to the series is modified. When the LED modules are detected as having too high of a temperature, the current provided to the LED modules is limited.
Abstract:
The methods and systems of this invention allow for independent adaptive control of ringing and overshoot effects in 2-dimensional array interpolation processes, including in image and video rescaling and analysis. The methods and systems can use either a column-wise or a row-wise interpolation, or a combination thereof. Each uses a respective preliminary interpolation of data, followed by ringing and/or overshoot control. Controllable parameters allow variability in the amount of ringing and/or overshoot retained in the interpolated data. The ringing and overshoot controls apply a local analysis of the data to adjust the preliminary interpolation results. The methods may be repeated iteratively, for example, to obtain a desired rescaling of an image data array.
Abstract:
An interconnect structure for use in an integrated circuit is provided. The interconnect structure includes a first low-K dielectric material. The first low-K material may be modified with a first group of carbon nanotubes (CNTs) and disposed on a metal line. The first low-K material is modified by dispersing the first group of CNTs in a solution, spinning the solution onto a silicon wafer and curing the solution to form the first low-K material modified with the first CNTs. The metal line includes a top layer and a bottom layer connected by a metal via. The interconnect structure also includes a second low-K dielectric material modified with a second group of CNTs and disposed on the bottom layer. Accordingly, embodiments the present disclosure could help to increase the mechanical strength of the low-K material or the entire interconnect structure.
Abstract:
A sync signal generator for a capacitive sensor includes a charge amplifier having an input for coupling to an inactive receive line in the capacitive sensor, a first comparator having a first input for receiving a first threshold voltage, a second input coupled to an output of the charge amplifier, and an output for providing a first sync signal, and a second comparator having a first input for receiving a second threshold voltage, a second input coupled to the output of the charge amplifier, and an output for providing a second sync signal. The charge amplifier includes an operational amplifier having a feedback circuit including a capacitor and a switch. The first threshold voltage is provided by a first digital-to-analog converter, and the second threshold voltage is provided by a second digital-to-analog converter.
Abstract:
An integrated temperature sensor provides an output current proportional to temperature rising from a zero value at a selectable reference temperature. The reference temperature can be selected by varying resistive values in the sensor's circuit. The temperature sensor can be manufactured at low cost and fully integrated on a chip using CMOS technology, and may be used for low-power applications.
Abstract:
Complete testing of an analog-to-digital converter (ADC) can be carried out using digital signals and at high speeds. Circuit elements are added to an ADC so that a first phase of testing may be carried out using a limited number of analog test voltages. The ADC may then be reconfigured using added circuit elements to disable conventional analog-to-digital conversion. A digital signal may then be applied to the ADC to rapidly test all switching elements used in analog-to-digital conversion. According to some implementations, testing times for ADCs may be reduced from hours to milliseconds.
Abstract:
A method of processing a digital image which includes at least one contour zone, including a contour zone sharpness processing. The sharpness processing includes a conversion of the cues regarding level of pixels of the contour zone into initial main cues, lying between zero and a main value dependent on the amplitude of the contour, a sharpness sub-processing performed on these initial main cues so as to obtain final main cues, and a conversion of the final main cues into final cues regarding levels.
Abstract:
Disclosed is keypad circuitry operable to detect a pressed key while reducing electromagnetic interference (EMI). The keypad circuitry is operable to reduce EMI in two ways: a) reducing the voltage swing occurring at the row circuitry and column circuitry of the keypad, and b) reducing the number of signal transitions by restricting the signal transitions to occurring at the column and row corresponding to a pressed key. By limiting signal transitions to occurring only at the row and column corresponding to a pressed key, fewer signal transitions occur, and thus, less EMI is produced. Additionally, reduced voltage swings at the row circuitry and column circuitry results in reduced EMI.
Abstract:
A chip scale package (CSP) device includes a CSP having a semiconductor die electrically coupled to a plurality of solder balls. A can having an inside top surface and one or more side walls defines a chamber. The CSP is housed in the chamber and is attached to the inside top surface of the can. A printed circuit board is attached to the solder balls and to the one or more side walls to provide support to the CSP and to the can. The CSP may be a Wafer-Level CSP. The can may be built from a metallic substance or from a non-metallic substance. The can provides stress relief to the CSP during a drop test and during a thermal cycle test.