公开(公告)号：US20090316814A1

公开(公告)日：2009-12-24

申请号：US12421877

申请日：2009-04-10

Applicant: Dong Youn SEO ,  Jung Hoon Lee ,  Ki Jun Kim ,  Joon Kui Ahn

Inventor： Dong Youn SEO ,  Jung Hoon Lee ,  Ki Jun Kim ,  Joon Kui Ahn

IPC: H04K1/10

CPC classification number: H04W72/042 ,  H04B7/0665 ,  H04L5/0007 ,  H04L5/0039 ,  H04L5/0092 ,  H04L5/0094 ,  H04W16/10 ,  H04W36/0066 ,  H04W48/12 ,  H04W72/0446 ,  H04W72/0493 ,  H04W72/12

Abstract: A method for adjusting a granularity of resource allocation in a wireless mobile communication system supporting a compact scheduling is disclosed. A resource indication value (RIV) corresponds to a start index (S) of one set of consecutive virtual resource blocks (VRBs) and a length of the VRBs. The start index (S) is selected from among ‘s’ values (where s=P+mT

Abstract translation: 公开了一种在支持紧凑调度的无线移动通信系统中调整资源分配粒度的方法。 资源指示值（RIV）对应于一组连续虚拟资源块（VRB）的开始索引（S）和VRB的长度。 从“s”值（其中s = P + mT

公开(公告)号：US07622765B2

公开(公告)日：2009-11-24

申请号：US11709057

申请日：2007-02-22

Applicant: Won-joo Kim ,  Yoon-dong Park ,  Jung-hoon Lee

Inventor： Won-joo Kim ,  Yoon-dong Park ,  Jung-hoon Lee

IPC: H01L29/788

CPC classification number: H01L29/7881 ,  H01L27/115 ,  H01L27/11519 ,  H01L29/42332 ,  H01L29/792

Abstract: A non-volatile memory device and a method of fabricating the same are provided. A non-volatile memory device may include a semiconductor substrate including a body and at least one pair of fins vertically protruding from the body and spaced apart from each other, and at least one control gate electrode on at least portions of outer side surfaces of the at least one pair of fins and extending onto top portions of the at least one pair of fins on an angle with the at least one pair of fins. The non-volatile memory device may further include at least one pair of gate insulating layers between the at least one control gate electrode and the at least one pair of fins, and at least one pair of storage node layers between the at least one pair of gate insulating layers and at least a portion of the at least one control gate electrode. The at least one control gate electrode may extend onto top portions of the at least one pair of fins in a zigzag fashion.

Abstract translation: 提供了一种非易失性存储器件及其制造方法。 非易失性存储器件可以包括半导体衬底，其包括主体和从主体垂直突出并且彼此间隔开的至少一对鳍，以及至少一个控制栅电极，其位于至少一个的外侧表面的至少部分上 至少一对翅片，并且与所述至少一对翅片成角度地延伸到所述至少一对翅片的顶部上。 非易失性存储器件还可以包括至少一对控制栅电极与至少一对散热片之间的至少一对栅绝缘层，以及至少一对控制栅电极之间的至少一对存储节点层 栅绝缘层和至少一个控制栅电极的至少一部分。 至少一个控制栅极可以以锯齿形的方式延伸到至少一对翅片的顶部。

公开(公告)号：US20090240999A1

公开(公告)日：2009-09-24

申请号：US12297613

申请日：2007-04-19

Applicant: Jung Hoon Lee ,  Eun Sun Kim ,  Bong Hoe Kim ,  Young Woo Yun ,  Dong Youn Seo ,  Ki Jun Kim ,  Suk Hyon Yoon ,  Joon Kua Ahn ,  Hak Seong Kim

Inventor： Jung Hoon Lee ,  Eun Sun Kim ,  Bong Hoe Kim ,  Young Woo Yun ,  Dong Youn Seo ,  Ki Jun Kim ,  Suk Hyon Yoon ,  Joon Kua Ahn ,  Hak Seong Kim

IPC: H04L1/08 ,  G06F11/14

CPC classification number: H04L27/2608 ,  H04L1/1607 ,  H04L1/1812 ,  H04L1/1845

Abstract: A resource allocation method for use in a system for performing a decoding function by combining an first-transmitted packet with a re-transmitted packet includes: transmitting a packet using N resource blocks (where N=integer >0); receiving a first negative-acknowledgement (NACK) signal for the packet; and re-transmitting the packet using M resource blocks according to the first NACK signal (where M=N >integer >0). Therefore, the resources can be efficiently allocated during the re-transmission.

Abstract translation: 一种用于通过组合首次发送的分组与重新发送的分组来执行解码功能的系统的资源分配方法包括：使用N个资源块（其中N =整数> 0）发送分组; 接收所述分组的第一否定确认（NACK）信号; 并根据第一NACK信号（其中M = N>整数> 0）使用M个资源块重新发送分组。 因此，可以在重传期间有效地分配资源。

公开(公告)号：US07560764B2

公开(公告)日：2009-07-14

申请号：US11424524

申请日：2006-06-15

Applicant: Byung-Gook Park ,  Jung-Hoon Lee

Inventor： Byung-Gook Park ,  Jung-Hoon Lee

IPC: H01L23/62

CPC classification number: H01L29/792 ,  H01L21/28282 ,  H01L29/1033 ,  H01L29/4232 ,  H01L29/66833 ,  H01L29/7854

Abstract: A new SONOS memory device is provided, in which a conventional planar surface of multi-dielectric layers (ONO layers) is instead formed with a curved surface such as a cylindrical shape, and included is a method for fabricating the same.A radius of curvature of the upper surface of a blocking oxide can be designed to be larger than that of the lower surface of a tunneling oxide, which restrains electrons from passing through the blocking oxide by back-tunneling on erasing. As a result, a SONOS memory device shows an improvement in erasing speed.

Abstract translation: 提供了一种新的SONOS存储器件，其中多个电介质层（ONO层）的常规平面表面替代地形成有诸如圆柱形的弯曲表面，并且包括其制造方法。 阻挡氧化物的上表面的曲率半径可以被设计为大于隧道氧化物的下表面的曲率半径，其阻止电子在擦除时通过反向隧道穿过阻塞氧化物。 结果，SONOS存储器件显示出擦除速度的改进。

公开(公告)号：US20090154583A1

公开(公告)日：2009-06-18

申请号：US12331464

申请日：2008-12-10

Applicant: Jung Hoon LEE ,  Joon Kui AHN

Inventor： Jung Hoon LEE ,  Joon Kui AHN

IPC: H04L27/28

CPC classification number: H04W72/0453 ,  H04L5/0007 ,  H04L5/0041 ,  H04L5/0044 ,  H04L5/0083 ,  H04L5/0094

Abstract: A method of mapping symbols of a physical control format indicator channel (PCFICH) is described. A start position of a resource element to map the symbols for the PCFICH is determined by flooring a value, obtained by multiplying the number of resource blocks by a variable proportional to a symbol index for the PCFICH and then dividing the multiplied result by 2, wherein the resource blocks are transmitted in downlink. The symbols are mapped in the start position. Therefore, a problem of wasting resource elements or not being able to implement mapping can be solved by applying a simple mapping rule while mapping symbols of the PCFICH.

Abstract translation: 描述了映射物理控制格式指示符信道（PCFICH）的符号的方法。 用于映射用于PCFICH的符号的资源元素的开始位置通过将通过将资源块的数量乘以与PCFICH的符号索引成比例的变量获得的值，然后将乘法结果除以2来确定其中 在下行链路中发送资源块。 符号被映射到起始位置。 因此，可以通过在映射PCFICH的符号的同时应用简单的映射规则来解决浪费资源元素或不能实现映射的问题。

公开(公告)号：US07535049B2

公开(公告)日：2009-05-19

申请号：US11249393

申请日：2005-10-14

Applicant: Won-joo Kim ,  Yoon-dong Park ,  Eun-hong Lee ,  Sun-ae Seo ,  Sang-min Shin ,  Jung-hoon Lee ,  Seung-hyuk Chang

Inventor： Won-joo Kim ,  Yoon-dong Park ,  Eun-hong Lee ,  Sun-ae Seo ,  Sang-min Shin ,  Jung-hoon Lee ,  Seung-hyuk Chang

IPC: H01L29/788 ,  H01L21/336

CPC classification number: G11C11/5621 ,  B82Y10/00 ,  G11C11/5607 ,  G11C11/5628 ,  G11C11/5657 ,  G11C13/025 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/28291 ,  H01L29/0692 ,  H01L29/4232 ,  H01L29/7923

Abstract: A multi bits flash memory device and a method of operating the same are disclosed. The multi bits flash memory device includes: a stacked structure including: a first active layer with a mesa-like form disposed on a substrate; a second active layer, having a different conductivity type from the first active layer, formed on the first active layer; an active interlayer isolation layer interposed between the first active layer and the second active layer such that the first active layer is electrically isolated from the second active layer; a common source and a common drain formed on a pair of opposite side surfaces of the stacked structure; a common first gate and a common second gate formed on the other pair of opposite side surfaces of the stacked structure; a tunnel dielectric layer interposed between the first and second gates and the first and second active layers; and a charge trap layer, storing charges that tunnel through the tunnel dielectric layer, interposed between the tunnel dielectric layer and the first and second gates.

Abstract translation: 公开了一种多位闪存器件及其操作方法。 多位闪存器件包括：堆叠结构，包括：设置在衬底上的具有台面状形状的第一有源层; 形成在所述第一有源层上的与所述第一有源层不同的导电类型的第二有源层; 插入在第一有源层和第二有源层之间的有源层间隔离层，使得第一有源层与第二有源层电隔离; 形成在所述堆叠结构的一对相对侧表面上的共同源极和共同漏极; 形成在所述堆叠结构的另一对相对侧表面上的公共第一栅极和公共第二栅极; 介于所述第一和第二栅极与所述第一和第二有源层之间的隧道介电层; 以及电荷捕获层，其存储穿过隧道介电层的电荷，介于隧道介电层和第一和第二栅极之间。

公开(公告)号：US20090052470A1

公开(公告)日：2009-02-26

申请号：US12278564

申请日：2007-02-07

Applicant: Young Woo Yun ,  Hak Seong Kim ,  Bong Hoe Kim ,  Joon Kui Ahn ,  Dong Youn Seo ,  Jung Hoon Lee ,  Ki Jun Kim ,  Suk Hyon Yoon ,  Eun Sun Kim

Inventor： Young Woo Yun ,  Hak Seong Kim ,  Bong Hoe Kim ,  Joon Kui Ahn ,  Dong Youn Seo ,  Jung Hoon Lee ,  Ki Jun Kim ,  Suk Hyon Yoon ,  Eun Sun Kim

IPC: H04J1/16

CPC classification number: H04L5/0048 ,  H04L5/0016 ,  H04L25/0226 ,  H04L25/0228 ,  H04L27/262 ,  H04W72/0446 ,  H04W72/0453 ,  H04W88/02 ,  H04W88/08

Abstract: A method of transmitting pilot signals in a system which performs communication using two or more earners comprises transmitting first pilots and second pilots from at least one user equipment to a base station, the first and second pilots, which are transmitted from the at least one user equipment, being multiplexed by code division multiplexing, and the first and second pilots, which are transmitted from a specific user equipment, having different transmission powers, and transmitting data from the at least one user equipment to the base station depending on the first pilots and the second pilots. Since many UEs can transmit CQ pilots, exact channel estimation can be performed and thus communication efficiency can be improved.

Abstract translation: 一种在使用两个或更多个收费机进行通信的系统中发送导频信号的方法包括从至少一个用户设备向基站发送第一导频和第二导频，所述第一和第二导频是从所述至少一个用户发送的 通过码分复用多路复用的设备，以及具有不同发射功率的特定用户设备发送的第一和第二导频，以及根据第一导频从至少一个用户设备向基站发送数据，以及 第二名飞行员。 由于许多UE可以发送CQ导频，因此可以执行精确的信道估计，从​​而可以提高通信效率。

公开(公告)号：US07352037B2

公开(公告)日：2008-04-01

申请号：US11393750

申请日：2006-03-31

Applicant: Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  Eun-Hong Lee ,  Jae-woong Hyun ,  Jung-hoon Lee ,  Sung-jae Byun

Inventor： Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  Eun-Hong Lee ,  Jae-woong Hyun ,  Jung-hoon Lee ,  Sung-jae Byun

IPC: H01L29/94

CPC classification number: H01L29/66795 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/10876 ,  H01L27/10879 ,  H01L27/11507 ,  H01L27/2436 ,  H01L29/785

Abstract: A semiconductor device may include at least one pair of fins on a semiconductor substrate. A channel region may be formed in each fin. The semiconductor device may further include a gate electrode corresponding to each pair of channel regions, a source contact plug electrically connected to each of at least one source formed on a respective fin concurrently, and a drain contact plug electrically connected to each of at least one drain formed on a respective fin concurrently.

Abstract translation: 半导体器件可以包括半导体衬底上的至少一对散热片。 可以在每个鳍中形成沟道区。 半导体器件还可以包括对应于每对沟道区的栅电极，同时电连接到形成在相应散热片上的至少一个源中的每一个的源极接触插塞以及电连接到至少一个 漏斗同时形成在相应的翅片上。

公开(公告)号：US07338353B2

公开(公告)日：2008-03-04

申请号：US10599861

申请日：2005-04-08

Applicant: Jung Hoon Lee

Inventor： Jung Hoon Lee

IPC: B24B5/00

CPC classification number: B24B37/345

Abstract: The present invention related to a loading device for a chemical mechanical polisher of semiconductor wafers comprising: a loading cup on wherein a cup plate is installed in a cup-shaped bath, a loading plate for receiving wafers sits on the cup plate, and a plurality of vertical damping devices lie between the cup plate and the loading plate so as for the loading plate to be damped in a vertical direction; a driving axis for a right and left pivot movement and an ascending and descending movement of the loading cup between a platen of the chemical mechanical polisher and a spindle; and an arm connecting the loading cup to the driving axis; wherein a plurality of horizontal damping devices are positioned with a constant angle in a radial direction along a bottom surface of the loading plate from its center in order for a polishing carrier head mounted on the spindle and the loading plate to be detachable after being calibrated to a normal position by shaking the loading plate finely in a horizontal direction within the limit of a certain driving tolerance, based on a position deviation between the polishing carrier head and the loading plate, when loading and unloading wafers therebetween; and wherein both ends of each horizontal damping device are fixed to the cup plate and the loading plate, respectively. With the structure of the loading device, the present invention accomplishes an advantage that the loading device can be actively adapted for a position deviation between the polishing carrier head and the loading cup of the loading device, caused during the process of loading and unloading wafers.

Abstract translation: 本发明涉及一种用于半导体晶片的化学机械抛光机的装载装​​置，其特征在于，包括：杯形杯安装在杯状浴中的装载杯，用于接收晶片的装载板位于杯形板上，并且多个 垂直阻尼装置位于杯板和装载板之间，以使装载板在垂直方向上被阻尼; 用于左右枢转运动的驱动轴和装载杯在化学机械抛光机的台板和主轴之间的上升和下降运动; 以及将加载杯连接到驱动轴的臂; 其中多个水平阻尼装置从其中心沿着装载板的底表面在径向方向上以恒定的角度定位，以便安装在主轴上的抛光载具头，并且装载板在经过校准之后可拆卸 通过基于抛光载体头和装载板之间的位置偏差在一定的行驶公差的极限内沿水平方向微小地摇动装载板，当在其间装载和卸载晶片时，正常位置; 并且其中每个水平阻尼装置的两端分别固定在杯板和装载板上。 利用装载装置的结构，本发明实现了一种优点，即加载装置可以主动地适用于在装载和卸载晶片的过程中引起的抛光载体头和加载装置的装载杯之间的位置偏差。

公开(公告)号：US07285966B2

公开(公告)日：2007-10-23

申请号：US10549335

申请日：2004-03-16

Applicant: Oug-Ki Lee ,  Jung-Hoon Lee

Inventor： Oug-Ki Lee ,  Jung-Hoon Lee

IPC: G01R31/02

CPC classification number: G01R1/06744 ,  G01R1/06711 ,  G01R1/07307 ,  G01R1/07342 ,  G01R3/00

Abstract: Disclosed herein are a probe and a method of making the same, and more particularly to a probe having a minute pitch, with which a probe card corresponding to arrangement of pads formed with a massed shape or other various shapes on a wafer is made, and a method of making the same. The probe having a prescribed thickness and formed in the shape of a flat plate. The probe comprises a body part bent at the middle thereof so that the body part is elastically tensioned or compressed when a tension force or a compression force is applied to the body part at the upper and lower ends thereof, a connection part integrally formed with the lower end of the body part, the connection part being fixed to a substrate, and a tip part integrally formed with the upper end of the body part, the tip part contacting a pad of an element.

Abstract translation: 本文公开了一种探针及其制造方法，更具体地说，涉及一种具有微小间距的探针，其中形成了与晶片上形成有组合形状或其它各种形状的焊盘布置对应的探针卡，以及 制作相同的方法。 探针具有规定的厚度并形成为平板状。 探头包括在其中间弯曲的主体部分，使得当在其上端和下端处对主体部分施加张力或压缩力时，主体部分被弹性张紧或压缩;与主体部分的上端和下端一体形成的连接部， 主体部分的下端，连接部分固定到基底，以及与主体部分的上端一体形成的尖端部分，尖端部分接触元件的垫。