公开(公告)号：US07396777B2

公开(公告)日：2008-07-08

申请号：US11107559

申请日：2005-04-15

Applicant: Hyung-Suk Jung ,  Jong-Ho Lee ,  Ha-Jin Lim ,  Jae-Eun Park ,  Yun-Seok Kim ,  Jong-Ho Yang

Inventor： Hyung-Suk Jung ,  Jong-Ho Lee ,  Ha-Jin Lim ,  Jae-Eun Park ,  Yun-Seok Kim ,  Jong-Ho Yang

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/022 ,  C23C16/402 ,  C23C16/45525 ,  C23C16/45527 ,  C23C16/45529 ,  H01L21/0228 ,  H01L21/02318 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3142 ,  H01L21/3143 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: Methods of fabricating high-k dielectric layers having reduced impurities for use in semiconductor applications are disclosed. The methods include the steps of: forming a stacked dielectric layer having a first dielectric layer and a second dielectric layer formed on a semiconductor substrate using an ALD method, in combination with a post-treatment step performed to the stacked dielectric layer. The steps of forming the stacked dielectric layer and performing the post-treatment are repeated at least once, thereby fabricating the high-k dielectric layer.

Abstract translation: 公开了制造用于半导体应用的具有减少的杂质的高k电介质层的方法。 该方法包括以下步骤：结合对叠层电介质层执行的后处理步骤，使用ALD法形成具有形成在半导体衬底上的第一电介质层和第二电介质层的叠层电介质层。 形成堆叠的电介质层并进行后处理的步骤至少重复一次，从而制造高k电介质层。

公开(公告)号：US20080157172A1

公开(公告)日：2008-07-03

申请号：US11719934

申请日：2005-12-06

Applicant: Jong-Ho Lee

Inventor： Jong-Ho Lee

IPC: H01L29/788 ,  H01L21/336

CPC classification number: H01L21/28273 ,  B82Y10/00 ,  H01L21/28282 ,  H01L29/42332 ,  H01L29/42336 ,  H01L29/42352 ,  H01L29/66795 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7781 ,  H01L29/785 ,  H01L29/7854 ,  H01L29/792

Abstract: The present invention relates to a nano-scale flash memory device having a saddle structure, and a fabrication method thereof. Particularly, the invention relates to a highly integrated, high-performance flash memory device having a saddle structure for improving the scaling-down characteristic and performance of the MOS-based flash memory device. According to the invention, a portion of an insulating film around a recessed channel is selectively removed to expose the surface and sides of the recessed channel. A tunneling insulating film is formed on the exposed surface and sides of the recessed channel. On the resulting structure, a floating electrode, an inter-electrode insulating film and a control electrode are formed, thus fabricating the device. Particularly when the floating electrode is made of an insulating nitride film or pluralities of nano-scale dots, an excellent memory device can be made without using an additional mask. According to the invention, the scaling-down characteristic of the device is excellent, and current drive capability can be greatly increased since a channel through which current can flow is formed on the surface and sides of the recessed channel. Also, the ability of the control electrode to control the channel can be enhanced, so that memory write/erase characteristics can be improved.

Abstract translation: 本发明涉及具有鞍座结构的纳米级闪存装置及其制造方法。 特别地，本发明涉及一种高度集成的高性能闪速存储器件，其具有用于提高基于MOS的闪存器件的缩小特性和性能的鞍形结构。 根据本发明，选择性地去除围绕凹槽的绝缘膜的一部分以露出凹槽的表面和侧面。 隧道绝缘膜形成在凹槽的暴露表面和侧面上。 在所得到的结构上，形成浮置电极，电极间绝缘膜和控制电极，从而制造该器件。 特别是当浮置电极由绝缘氮化物膜或多个纳米级点构成时，可以在不使用附加掩模的情况下制造优良的存储器件。 根据本发明，由于在凹槽的表面和侧面上形成电流可以流过的通道，所以器件的缩小特性是优异的，并且可以大大增加电流驱动能力。 而且，可以提高控制电极控制通道的能力，从而可以提高存储器写/擦除特性。

公开(公告)号：US20080106533A1

公开(公告)日：2008-05-08

申请号：US11957431

申请日：2007-12-15

Applicant: Jong-ho Lee ,  Kwang-kee Lee ,  Sung-wook Byun ,  Glenn Adams ,  Un-gyo Jung

Inventor： Jong-ho Lee ,  Kwang-kee Lee ,  Sung-wook Byun ,  Glenn Adams ,  Un-gyo Jung

IPC: G09G5/00

CPC classification number: G09G5/14 ,  G06F9/451 ,  H04N5/272 ,  H04N5/45 ,  H04N21/4316 ,  H04N21/4431 ,  H04N21/4622

Abstract: An apparatus for providing multiple screens and a method of dynamically configuring multiple screens are provided. The apparatus for providing multiple screens includes a screen generating module that generates a logical screen including at least one of a background still image, a video raster, and a graphic raster, each represented as an HScreen Device, and a service selecting module that adds a predetermined player to at least one of the HScreen Devices representing the background still image, the video raster, and the graphic raster included in the logical screen.

Abstract translation: 提供了一种用于提供多个屏幕的装置和一种动态配置多个屏幕的方法。 用于提供多个屏幕的装置包括：屏幕生成模块，其生成包括背景静止图像，视频栅格和图形光栅中的至少一个的逻辑屏幕，每个表示为HScreen设备;以及服务选择模块，其添加 至少一个表示背景静止图像，视频光栅和包括在逻辑画面中的图形光栅的HScreen设备中的预定播放器。

公开(公告)号：US20080094513A1

公开(公告)日：2008-04-24

申请号：US11957654

申请日：2007-12-17

Applicant: Jong-ho Lee ,  Kwang-kee Lee ,  Sung-wook Byun ,  Glenn Adams ,  Un-gyo Jung

Inventor： Jong-ho Lee ,  Kwang-kee Lee ,  Sung-wook Byun ,  Glenn Adams ,  Un-gyo Jung

IPC: H04N5/45 ,  H04N5/445

CPC classification number: H04N5/45 ,  H04N5/44504 ,  H04N5/44591 ,  H04N21/4316 ,  H04N21/4431 ,  H04N21/4622

Abstract: An apparatus for providing multiple screens and a method of dynamically configuring multiple screens are provided. The method of dynamically configuring multiple screens includes generating a plurality of logical screens; associating a service context with a first logical screen selected from the generated logical screens; and moving the service context from the first logical screen to a second logical screen selected from the generated logical screens.

Abstract translation: 提供了一种用于提供多个屏幕的装置和一种动态配置多个屏幕的方法。 动态配置多个屏幕的方法包括产生多个逻辑屏幕; 将服务上下文与从所生成的逻辑屏幕中选择的第一逻辑屏幕相关联; 以及将所述服务上下文从所述第一逻辑屏幕移动到从所生成的逻辑屏幕中选择的第二逻辑屏幕。

公开(公告)号：US20080088744A1

公开(公告)日：2008-04-17

申请号：US11957739

申请日：2007-12-17

Applicant: Jong-ho LEE ,  Kwang-kee LEE ,  Sung-wook BYUN ,  Glenn ADAMS ,  Un-gyo JUNG

Inventor： Jong-ho LEE ,  Kwang-kee LEE ,  Sung-wook BYUN ,  Glenn ADAMS ,  Un-gyo JUNG

IPC: H04N9/74

CPC classification number: H04N5/45 ,  H04N5/44591 ,  H04N21/4316 ,  H04N21/4348 ,  H04N21/4622

Abstract: Provided are an apparatus for providing multiple screens and a method of dynamically configuring multiple screens in which a plurality of screens for providing a plurality of content items are dynamically configured using flags included in received packets. The apparatus includes a digital signal processing module which determines whether an application included in received data information supports a plurality of logical screens for representing a plurality of services based on a signal included in the received data information, and an operational module which maps the plurality of logical screens to a display screen according to a result of the determination performed by the digital signal processing module.

Abstract translation: 提供了一种用于提供多个屏幕的装置和动态配置多个屏幕的方法，其中使用包括在接收的分组中的标志来动态地配置用于提供多个内容项的多个屏幕。 该装置包括一个数字信号处理模块，该数字信号处理模块基于接收的数据信息中包含的信号，确定包括在接收的数据信息中的应用是否支持用于表示多个服务的多个逻辑屏幕，以及操作模块， 根据由数字信号处理模块执行的确定的结果将逻辑屏幕显示到显示屏幕。

公开(公告)号：US20080079086A1

公开(公告)日：2008-04-03

申请号：US11831069

申请日：2007-07-31

Applicant: Hyung-suk Jung ,  Jong-ho Lee ,  Sung-kee Han ,  Ho Lee ,  Ha-jin Lim

Inventor： Hyung-suk Jung ,  Jong-ho Lee ,  Sung-kee Han ,  Ho Lee ,  Ha-jin Lim

IPC: H01L21/336 ,  H01L27/085

CPC classification number: H01L21/823807

Abstract: A semiconductor device and a method of manufacturing the semiconductor device, in which the semiconductor device includes a semiconductor substrate in which PMOS transistor regions and NMOS transistor regions are formed, a PMOS transistor including P-type source and drain regions and a gate electrode, and an NMOS transistor formed on an Si channel region between N-type source and drain regions. The PMOS transistor is formed in each PMOS transistor region, and the gate electrode is formed on a high-dielectric gate insulating film formed on an SiGe channel region between the P-type source and drain regions. Further, the NMOS transistor includes a high-dielectric gate insulating film and a gate electrode formed on the gate insulating film, and the NMOS transistor is formed in each NMOS transistor region.

Abstract translation: 一种半导体器件和半导体器件的制造方法，其中半导体器件包括其中形成有PMOS晶体管区域和NMOS晶体管区域的半导体衬底，包括P型源极和漏极区域的PMOS晶体管和栅极电极，以及 形成在N型源区和漏区之间的Si沟道区上的NMOS晶体管。 PMOS晶体管形成在每个PMOS晶体管区域中，并且栅电极形成在形成在P型源区和漏区之间的SiGe沟道区上的高电介质栅极绝缘膜上。 此外，NMOS晶体管包括高电介质栅极绝缘膜和形成在栅极绝缘膜上的栅电极，并且NMOS晶体管形成在每个NMOS晶体管区域中。

公开(公告)号：US20080000252A1

公开(公告)日：2008-01-03

申请号：US11710540

申请日：2007-02-26

Applicant: Jong Ho Lee ,  Moon Shin Kim

Inventor： Jong Ho Lee ,  Moon Shin Kim

IPC: F25D21/14

CPC classification number: F24F13/222 ,  F24F1/022 ,  F24F1/04 ,  F24F2006/125 ,  F24F2013/225 ,  Y02B30/80

Abstract: An air conditioner is provided. The air conditioner includes a main and sub drain pan, a first and second heat exchanger, a condensed water pipe, and a pipe coupling element. The main drain pan is provided between a front frame and a rear frame, to divide a space between the rear frame and the front frame into an upper and lower section. The first and second heat exchangers are respectively provided at a lower and upper portion of the main drain pan, to allow heat exchange to occur between air and coolant. The sub-drain pan is provided at the lower portion of the main drain pan, to collect condensed water generated by the first and second heat exchangers. The condensed water pipe guides condensed water collected in a base pan to the sub-drain pan. The pipe coupling element detachably couples one end of the condensed water pipe to the sub-drain pan.

Abstract translation: 提供空调。 空调包括主排水盘，副排水盘，第一和第二热交换器，冷凝水管和管接头元件。 主排水盘设置在前框架和后框架之间，以将后框架和前框架之间的空间分成上部和下部。 第一和第二热交换器分别设置在主排水盘的下部和上部，以允许在空气和冷却剂之间发生热交换。 副排水盘设置在主排水盘的下部，以收集由第一和第二热交换器产生的冷凝水。 冷凝水管将收集在底盘中的冷凝水引导到副排水盘。 管连接元件将冷凝水管的一端可拆卸地连接到副排水盘。

公开(公告)号：US20070296067A1

公开(公告)日：2007-12-27

申请号：US11764072

申请日：2007-06-15

Applicant: Jong-Ho LEE ,  Young-Lyong KIM

Inventor： Jong-Ho LEE ,  Young-Lyong KIM

IPC: H01L23/495

CPC classification number: H01L23/3128 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/31 ,  H01L24/90 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05568 ,  H01L2224/06136 ,  H01L2224/11332 ,  H01L2224/13099 ,  H01L2224/16105 ,  H01L2224/16108 ,  H01L2224/16237 ,  H01L2224/73203 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/90 ,  H01L2224/9202 ,  H01L2924/0002 ,  H01L2924/01021 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/3025 ,  H01L2224/05552

Abstract: A semiconductor package and a method of fabricating the same are provided. The semiconductor package includes a semiconductor chip and a circuit board. The semiconductor chip has a bond pad. The circuit board has a base substrate with a throughole, and a conductive film pattern placed on a sidewall of the throughole. The throughole is aligned with the bond pad to expose the bond pad. A connector located within the throughole electrically connects the conductive film pattern to the bond pad. A sealing layer covers the connector.

Abstract translation: 提供半导体封装及其制造方法。 半导体封装包括半导体芯片和电路板。 半导体芯片具有接合焊盘。 电路板具有带有通孔的基底基板和位于通孔的侧壁上的导电膜图案。 通孔与接合焊盘对准以暴露接合焊盘。 位于通孔内的连接器将导电膜图案电连接到接合垫。 密封层覆盖连接器。

公开(公告)号：US20070152331A1

公开(公告)日：2007-07-05

申请号：US11513173

申请日：2006-08-31

Applicant: Uu-Byung Kang ,  Yong-Hwan Kwon ,  Jong-Ho Lee ,  Chung-Sun Lee

Inventor： Uu-Byung Kang ,  Yong-Hwan Kwon ,  Jong-Ho Lee ,  Chung-Sun Lee

IPC: H01L23/48

CPC classification number: C22C30/06 ,  B23K35/025 ,  B23K35/262 ,  B23K35/264 ,  B23K2101/40 ,  C22C12/00 ,  C22C13/00 ,  C22C13/02 ,  C22C30/02 ,  C22C30/04 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/15787 ,  H05K3/3463 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Example embodiments of the present invention relate to an alloy solder and a semiconductor device using the alloy solder. Other example embodiments relate to an alloy solder capable of increasing reliability of a junction between a semiconductor chip and a substrate. According to still other example embodiments of the present invention, there may be a tin-bismuth (Sn—Bi) family alloy solder between a semiconductor chip and a substrate, and a semiconductor device using the alloy solder. The semiconductor device may include a semiconductor chip formed with a plurality of gold (Au) bumps, a substrate having metal wirings connected to the gold (Au) bumps, and a junction including a tin-bismuth (Sn—Bi) family alloy solder interposed between and connecting the gold (Au) bump and the metal wiring.The formation of a relatively large amount of AuSn4 intermetallic compound may be inhibited in the junction because gold (Au) may not easily diffuse into a tin-bismuth (Sn—Bi) family alloy solder of a liquid state during a reflow process for connecting the semiconductor chip and substrate. Therefore, most of the junction may be retained as the tin-bismuth (Sn—Bi) family alloy solder.

Abstract translation: 本发明的示例性实施例涉及合金焊料和使用该合金焊料的半导体器件。 其他示例实施例涉及能够增加半导体芯片和基板之间的结的可靠性的合金焊料。 根据本发明的另一个示例性实施例，可以在半导体芯片和衬底之间存在锡 - 铋（Sn-Bi）族合金焊料，以及使用该合金焊料的半导体器件。 半导体器件可以包括形成有多个金（Au）凸块的半导体芯片，具有连接到金（Au）凸块的金属布线的衬底以及插入了锡 - 铋（Sn-Bi）族合金焊料的接合部 之间并连接金（Au）凸块和金属布线。 由于金（Au）可能不容易扩散到液体的锡 - 铋（Sn-Bi）族合金焊料中，所以在结中可以抑制相对大量的AuSn 4+金属间化合物的形成 在用于连接半导体芯片和衬底的回流工艺期间状态。 因此，大部分接点可以作为锡 - 铋（Sn-Bi）族合金焊料保留。

公开(公告)号：US20070077476A1

公开(公告)日：2007-04-05

申请号：US11529212

申请日：2006-09-29

Applicant: Hae-Weon Lee ,  Jong-Ho Lee ,  Joo-Sun Kim ,  Ji-Won Son ,  Hue-Sup Song ,  Hyoung-Chul Kim ,  Hwa-Young Jung

Inventor： Hae-Weon Lee ,  Jong-Ho Lee ,  Joo-Sun Kim ,  Ji-Won Son ,  Hue-Sup Song ,  Hyoung-Chul Kim ,  Hwa-Young Jung

IPC: H01M8/12 ,  C04B35/64

CPC classification number: H01M4/9066 ,  H01M4/8621 ,  H01M4/8885 ,  H01M8/1213 ,  H01M8/1226 ,  H01M8/124 ,  Y02P70/56

Abstract: The present invention discloses a paste for screen printing which is used in a process of fabricating an anode functional layer, an electrolyte layer and a cathode layer of an anode-supported solid oxide fuel cell. The paste for the solid oxide fuel cell contains raw material powder of each layer, ethyl cellulose which is a binder, alpha terpineol which is a solvent, and an alcoholic solvent which has solubility to a thermosetting binder contained in an anode support and which is added by 0.5 to 20 wt % of alpha terpineol as an additional solvent. The present invention also discloses a fabricating method of an anode-supported solid oxide fuel cell which forms each layer of the fuel cell by screen printing by using the paste. According to the present invention, in the highly efficient pore structure anode support fabricated by thermosetting molding, the composition of the paste for screen printing is controlled to improve weftability, and the movement of the elements is restricted by curing, thereby reducing surface defects of the layers and interfacial defects between the layers in fabrication and improving the interface strength. As a result, the high performance large area solid oxide fuel cell can be economically and efficiently fabricated, and reliability of the product can be remarkably improved.

Abstract translation: 本发明公开了一种丝网印刷用糊剂，其用于制造阳极支撑固体氧化物型燃料电池的阳极功能层，电解质层和阴极层的工序。 固体氧化物型燃料电池用糊剂含有各层的原料粉末，作为粘合剂的乙基纤维素，作为溶剂的α-萜品醇和对阳极载体中含有的热固性粘合剂具有溶解性的醇溶剂， 作为另外的溶剂使用0.5〜20重量％的萜品醇。 本发明还公开了一种阳极支撑的固体氧化物燃料电池的制造方法，其通过使用该糊状物的丝网印刷形成燃料电池的各层。 根据本发明，在通过热固性成型制造的高效率孔结构阳极支撑体中，控制用于丝网印刷的糊剂的组成以改善纬向性，并且元件的移动受到固化的限制，从而减少了 层和界面缺陷在制造和提高界面强度。 结果，可以经济高效地制造高性能大面积固体氧化物燃料电池，可以显着提高产品的可靠性。