公开(公告)号：US08990472B2

公开(公告)日：2015-03-24

申请号：US13658976

申请日：2012-10-24

Applicant: Mellanox Technologies, Ltd.

Inventor： Oren Tzvi Sela ,  Noam Bloch

IPC: G06F13/42

CPC classification number: G06F13/4221 ,  G06F13/423 ,  G06F2213/0026

Abstract: Methods and devices for running network protocols over Peripheral Component Interconnect Express are disclosed. The methods and devices may receive an electronic signal comprising data. The methods and devices may also determine the data corresponds to a protocol selected from a set comprising a PCIe protocol and a network protocol. In addition, the methods and devices may also configure a CPU based on the determined protocol. The methods and devices may also receive a second electronic signal comprising second data at a pin or land of the CPU, wherein the pin or land is connected to a PCIe lane and wherein the second data is formatted in accordance with determined protocol. In addition, the methods and devices may process the second data in accordance with the determined protocol.

Abstract translation: 披露了通过Peripheral Component Interconnect Express运行网络协议的方法和设备。 方法和装置可以接收包括数据的电子信号。 方法和设备还可以确定对应于从包括PCIe协议和网络协议的集合中选择的协议的数据。 此外，方法和设备还可以基于所确定的协议来配置CPU。 所述方法和设备还可以接收包括在CPU的引脚或引脚上的第二数据的第二电子信号，其中所述引脚或引脚连接到PCIe通道，并且其中根据所确定的协议对第二数据进行格式化。 此外，方法和装置可以根据确定的协议处理第二数据。

公开(公告)号：US08959265B2

公开(公告)日：2015-02-17

申请号：US13682772

申请日：2012-11-21

Applicant: Mellanox Technologies Ltd.

Inventor： Ofer Hayut ,  Noam Bloch ,  Michael Kagan ,  Ariel Shachar

IPC: G06F3/01 ,  G06F13/14

CPC classification number: G06F3/016 ,  G06F13/128 ,  G06F13/14

Abstract: A computer peripheral device includes a host interface, which is configured to communicate over a bus with a host processor and with a system memory of the host processor. Processing circuitry in the peripheral device is configured to receive and execute work items submitted to the peripheral device by client processes running on the host processor, and responsively to completing execution of the work items, to write completion reports to the system memory, including first completion reports of a first data size and second completion reports of a second data size, which is smaller than the first data size.

Abstract translation: 计算机外围设备包括主机接口，其被配置为通过总线与主处理器和主机处理器的系统存储器进行通信。 外围设备中的处理电路被配置为通过在主处理器上运行的客户端进程来接收和执行提交给外围设备的工作项目，并且响应于完成工作项目的执行，将完成报告写入系统存储器，包括首先完成 报告第一数据大小和第二数据大小的第二完成报告，其小于第一数据大小。

公开(公告)号：US20150010267A1

公开(公告)日：2015-01-08

申请号：US13935511

申请日：2013-07-04

Applicant: Mellanox Technologies Ltd.

Inventor： Shmuel Levy ,  Avner Badihi ,  Sylvie Rockman ,  Elad Mentovich

IPC: G02B6/32

CPC classification number: G02B6/32 ,  G02B6/30

Abstract: An apparatus includes a Silicon Photonics (SiP) device and a ferrule. The SiP includes multiple optical waveguides. The ferrule includes multiple optical fibers for exchanging optical signals with the respective optical waveguides of the SiP device. In some embodiments, an array of micro-lenses is configured to couple the optical signals between the optical waveguides of the SiP device and the respective optical fibers of the ferrule. In some embodiments, a polymer layer is placed between the SiP device and the ferrule, and includes multiple polymer-based Spot-Size Converters (SSCs) that are configured to couple the optical signals between the optical waveguides of the SiP device and the respective optical fibers of the ferrule.

Abstract translation: 一种装置包括硅光子学（SiP）器件和套圈。 SiP包括多个光波导。 套圈包括用于与SiP器件的各个光波导交换光信号的多个光纤。 在一些实施例中，微透镜阵列被配置为耦合SiP器件的光波导与套管的相应光纤之间的光信号。 在一些实施例中，聚合物层被放置在SiP器件和套圈之间，并且包括多个基于聚合物的点尺寸转换器（SSC），其被配置为将SiP器件的光波导与相应的光学器件 套管的纤维。

公开(公告)号：US08924605B2

公开(公告)日：2014-12-30

申请号：US13682773

申请日：2012-11-21

Applicant: Mellanox Technologies Ltd.

Inventor： Ofer Hayut ,  Noam Bloch ,  Michael Kagan ,  Ariel Shachar

IPC: G06F3/00 ,  G06F13/00 ,  G06F3/01 ,  H04L12/00 ,  H04L12/46

CPC classification number: G06F3/016 ,  G06F13/00 ,  H04L12/00 ,  H04L12/4641

Abstract: A computer peripheral device includes a host interface, which is configured to communicate over a bus with a host processor and with a system memory of the host processor. Processing circuitry in the peripheral device is configured to receive and execute work items submitted to the peripheral device by client processes running on the host processor, and responsively to completing execution of the work items, to generate completion reports and to write a plurality of the completion reports to the system memory via the bus together in a single bus transaction.

公开(公告)号：US20140369651A1

公开(公告)日：2014-12-18

申请号：US14294167

申请日：2014-06-03

Applicant: Mellanox Technologies Ltd.

Inventor： Ori Ben David ,  Avner Badihi ,  Mordi Farkash ,  Kfir Katz

IPC: G02B6/42

CPC classification number: G02B6/4268 ,  G02B6/4204 ,  G02B6/421 ,  G02B6/4214 ,  G02B6/423 ,  G02B6/4246 ,  G02B6/4249 ,  G02B6/4269 ,  G02B6/4271 ,  G02B6/4292 ,  G02B6/43 ,  Y10T29/49117

Abstract: An apparatus includes one or more optoelectronic transducers, driving circuitry, one or more cooling elements, and a light coupling module. The optoelectronic transducers are configured to convert between optical signals conveyed over optical fibers and respective electrical signals. The driving circuitry is configured to process the electrical signals. The cooling elements are configured to remove heat that is produced at least by the driving circuitry. The light coupling module is configured to couple the optical signals between the optical fibers and the optoelectronic transducers, and additionally serves as a baseplate for the cooling elements.

Abstract translation: 一种装置包括一个或多个光电换能器，驱动电路，一个或多个冷却元件和光耦合模块。 光电子传感器被配置为在通过光纤传送的光信号和相应的电信号之间进行转换。 驱动电路被配置为处理电信号。 冷却元件构造成去除至少由驱动电路产生的热量。 光耦合模块被配置为耦合光纤和光电换能器之间的光信号，并且另外用作冷却元件的基板。

公开(公告)号：US08914458B2

公开(公告)日：2014-12-16

申请号：US13628075

申请日：2012-09-27

Applicant: Mellanox Technologies Ltd.

Inventor： Shachar Raindel ,  Haggai Eran ,  Liran Liss ,  Noam Bloch

IPC: G06F15/167

CPC classification number: G06F3/067 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0659

Abstract: A method for data transfer includes receiving in an input/output (I/O) operation a first segment of data to be written to a specified virtual address in a host memory. Upon receiving the first segment of the data, it is detected that a first page that contains the specified virtual address is swapped out of the host memory. At least one second page of the host memory is identified, to which a second segment of the data is expected to be written. Responsively to detecting that the first page is swapped out and to identifying the at least one second page, at least the first and second pages are swapped into the host memory. After swapping at least the first and second pages into the host memory, the data are written to the first and second pages.

Abstract translation: 一种用于数据传输的方法包括在输入/输出（I / O）操作中接收要写入主机存储器中的指定虚拟地址的第一数据段。 在接收到数据的第一段时，检测到包含指定虚拟地址的第一页被转换出主机存储器。 标识主机存储器的至少一个第二页，期望数据的第二段被写入到其上。 响应于检测到第一页面被换出并且识别至少一个第二页面，至少第一页面和第二页面被交换到主机存储器中。 至少将第一页和第二页交换到主机存储器之后，数据被写入第一页和第二页。

公开(公告)号：US20140348468A1

公开(公告)日：2014-11-27

申请号：US13898557

申请日：2013-05-21

Applicant: Mellanox Technologies Ltd.

Inventor： Rafi Lagziel ,  Nimer Khazen ,  Jamal Mousa

IPC: G02B6/38 ,  G02B6/42

CPC classification number: G02B6/4255 ,  G02B6/4284 ,  G02B6/4292 ,  Y10T29/49117

Abstract: A communication device includes a mechanical shell, which is configured to be inserted into a Small Form-Factor Pluggable (SFP) receptacle and contains a notch configured to hold a ferrule for mating with a connector of a passive optical cable. The mechanical shell includes molded upper and lower covers, which are joined together along an assembly line. A pair of elastic clips are molded integrally with at least one of the upper and lower covers and are configured to receive and hold the connector when mated with the ferrule. Circuitry within the shell includes electrical terminals configured to mate with corresponding terminals of the receptacle.

Abstract translation: 通信设备包括机械外壳，其被配置为插入小型可插拔（SFP）插座中并且包含配置成保持用于与无源光缆的连接器配合的套圈的凹口。 机械壳包括模制的上盖和下盖，它们沿着装配线连接在一起。 一对弹性夹与上盖和下盖中的至少一个一体地模制，并且构造成在与套圈配合时接纳和保持连接器。 外壳内的电路包括被配置为与插座的相应端子配合的电气端子。

公开(公告)号：US20140284463A1

公开(公告)日：2014-09-25

申请号：US14354759

申请日：2012-10-25

Applicant: YAMAICHI ELECTRONICS CO., LTD. ,  MELLANOX TECHNOLOGIES, LTD.

Inventor： Toshitaka Kuroda ,  Satoru Yoshida ,  Toshiyasu Ito

IPC: H04B10/40

CPC classification number: H04B10/40 ,  G02B6/4201 ,  G02B6/4246 ,  G02B6/4281 ,  G02B6/4284 ,  H05K1/189 ,  H05K2201/10121

Abstract: On a predetermined mounting surface of a surface (22A) of a flexible wiring board (22), a flexible wiring board pressing plate (28) which presses the mounting surface against a lower cover (12) is provided at a position immediately below a first radiation block (24) and a pressing sheet (26). The flexible wiring board pressing plate (28) has five pairs of projections (28PA and 28PB) respectively arranged in lines. The projections (28PA and 28PB) are formed to intersect conductive patterns (22ACP) at predetermined intervals.

Abstract translation: 在柔性布线板（22）的表面（22A）的预定的安装表面上，将紧固在下盖（12）上的安装表面的柔性布线板压板（28）设置在第一 辐射块（24）和按压片（26）。 柔性线路板按压板（28）具有分别配置成5对的突起（28PA，28PB）。 突起（28PA和28PB）形成为以预定间隔相交于导电图案（22ACP）。

公开(公告)号：US20140281840A1

公开(公告)日：2014-09-18

申请号：US13839193

申请日：2013-03-15

Applicant: MELLANOX TECHNOLOGIES LTD.

Inventor： Liron Mula ,  Ran Ravid ,  Chen Gaist ,  Omer Sela ,  Oren Tzvi Sela

IPC: H03M13/15

CPC classification number: H03M13/1515 ,  H03M13/153 ,  H03M13/1575 ,  H03M13/3715

Abstract: Methods and systems for efficient Reed-Solomon (RS) decoding are provided. The RS decoding unit includes both an RS pseudo decoder and an RS decoder. The RS pseudo decoder is configured to correct a small number of errors in a received codeword, while the RS decoder is configured to correct errors that are recoverable by the RS code. The RS pseudo decoder runs in parallel with the RS decoder. Once the RS pseudo decoder successfully decodes the codeword, the RS decoder may stop its processing, thereby reducing the RS decoding latency.

Abstract translation: 提供了有效的里德 - 所罗门（RS）解码的方法和系统。 RS解码单元包括RS伪解码器和RS解码器。 RS伪解码器被配置为校正接收到的码字中的少量错误，而RS解码器被配置为校正可由RS码恢复的错误。 RS伪解码器与RS解码器并行运行。 一旦RS伪解码器成功解码码字，则RS解码器可能停止其处理，从而降低RS解码延迟。

公开(公告)号：US20140269711A1

公开(公告)日：2014-09-18

申请号：US13802926

申请日：2013-03-14

Applicant: MELLANOX TECHNOLOGIES LTD.

Inventor： Ran Ravid ,  Zachy Haramaty ,  Roy Kriss ,  Oded Wertheim

IPC: H04L12/747 ,  H04L12/879

CPC classification number: H04L45/742 ,  H04L47/125 ,  H04L47/30 ,  H04L47/39

Abstract: A method for communication includes, in a sender node that sends packets to a receiver node over a physical link, making a decision, for a packet that is associated with a respective virtual link selected from among multiple virtual links, whether the receiver node is to buffer the packet in a dedicated buffer assigned to the respective virtual link or in a shared buffer that is shared among the multiple virtual links. The packet is sent, and the decision is signaled, from the sender node to the receiver node.

Abstract translation: 一种用于通信的方法包括：在通过物理链路向接收方节点发送分组的发送方节点对与从多个虚拟链路中选择的相应虚拟链路相关联的分组作出决定，接收方节点是否 在分配给相应虚拟链路的专用缓冲器中或在多个虚拟链路之间共享的共享缓冲器中缓冲分组。 从发送方节点向接收方节点发送分组，并发送决定信号。