公开(公告)号：US5606215A

公开(公告)日：1997-02-25

申请号：US644925

申请日：1996-05-13

Applicant: James E. Jaskie ,  Lawrence N. Dworsky ,  Dean Barker

Inventor： James E. Jaskie ,  Lawrence N. Dworsky ,  Dean Barker

IPC: H01J9/02 ,  H01J1/304 ,  H01J1/02

CPC classification number: H01J1/3042 ,  H01J2201/319

Abstract: A field emission device (10) has a gate (17) including an opening (22) for the communication of electrons from an emitter (14) to an anode (16). A resistive layer (18) is disposed at least on the inner surface (23) of the gate (17) surrounding the opening (22). The field emission device (10) may further include an insulating, dielectric layer (19). The resistive layer (18) and the dielectric layer (19) reduce arcing between the emitter (14) and the gate (17) in the field emission device (10).

Abstract translation: 场发射器件（10）具有栅极（17），栅极（17）包括用于使电子从发射极（14）连接到阳极（16）的开口（22）。 电阻层（18）至少设置在围绕开口（22）的栅极（17）的内表面（23）上。 场发射器件（10）还可以包括绝缘介电层（19）。 电阻层（18）和电介质层（19）减少场致发射器件（10）中的发射极（14）和栅极（17）之间的电弧。

公开(公告)号：US5564959A

公开(公告)日：1996-10-15

申请号：US269229

申请日：1994-06-29

Applicant: Christopher J. Spindt ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Peter C. Searson

Inventor： Christopher J. Spindt ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Peter C. Searson

IPC: H01J1/30 ,  H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J29/04 ,  H01J31/12

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319

Abstract: Gated electron emitters are fabricated by processes in which charged particles are passed through a track layer (24, 48, or 144) to form charged-particle tracks (26.sub.1, 50.sub.1, or 146.sub.1). The track layer is etched along the tracks to create open spaces (28.sub.1, 52.sub.1, or 148.sub.1). Electron-emissive elements (30 or 142D) can then be formed at locations respectively centered on the open spaces after which a patterned gate layer (34B, 40B, or 158C) is provided. Alternatively, the open spaces in the track layer can be employed to etch corresponding apertures (54.sub.1) through an underlying non-insulating layer (46) which typically serves as the gate layer. An etch is performed through the apertures to form dielectric open spaces (56.sub.1, 96.sub.1, or 114.sub.1) in an insulating layer (24) that lies below the non-insulating layer. Electron-emissive elements (30B, 30/88D.sub.1, 98/102.sub.1, or 118.sub.1) can subsequently be provided, typically in the dielectric open spaces.

Abstract translation: 门电子发射器通过其中带电粒子通过轨道层（24,48或144）以形成带电粒子轨道（261,501或1461）的工艺制造。 轨道层沿着轨道被蚀刻以创建开放空间（281,521或1481）。 然后可以在分开以开放空间为中心的位置处形成电子发射元件（30或142D），之后设置图案化栅极层（34B，40B或158C）。 或者，轨道层中的开放空间可用于通过通常用作栅极层的下面的非绝缘层（46）蚀刻相应的孔（541）。 通过孔进行蚀刻，以在位于非绝缘层下方的绝缘层（24）中形成介电开放空间（561,961或1141）。 随后可以提供电子发射元件（30B，30 / 88D1,98 / 1011或1181），通常在电介质开放空间中。

公开(公告)号：US5562516A

公开(公告)日：1996-10-08

申请号：US447470

申请日：1995-05-22

Applicant: Christopher J. Spindt ,  John M. Macaulay

Inventor： Christopher J. Spindt ,  John M. Macaulay

IPC: H01J1/304 ,  H01J3/02 ,  H01J9/02

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319

Abstract: A gated area field emitter is fabricated according to a process in which charged-particle tracks are utilized in creating small electron-emissive elements self-aligned to corresponding gate openings in the gate electrode. The electron-emissive elements can have various shapes, including (a) a pedestal, typically a filament, having a pointed tip, (b) a cone, and (c) a combination of a pedestal and an overlying cone whose base diameter is greater than the pedestal's diameter. Each electron-emissive element can be formed as a highly resistive portion and an overlying electron-emissive portion.

Abstract translation: 门控区域场发射器是根据一种工艺制造的，其中带电粒子轨迹用于产生与栅电极中相应的栅极开口自对准的小电子发射元件。 电子发射元件可以具有各种形状，包括（a）具有尖端的基座（通常为细丝），（b）锥体，和（c）底座和上部锥体的组合，其底部直径较大 比基座的直径。 每个电子发射元件可以形成为高电阻部分和上覆电子发射部分。

公开(公告)号：US5559389A

公开(公告)日：1996-09-24

申请号：US158102

申请日：1993-11-24

Applicant: Christopher J. Spindt ,  John M. Macaulay

Inventor： Christopher J. Spindt ,  John M. Macaulay

IPC: H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J1/30

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319

Abstract: A gated electron-emitting device contains a multiplicity of electron-emissive elements, each formed with a pedestal (98) and an overlying cone (94.sub.1). In each electron-emissive element, the base diameter of the cone is greater than the element, the base diameter of the cone is greater than the diameter of the pedestal. With the pedestal being electrically conductive, the cone may be electrically resistive. Alternatively, each electron-emissive element can be an elongated element (30B) that reaches a maximum diameter at a point between, and spaced apart from, both ends of the element.

Abstract translation: 门控电子发射器件包含多个电子发射元件，每个形成有基座（98）和上覆锥体（941）。 在每个电子发射元件中，锥体的基部直径大于元件，锥体的基部直径大于基座的直径。 当基座导电时，锥体可以是电阻的。 或者，每个电子发射元件可以是细长元件（30B），该元件在该元件的两端之间的点之间达到最大直径，并且间隔开。

公开(公告)号：US5557159A

公开(公告)日：1996-09-17

申请号：US341740

申请日：1994-11-18

Applicant: Robert H. Taylor ,  Kenneth G. Vickers ,  Bruce E. Gnade ,  Arthur M. Wilson ,  Charies E. Primm

Inventor： Robert H. Taylor ,  Kenneth G. Vickers ,  Bruce E. Gnade ,  Arthur M. Wilson ,  Charies E. Primm

IPC: H01J1/304 ,  H01J1/30 ,  H01J29/04

CPC classification number: H01J1/3042 ,  H01J2201/319

Abstract: The emitter plate 60 of a field emission flat panel display device includes a layer 68 of a resistive material and a mesh-like structure 62 of an electrically conductive material. A conductive plate 78 is also formed on top of resistive coating 68 within the spacing defined by the meshes of conductor 62. Microtip emitters 70, illustratively in the shape of cones, are formed on the upper surface of conductive plate 78. With this configuration, all of the microtip emitters 70 will be at an equal potential by virtue of their electrical connection to conductive plate 78. In one embodiment, a single conductive plate 82 is positioned within each mesh spacing of conductor 80; in another embodiment, four conductive plates 92 are symmetrically positioned within each mesh spacing of conductor 90. Also disclosed is an arrangement of emitter clusters comprising conductive plates 102 having a plurality of microtip emitters 104 formed thereon, each cluster adjacent and laterally spaced from a stripe conductor 100 by a region 106 of a resistive material. The conductive stripes 100 are substantially parallel to each other, are spaced from one another by two conductive plates 102, and are joined by bus regions 110 outside the active area of the display.

Abstract translation: 场发射平板显示装置的发射极板60包括电阻材料层68和导电材料的网状结构62。 在由导体62的网格限定的间隔内，还在电阻涂层68的顶部形成导电板78.导电板78的上表面上形成了示意为锥体形状的微尖头发射体70。 通过它们与导电板78的电连接，所有微尖端发射器70将处于相等的电位。在一个实施例中，单个导电板82位于导体80的每个网格间隔内; 在另一个实施例中，四个导电板92对称地定位在导体90的每个网格间隔内。还公开了发射器​​簇的布置，其包括导电板102，其具有形成在其上的多个微尖端发射器104，每个簇相邻并且横向间隔开条带 导体100由电阻材料的区域106。 导电条100基本上彼此平行，通过两个导电板102彼此隔开，并且通过显示器的有效区域外的总线区域110连接。

公开(公告)号：US5550435A

公开(公告)日：1996-08-27

申请号：US330582

申请日：1994-10-28

Applicant: Toshihide Kuriyama ,  Hideo Makishima

Inventor： Toshihide Kuriyama ,  Hideo Makishima

IPC: H01J1/304 ,  G09G3/10

CPC classification number: H01J1/3042 ,  H01J2201/319

Abstract: It is the object of the invention to provide a field emission cathode apparatus comprising plural electron-emitters which eliminates nonuniformity of electric emission density over an emissive area, controls emission currents by active devices, and improves reliability of the apparatus. P-type silicon 5 and n-type silicon 4 are formed on n.sup.+ -type silicon 6. On n-type silicon 4, an electron-emitter 1 made of Mo is formed, and electron-emitter 1 is surrounded by a grid electrode 2 and an insulator layer 3. N-type silicon 4 serves as a channel region of a junction gate field effect transistor, and a current flowing through it is controlled by a voltage applied to p-type silicon 5. Accordingly, an electron current emitted from electron-emitter 1 is also controlled by this transistor, and by setting up an operation region of this transistor in a saturation current region, nonuniformity of electron emissions from electron-emitters can be improved. Even when a portion of cathodes is damaged, the damage is not magnified to the whole apparatus, and the life of the field emission cathode can be prolonged.

Abstract translation: 本发明的目的是提供一种包括多个电子发射器的场发射阴极装置，其消除发射区域上的发射密度不均匀，通过有源器件控制发射电流，并提高装置的可靠性。 P型硅5和n型硅4形成在n +型硅6上。在n型硅4上形成由Mo制成的电子发射体1，并且电子发射体1被栅极2包围 和绝缘体层3.N型硅4用作结栅场效应晶体管的沟道区，并且流过其的电流由施加到p型硅5的电压控制。因此，从 电子发射体1也由该晶体管控制，并且通过在饱和电流区域中设置该晶体管的操作区域，可以提高来自电子发射体的电子发射的不均匀性。 即使当阴极的一部分被损坏时，损坏也不会放大到整个设备，并且可以延长场致发射阴极的寿命。

公开(公告)号：US5525857A

公开(公告)日：1996-06-11

申请号：US292915

申请日：1994-08-19

Applicant: Bruce Gnade ,  Chih-Chen Cho ,  Jules D. Levine

Inventor： Bruce Gnade ,  Chih-Chen Cho ,  Jules D. Levine

IPC: H01J1/304 ,  H01J1/30

CPC classification number: H01J1/3042 ,  H01J2201/319 ,  H01J2329/00

Abstract: A porous dielectric material such as silica-based aerogel is used as the dielectric layer 48 between the gate and the cathode on the emitter plate 12 of a field emission device. Aerogel, which can have a relative dielectric constant as low as 1.03, is deposited over the resistive layer 44 of the emitter plate 12. Metal layer 49, functioning as the gate electrode, is subsequently deposited over the aerogel layer 48. The use of aerogel as a gate dielectric reduces power consumption. In a disclosed embodiment, aerogel layer 48 is comprised of sublayers 48a, 48b, and 48c of aerogels of differing densities, thereby providing better adhesion of the aerogel gate dielectric to both the resistive layer 44 and metal layer 49. Methods of fabricating the aerogel gate dielectric are disclosed.

Abstract translation: 诸如二氧化硅基气凝胶之类的多孔电介质材料被用作场发射器件的发射极板12上的栅极和阴极之间的电介质层48。 可以具有低至1.03的相对介电常数的气凝胶沉积在发射极板12的电阻层44上。作为栅极的金属层49随后沉积在气凝胶层48上。使用气凝胶 作为栅极电介质降低功耗。 在公开的实施例中，气凝胶层48由不同密度的气凝胶的子层48a，48b和48c组成，从而提供气凝胶栅极电介质与电阻层44和金属层49两者的更好的附着。制造气凝胶门 电介质。

公开(公告)号：US5475280A

公开(公告)日：1995-12-12

申请号：US298065

申请日：1994-08-30

Applicant: Gary W. Jones ,  Ching-Tzong Sune

Inventor： Gary W. Jones ,  Ching-Tzong Sune

IPC: H01J1/304 ,  H01J9/02 ,  H01J29/04 ,  H01J29/87 ,  H01J31/12 ,  H01J1/30

CPC classification number: H01J3/021 ,  H01J1/3042 ,  H01J9/025 ,  H01J2201/319

Abstract: A vertical microelectronic field emitter includes a conductive top portion and a resistive bottom portion in an elongated column which extends vertically from a horizontal substrate. An emitting electrode may be formed at the base of the column, and an extraction electrode may be formed adjacent the top of the column. The elongated column reduces the parasitic capacitance of the microelectronic field emitter to provide high speed operation, while providing uniform column-to-column resistance. The field emitter may be formed by first forming tips on the face of a substrate and then forming trenches in the substrate around the tips to form columns in the substrate, with the tips lying on top of the columns. The trenches are filled with a dielectric and a conductor layer is formed on the dielectric. Alternatively, trenches may be formed in the face of the substrate with the trenches defining columns in the substrate. Then, tips are formed on top of the columns. The trenches are filled with dielectric and the conductor layer is formed on the dielectric to form the extraction electrodes.

Abstract translation: 垂直微电子场发射器包括从水平衬底垂直延伸的细长柱中的导电顶部部分和电阻底部部分。 可以在柱的基部形成发光电极，并且可以在柱的顶部附近形成引出电极。 细长柱减小了微电子场发射器的寄生电容，以提供高速操作，同时提供均匀的柱对列电阻。 场发射器可以通过在衬底的表面上首先形成尖端然后在衬底周围形成尖端的沟槽形成衬底中的柱，其中尖端位于柱的顶部。 沟槽填充有电介质，并且在电介质上形成导体层。 或者，可以在衬底的表面形成沟槽，其中沟槽限定在衬底中的列。 然后，尖端形成在列的顶部。 沟槽用电介质填充，并且导体层形成在电介质上以形成提取电极。

公开(公告)号：US5466982A

公开(公告)日：1995-11-14

申请号：US101123

申请日：1993-10-18

Applicant: Akintunde I. Akinwande

Inventor： Akintunde I. Akinwande

IPC: H01J1/304 ,  H01J31/12 ,  H01J1/30

CPC classification number: H01J1/3042 ,  H01J31/127 ,  H01J2201/319

Abstract: A field emitter structure with emitter edge comprising of individual comb elements. A resistive film is inserted between the lead-in conductor and the emitter edge and a conductive film is electrically attached to the conductor and capacitively coupled to the emitter.

Abstract translation: 具有发射极边缘的场发射体结构，其包括各个梳状元件。 电阻膜插入在引入导体和发射极边缘之间，导电膜电连接到导体并电容耦合到发射极。

公开(公告)号：US5449970A

公开(公告)日：1995-09-12

申请号：US995846

申请日：1992-12-23

Applicant: Nalin Kumar ,  Chenggang Xie

Inventor： Nalin Kumar ,  Chenggang Xie

IPC: G09G3/22 ,  G09G3/30 ,  H01J1/304 ,  H01J9/02 ,  H01J29/04 ,  H01J29/08 ,  H01J29/28 ,  H01J31/12 ,  H01J61/067 ,  H01J63/06 ,  H01J1/30

CPC classification number: H01J1/304 ,  G09G3/22 ,  H01J1/3042 ,  H01J29/085 ,  H01J31/127 ,  H01J61/0677 ,  H01J63/06 ,  H01J9/027 ,  H01J2201/304 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/319 ,  H01J2329/8625 ,  H01J2329/864

Abstract: A matrix-addressed diode flat panel display of field emission type is described, utilizing a diode (two terminal) pixel structure. The flat panel display includes a cathode assembly having a plurality of cathodes, each cathode including a layer of cathode conductive material and a layer of a low effective work-function material deposited over the cathode conductive material and an anode assembly having a plurality of anodes, each anode including a layer of anode conductive material and a layer of cathodoluminescent material deposited over the anode conductive material, the anode assembly located proximate the cathode assembly to thereby receive charged particle emissions from the cathode assembly, the cathodoluminescent material emitting light in response to the charged particle emissions. The flat panel display further includes the capability for selectively varying field emission between the plurality of corresponding light-emitting anodes and field-emission cathodes to thereby effect an addressable grey-scale operation of the flat panel display.

Abstract translation: 利用二极管（二端）像素结构描述场发射型矩阵寻址二极管平板显示器。 平板显示器包括具有多个阴极的阴极组件，每个阴极包括阴极导电材料层和沉积在阴极导电材料上的低有效功函数材料层和具有多个阳极的阳极组件， 每个阳极包括阳极导电材料层和沉积在阳极导电材料上的阴极发光材料层，阳极组件位于阴极组件附近，从而接收来自阴极组件的带电粒子发射，阴极发光材料响应于 带电粒子排放。 平板显示器还包括用于选择性地改变多个对应的发光阳极和场致发射阴极之间的场发射的能力，从而实现平板显示器的可寻址的灰度级操作。