利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

20 条记录 (耗时 0.013 秒)

    PERFORMANCE ENHANCEMENT THROUGH USE OF HIGHER STABILITY REGIONS AND SIGNAL PROCESSING IN NON-IDEAL QUADRUPOLE MASS FILTERS
    6.
    发明申请
    PERFORMANCE ENHANCEMENT THROUGH USE OF HIGHER STABILITY REGIONS AND SIGNAL PROCESSING IN NON-IDEAL QUADRUPOLE MASS FILTERS 有权
    通过使用高可靠性区域和信号处理在非理想的四重质量过滤器中的性能提升

    公开(公告)号：US20090026363A1

    公开(公告)日：2009-01-29

    申请号：US12168407

    申请日：2008-07-07

    申请人： Kerry Cheung ,  Luis F. Velasquez-Garcia ,  Akintunde I. Akinwande

    发明人： Kerry Cheung ,  Luis F. Velasquez-Garcia ,  Akintunde I. Akinwande

    IPC分类号： B01D59/44

    CPC分类号： H01J49/4215 ,  H01J49/0018 ,  H01J49/4275

    摘要： A quadrupole mass filter (QMF) is provided. The QMF includes a plurality of rectangular shaped electrodes aligned in a symmetric manner to generate a quadrupole field. An aperture region is positioned in a center region parallel to and adjacent to each of the rectangular shaped electrodes. An incoming ion stream enters the aperture region so as to be controlled by the quadrupole field. A plurality of voltage sources provide a r.f. and d.c. signal to the electrodes for generating the quadrupole field. An auxiliary voltage source applies an auxiliary drive signal to the r.f. and d.c. signal to create new stability boundaries within the standard Mathieu stability regions with high-resolution around operating conditions where there are approximately no higher-order resonances.

    摘要翻译： 提供四极质量过滤器（QMF）。 QMF包括以对称方式对准的多个矩形电极以产生四极场。 开口区域位于与每个矩形电极平行并相邻的中心区域中。 进入的离子流进入孔径区域，以便由四极场控制。 多个电压源提供一个r.f. 和d.c. 信号到电极以产生四极场。 辅助电压源向r.f施加辅助驱动信号。 和d.c. 信号，以在具有高分辨率的标准Mathieu稳定区域内创建新的稳定性边界，其周围几乎没有高阶谐振。

    Thick porous anodic alumina films and nanowire arrays grown on a solid substrate
    7.
    发明授权
    Thick porous anodic alumina films and nanowire arrays grown on a solid substrate 失效
    在固体基底上生长的厚多孔阳极氧化铝膜和纳米线阵列

    公开(公告)号：US07267859B1

    公开(公告)日：2007-09-11

    申请号：US10303653

    申请日：2002-11-25

    申请人： Oded Rabin ,  Paul R. Herz ,  Mildred S. Dresselhaus ,  Akintunde I. Akinwande ,  Yu-Ming Lin

    发明人： Oded Rabin ,  Paul R. Herz ,  Mildred S. Dresselhaus ,  Akintunde I. Akinwande ,  Yu-Ming Lin

    IPC分类号： B32B3/10 ,  B32B9/00 ,  B32B15/00 ,  G03C5/00 ,  C23C28/00

    CPC分类号： C23C14/024 ,  B82Y30/00 ,  C23C14/16 ,  C23C14/5873 ,  C30B7/00 ,  C30B7/005 ,  C30B29/605 ,  H01L35/32 ,  H01L35/34 ,  Y10T156/10 ,  Y10T428/12486 ,  Y10T428/1259 ,  Y10T428/24273 ,  Y10T428/24322 ,  Y10T428/24917

    摘要： The presently disclosed invention provides for the fabrication of porous anodic alumina (PAA) films on a wide variety of substrates. The substrate comprises a wafer layer and may further include an adhesion layer deposited on the wafer layer. An anodic alumina template is formed on the substrate. When a rigid substrate such as Si is used, the resulting anodic alumina film is more tractable, easily grown on extensive areas in a uniform manner, and manipulated without danger of cracking. The substrate can be manipulated to obtain free-standing alumina templates of high optical quality and substantially flat surfaces PAA films can also be grown this way on patterned and non-planar surfaces. Furthermore, under certain conditions the resulting PAA is missing the barrier layer (partially or completely) and the bottom of the pores can be readily accessed electrically. The resultant film can be used as a template for forming an array of nanowires wherein the nanowires are deposited electrochemically into the pores of the template. By patterning the electrically conducting adhesion layer, pores in different areas of the template can be addressed independently, and can be filled electrochemically by different materials. Single-stage and multi-stage nanowire-based thermoelectric devices, consisting of both n-type and p-type nanowires, can be assembled on a silicon substrate by this method.

    摘要翻译： 目前公开的发明提供了在各种基底上制造多孔阳极氧化铝（PAA）膜。 衬底包括晶片层，并且还可以包括沉积在晶片层上的粘附层。 在基板上形成阳极氧化铝模板。 当使用诸如Si的刚性基材时，所得的阳极氧化铝膜更易于处理，容易在均匀的方式在广泛的区域生长，并且操作而没有开裂的危险。 可以操作基底以获得高光学质量的自立式氧化铝模板和基本平坦的表面。也可以在图案化和非平面表面上生长PAA膜。 此外，在某些条件下，所得PAA缺少阻挡层（部分或完全），并且孔的底部可以容易地电接触。 所得膜可以用作形成纳米线阵列的模板，其中纳米线电化学沉积到模板的孔中。 通过图案化导电粘合层，可以独立地解决模板的不同区域中的孔，并且可以通过不同的材料电化学填充。 通过这种方法，可以在硅衬底上组装由n型和p型纳米线组成的单级和多级纳米线型热电装置。

    FLEXIBLE HIGH-VOLTAGE THIN FILM TRANSISTORS
    9.
    发明申请
    FLEXIBLE HIGH-VOLTAGE THIN FILM TRANSISTORS 有权
    柔性高压薄膜晶体管

    公开(公告)号：US20150001539A1

    公开(公告)日：2015-01-01

    申请号：US14380270

    申请日：2013-02-22

    申请人： Melissa Alyson Smith ,  Akintunde I. Akinwande

    发明人： Melissa Alyson Smith ,  Akintunde I. Akinwande

    IPC分类号： H01L29/786 ,  H01L29/51 ,  B81B3/00 ,  H01L29/49

    CPC分类号： H01L29/78663 ,  B81B3/0086 ,  B81B2207/015 ,  H01L29/4908 ,  H01L29/51 ,  H01L51/0054 ,  H01L51/0055 ,  H01L51/0097 ,  H01L51/0533 ,  H01L51/10 ,  Y02E10/549

    摘要： A flexible high-voltage thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a dielectric layer, and a flexible semiconductor layer. The flexible semiconductor layer serves as a channel for the transistor and is in electrical communication with the source electrode and the drain electrode. The drain electrode is laterally offset from the gate electrode. The dielectric layers is configured and arranged with respect to other elements of the transistor such that the transistor is stably operable to facilitate switching of relatively high drain voltages using relatively small controlling gate voltages.

    摘要翻译： 柔性高压薄膜晶体管包括栅电极，源电极，漏电极，电介质层和柔性半导体层。 柔性半导体层用作晶体管的沟道，并与源电极和漏电极电连通。 漏电极与栅电极横向偏移。 电介质层相对于晶体管的其他元件配置和布置，使得晶体管稳定可操作以便利用相对小的控制栅极电压来切换相对高的漏极电压。

    Dense array of field emitters using vertical ballasting structures
    10.
    发明授权
    Dense array of field emitters using vertical ballasting structures 有权
    使用垂直压载结构的致密阵列的场发射器

    公开(公告)号：US08198106B2

    公开(公告)日：2012-06-12

    申请号：US12233859

    申请日：2008-09-19

    申请人： Akintunde I. Akinwande ,  Luis Fernando Velásquez-García

    发明人： Akintunde I. Akinwande ,  Luis Fernando Velásquez-García

    IPC分类号： H01L21/00

    CPC分类号： H01J1/3042 ,  H01J2201/319

    摘要： A field emitter array structure is provided. The field emitter array structure includes a plurality of vertical un-gated transistor structures formed on a semiconductor substrate. The semiconductor substrate includes a plurality of vertical pillar structures to define said un-gated transistor structures. A plurality of emitter structures are formed on said vertical un-gated transistor structures. Each of said emitter structures is positioned in a ballasting fashion on one of said vertical un-gated transistor structures so as to allow said vertical ungated transistor structure to effectively provide high dynamic resistance with large saturation currents.

    摘要翻译： 提供场发射器阵列结构。 场发射极阵列结构包括形成在半导体衬底上的多个垂直未门控晶体管结构。 半导体衬底包括多个垂直柱结构，以限定所述未门控晶体管结构。 在所述垂直非门控晶体管结构上形成多个发射极结构。 所述发射极结构中的每一个以压载方式定位在所述垂直非门控晶体管结构之一上，以便允许所述垂直非门控晶体管结构有效地提供具有较大饱和电流的高动态电阻。