公开(公告)号：US20090315140A1

公开(公告)日：2009-12-24

申请号：US12548623

申请日：2009-08-27

Applicant: George K. Celler

Inventor： George K. Celler

IPC: H01L27/12

CPC classification number: H01L21/2007 ,  H01L21/02032 ,  H01L21/67346 ,  H01L2221/68359 ,  H01L2221/68368

Abstract: A method for forming a device wafer with a recyclable support by providing a wafer having first and second surfaces, with at least the first surface of the wafer comprising a semiconductor material that is suitable for receiving or forming electronic devices thereon, providing a supporting substrate having upper and lower surfaces, and providing the second surface of the wafer or the upper surface of the supporting substrate with void features in an amount sufficient to enable a connecting bond therebetween to form a construct wherein the bond is formed at an interface between the wafer and the substrate and is suitable to maintain the wafer and supporting substrate in association while forming or applying electronic devices to the first surface of the wafer, but which connecting bond is severable at the interface due to the void features to separate the substrate from the wafer so that the substrate can be reused.

Abstract translation: 一种用于通过提供具有第一和第二表面的晶片形成具有可回收支撑件的装置晶片的方法，至少晶片的第一表面包括适于在其上接收或形成电子器件的半导体材料，提供支撑衬底，其具有 并且提供晶片的第二表面或支撑衬底的上表面的空隙特征，其量足以使得它们之间的连接结合形成结构，其中所述结合形成在晶片和 并且适合于将晶片和支撑基板保持在一起，同时将电子器件形成或施加到晶片的第一表面，但是由于空隙特征使得该基片与晶片分离，而在该界面处的连接接合是可分离的，因此 基材可以重复使用。

公开(公告)号：US07601611B2

公开(公告)日：2009-10-13

申请号：US11147575

申请日：2005-06-07

Applicant: Ian Cayrefourcq ,  Fabrice Letertre ,  Bruno Ghyselen

Inventor： Ian Cayrefourcq ,  Fabrice Letertre ,  Bruno Ghyselen

IPC: H01L21/30

CPC classification number: H01L21/76254 ,  H01L21/76251

Abstract: A method of fabricating a structure that includes at least one semiconductor material for applications in microelectronics, optoelectronics or optics. The method includes transferring, onto a support made of a first material, a thin monocrystalline layer made of a second material that differs from the first material, and performing a predetermined heat treatment carrying out at least one strengthening step on a bonding interface between the thin layer and the support. The thickness of the thin layer is selected as a function of the difference between the coefficients of thermal expansion of the first and second materials and as a function of parameters of predetermined heat treatment, such that the stresses exerted by the heat treatment on the assembly of the support and the transferred thin layer leaves the assembly intact. The method further includes depositing an additional thickness of the second material in the monocrystalline state on the thin layer to thicken it. The method is useful for fabrication of hetero-substrates with a relatively thick useful layer.

Abstract translation: 一种制造包括用于微电子学，光电子学或光学学中的至少一种半导体材料的结构的方法。 该方法包括将由第一材料制成的支撑体转移到与第一材料不同的第二材料制成的薄单晶层上，并且进行至少一个加强步骤的预定热处理，该加强步骤在薄的 层和支持。 选择薄层的厚度作为第一和第二材料的热膨胀系数之间的差异的函数，并且作为预定热处理的参数的函数，使得通过热处理施加在组件上的应力 支撑和转移的薄层离开组件完好无损。 该方法还包括在薄层上沉积单晶状态的第二材料的附加厚度以使其变稠。 该方法可用于制造具有相对厚的有用层的异质衬底。

公开(公告)号：US07585748B2

公开(公告)日：2009-09-08

申请号：US11389469

申请日：2006-03-24

Applicant: Jean-Pierre Raskin ,  Dimitri Lederer ,  François Brunier

Inventor： Jean-Pierre Raskin ,  Dimitri Lederer ,  François Brunier

IPC: H01L21/30 ,  H01L21/46

CPC classification number: H01P3/006 ,  H01L21/76254 ,  H01L2223/6627 ,  H01L2924/1903

Abstract: The invention relates to a process for manufacturing a multilayer structure made from semiconducting materials that include an active layer, a support layer and an electrically insulating layer between the active layer and the support layer. The process includes the step of modifying the density of carrier traps or the electrical charge within the electrically insulating layer in order to minimize electrical losses in the structure support layer.

Abstract translation: 本发明涉及一种用于制造由半导体材料制成的多层结构的方法，所述半导体材料包括有源层，支撑层和在有源层和支撑层之间的电绝缘层。 该方法包括改变载流子阱的密度或电绝缘层内的电荷的步骤，以便最小化结构支撑层中的电损耗。

公开(公告)号：US07535115B2

公开(公告)日：2009-05-19

申请号：US11274264

申请日：2005-11-16

Applicant: Fabrice Letertre ,  Yves Mathieu Le Vaillant ,  Eric Jalaguier

Inventor： Fabrice Letertre ,  Yves Mathieu Le Vaillant ,  Eric Jalaguier

IPC: H01L23/58 ,  H01L23/544

CPC classification number: H01L21/76254 ,  H01L21/2258

Abstract: A method of producing a substrate that has a transfer crystalline layer transferred from a donor wafer onto a support. The transfer layer can include one or more foreign species to modify its properties. In the preferred embodiment an atomic species is implanted into a zone of the donor wafer that is substantially free of foreign species to form an embrittlement or weakened zone below a bonding face thereof, with the weakened zone and the bonding face delimiting a transfer layer to be transferred. The donor wafer is preferably then bonded at the level of its bonding face to a support. Stresses are then preferably applied to produce a cleavage in the region of the weakened zone to obtain a substrate that includes the support and the transfer layer. Foreign species are preferably diffused into the thickness of the transfer layer prior to implanbumtation or after cleavage to modify the properties of the transfer layer, preferably its electrical or optical properties. The preferred embodiment produces substrates with a thin InP layer rendered semi-insulating by iron diffusion.

Abstract translation: 一种制备具有从施主晶片转移到载体上的转移晶体层的衬底的方法。 转移层可以包括一种或多种外来物质来改变其性质。 在优选的实施方案中，将原子物质注入到施主晶片的基本上不含外来物质的区域中，以在其接合面下面形成脆化或弱化区域，其中弱化区域和键合面限定转移层为 转入。 然后优选地，施主晶片在其结合面的水平面处结合到支撑体上。 然后优选施加应力以在弱化区域的区域中产生切割，以获得包括载体和转移层的基底。 外来物质优选在植入之前或切割后扩散到转移层的厚度中，以改变转移层的性质，优选其电学或光学性质。 优选实施例产生具有通过铁扩散而半绝缘的薄InP层的衬底。

公开(公告)号：US07485545B2

公开(公告)日：2009-02-03

申请号：US11328061

申请日：2006-01-10

Applicant: Nadia Ben Mohamed ,  Eric Neyret ,  Daniel Delprat

Inventor： Nadia Ben Mohamed ,  Eric Neyret ,  Daniel Delprat

IPC: H01L21/302

CPC classification number: H01L21/76224 ,  H01L21/76254

Abstract: A method for configuring a process for treating a semiconductor wafer. A minimum layer thickness of a transferred layer to be provided is determined to obtain a processed layer that has a preselected target thickness and target maximum density of through holes that extend completely therethrough, by conducting a predetermined finishing sequence of operations that improve the surface quality of the layer. The minimum thickness is determined such that the density of through holes remains below the target maximum density after each operation in the finishing sequence.

Abstract translation: 一种用于配置半导体晶片处理工艺的方法。 确定要提供的转移层的最小层厚度，以获得具有预选的目标厚度和通过其完全延伸的通孔的目标最大密度的处理层，通过进行预定的整理操作顺序来提高表面质量 层。 确定最小厚度，使得在整理顺序中的每个操作之后，通孔的密度保持低于目标最大密度。

公开(公告)号：US07466907B2

公开(公告)日：2008-12-16

申请号：US11434260

申请日：2006-05-16

Applicant: Walter Schwarzenbach ,  Jean-Marc Waechter

Inventor： Walter Schwarzenbach ,  Jean-Marc Waechter

IPC: F26B19/00 ,  H01L2/46

CPC classification number: H01L21/67109 ,  C30B29/60 ,  C30B33/00 ,  C30B33/02 ,  H01L21/324 ,  H01L21/76254

Abstract: A device for use in a thermal annealing process for a wafer (T) of material chosen among the semiconductor materials for the purpose of detaching a layer from the wafer at an weakened zone. During annealing, the device applies (1) a basic thermal budget to the wafer, with the basic thermal budget being slightly inferior to the budget necessary to detach the layer, this budget being distributed in an even manner over the weakened zone; and (2) an additional thermal budget is also applied to the wafer locally in a set region of the weakened zone so as to initiate the detachment of the layer in this region.

Abstract translation: 一种用于在半导体材料中选择的材料的晶片（T）的热退火工艺的装置，用于在弱化区域从晶片上分离层。 在退火过程中，该设备将（1）基础热预算用于晶圆，其基本热量预算略低于分离层所需的预算，该预算以均匀方式分布在弱化区域; 和（2）在弱化区的设定区域中局部地对晶片施加额外的热预算，以便开始该区域中的层的分离。

公开(公告)号：US07465645B2

公开(公告)日：2008-12-16

申请号：US10766207

申请日：2004-01-29

Applicant: Walter Schwarzenbach ,  Christophe Maleville ,  Nadia Ben Mohamed

Inventor： Walter Schwarzenbach ,  Christophe Maleville ,  Nadia Ben Mohamed

IPC: H01L21/46 ,  H01L21/30

CPC classification number: H01L21/76254

Abstract: A method for detaching a layer from a wafer. A weakened zone is created in the wafer to define the layer to be detached and a remainder portion of the wafer, such that the weakened zone includes a main region and a localized super-weakened region that is more weakened than the main region. Detachment of the layer from the remainder portion of the wafer is initiated at the super-weakened region such that the detachment properties to the main region to detach the layer from the remainder portion.

Abstract translation: 一种从晶片上分离层的方法。 在晶片中产生弱化区以限定待分离的层和晶片的剩余部分，使得弱化区域包括主区域和比主区域更弱的局部超弱化区域。 在超弱化区域处开始从晶片的剩余部分分离层，使得到主区域的剥离性能使层与剩余部分分离。

公开(公告)号：US20080303113A1

公开(公告)日：2008-12-11

申请号：US12183538

申请日：2008-07-31

Applicant: Frederic Dupont ,  Ian Cayrefourcq

Inventor： Frederic Dupont ,  Ian Cayrefourcq

IPC: H01L31/00 ,  H01L31/18

CPC classification number: H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14687 ,  H01L27/1469

Abstract: A method of manufacturing a photodetecting device, by providing a first wafer that includes a photosensitive layer made of a semiconductor material and a second wafer that includes a circuit layer of electronic components, with one of the photosensitive layer or the circuit layer incorporating a field isolation layer; bonding the first and second wafers to form a structure comprising successively the circuit layer, the field isolation layer and the photosensitive layer; and forming electrically conductive vias to electrically connect the photosensitive layer to at least some of the electronic components of the circuit layer. Also, photodetecting devices prepared by these methods.

Abstract translation: 通过提供包括由半导体材料制成的感光层的第一晶片和包括电子部件的电路层的第二晶片，通过提供包含场隔离的感光层或电路层中的一个来制造光电检测器件的方法 层; 结合第一和​​第二晶片以形成连续地包括电路层，场隔离层和感光层的结构; 以及形成导电通孔以将感光层电连接到电路层的至少一些电子部件。 而且，通过这些方法制备的光检测装置。

公开(公告)号：US07459374B2

公开(公告)日：2008-12-02

申请号：US11674392

申请日：2007-02-13

Applicant: Cécile Aulnette ,  Christophe Figuet ,  Nicolas Daval

Inventor： Cécile Aulnette ,  Christophe Figuet ,  Nicolas Daval

IPC: H01L21/00 ,  H01L21/302

CPC classification number: H01L21/76254 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262

Abstract: A method for manufacturing a semiconductor heterostructure by first manufacturing a donor wafer having a first substrate with a first in-plane lattice parameter, a spatially graded buffer layer having a second in-plane lattice parameter, and a strained smoothing layer of a semiconductor material having a third in-plane lattice parameter which has a value between that of the first and second lattice parameters. A top layer is formed on the ungraded layer a top layer of a semiconductor material having a top surface, optionally with a superficial layer present on the top surface and having a thickness that is equal to or smaller than 10 nanometers. Next, a handle wafer of a second substrate having an insulator layer thereon is bonded with the donor wafer in such way that (a) the insulator layer of the handle wafer is bonded directly onto the top surface of the top layer of the donor wafer, or (b) the insulator layer of the handle wafer is bonded onto the superficial layer.

Abstract translation: 一种半导体异质结构的制造方法，首先制造具有第一面内晶格参数的第一衬底的施主晶片，具有第二面内晶格参数的空间渐变缓冲层，以及半导体材料的应变平滑化层， 具有第一和第二格子参数之间的值的第三平面晶格参数。 顶层在未分级层上形成具有顶表面的半导体材料的顶层，任选具有位于顶表面上的表层，并具有等于或小于10纳米的厚度。 接下来，其上具有绝缘体层的第二衬底的处理晶片与施主晶片接合，使得（a）把手晶片的绝缘体层直接接合到施主晶片顶层的顶表面上， 或者（b）把手晶片的绝缘体层结合到表面层上。

公开(公告)号：US07452792B2

公开(公告)日：2008-11-18

申请号：US11337267

申请日：2006-01-19

Applicant: Nicolas Daval ,  Zohra Chahra ,  Romain Larderet

Inventor： Nicolas Daval ,  Zohra Chahra ,  Romain Larderet

IPC: H01L21/20 ,  C30B1/02 ,  C30B1/10

CPC classification number: C30B33/00 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/76254

Abstract: The invention relates to a method of forming a layer of elastically unstrained crystalline material intended for electronics, optics, or optronics applications, wherein the method is carried out using a structure that includes a first crystalline layer which is elastically strained under tension (or respectively in compression) and a second crystalline layer which is elastically strained in compression (or respectively under tension), with the second layer being adjacent to the first layer. The method includes a step of diffusion between the two layers so that the differences between the respective compositions of the two layers is progressively reduced until they are substantially the same, so that the two layers then form just a single final layer of crystalline material having a composition which, in aggregate, is uniform, and wherein the respective compositions, thicknesses, and degrees of strain of the two layers are initially selected so that, after diffusion, the material then constituting the final layer no longer, in aggregate, exhibits elastic strain. The diffusion can be accomplished by heat treating the structure.

Abstract translation: 本发明涉及一种形成用于电子，光学或光电应用的弹性未应变结晶材料层的方法，其中该方法使用包括在张力下弹性应变的第一结晶层（或分别在 压缩）和在压缩（或分别在张力下）弹性应变的第二结晶层，其中第二层与第一层相邻。 该方法包括在两层之间扩散的步骤，使得两层的各组成之间的差异逐渐减小，直到它们基本相同，使得两层然后仅形成单一最终的结晶材料层，其具有 组合物，其总体上是均匀的，并且其中最初选择两层的各自组成，厚度和应变程度，使得在扩散之后，不再集中构成最终层的材料不再具有弹性应变 。 扩散可以通过热处理结构来实现。