公开(公告)号：US20140254710A1

公开(公告)日：2014-09-11

申请号：US13789682

申请日：2013-03-08

Applicant: TENSORCOM, INC.

Inventor： Zaw Soe

IPC: H04L25/03

CPC classification number: H04B1/02 ,  H03D7/165

Abstract: In an up-converter path of a transmitter, wide-band signal system like direct. conversion WiGig, a high pass filter (HPF) is placed in the baseband path after the low pass filter (LPF) but before the mixers. The baseband signal of WiGig can have a bandwidth of 800 MHz. The HPF removes the frequencies from 0-40 MHz from the baseband signal and degrades the overall signal of the baseband by a dB or so. However, the frequency pulling is significantly reduced since oscillator frequency and Radio frequency (RF) transmitter frequencies after conversion become further separated when compared a system using to the conventional approach. This causes the injected signal to fall outside the locking range of the oscillator. The concern of substrate coupling is reduced and allows for a reduction in the physical distance between the oscillator and the mixer and reduces a shift in the desired target frequency of operation.

Abstract translation: 在发射机的上变频器路径中，像直接的宽带信号系统。 转换WiGig，高通滤波器（HPF）放置在低通滤波器（LPF）之后但混频器之前的基带路径中。 WiGig的基带信号可以具有800 MHz的带宽。 HPF从基带信号中删除0-40 MHz的频率，并将基带的整体信号降低dB左右。 然而，与使用传统方法的系统进行比较时，振荡器频率和转换后的射频（RF）发射机频率变得更加分离时，频率牵引显着减少。 这会使注入的信号落在振荡器的锁定范围之外。 衬底耦合的问题被减少并且允许减小振荡器和混频器之间的物理距离，并减少所需目标操作频率的偏移。

公开(公告)号：US20140253216A1

公开(公告)日：2014-09-11

申请号：US13789681

申请日：2013-03-08

Applicant: TENSORCOM, INC.

Inventor： Zaw Soe ,  Tham KhongMeng

IPC: G06G7/16

CPC classification number: G06G7/16 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/165 ,  H03D2200/0019

Abstract: A cross coupled NMOS transistors providing a negative gm transistor feedback allows a mixer to saturate at a reduced input signal swing voltage when compared to a conventional mixer allowing the mixer to enter into the current mode operation at a reduced signal input voltage range. The linearity of the baseband signal path can be traded against the mixer gain and is improved if the signal swing in the baseband signal path is reduced. The input mixer transistors operate in the saturated mode at a reduced input signal swing voltage causing the power efficiency of the system to increase since the transmit chain operates at a class-D power efficient. Efficiency is very important in mobile applications to save and extend the battery power of a mobile phone providing a better utilization of the available power since most of that power is supplied to the energy of the outgoing modulated signal.

Abstract translation: 提供负gm晶体管反馈的交叉耦合NMOS晶体管使混频器能够与传统的混频器相比，作为降低的输入信号摆幅电压饱和，从而允许混频器在降低的信号输入电压范围内进入电流模式操作。 基带信号路径的线性度可以抵抗混频器增益进行交易，如果基带信号路径中的信号摆幅减小，则可以得到改善。 输入混频器晶体管以降低的输入信号摆幅电压在饱和模式下工作，导致系统的功率效率增加，因为发射链以D类功率有效工作。 在移动应用中，效率对于节省和扩展移动电话的电池电力是非常重要的，其提供了对可用功率的更好的利用，因为大部分功率被提供给输出调制信号的能量。

公开(公告)号：US20140043101A1

公开(公告)日：2014-02-13

申请号：US13572522

申请日：2012-08-10

Applicant: Jiashu Chen

Inventor： Jiashu Chen

IPC: H03F3/16

CPC classification number: H03F3/217 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2924/15311 ,  Y02D70/20

Abstract: The class-E amplifier can be tuned to pass only the fundamental frequency to the antenna by optimizing the second harmonics at the drain of the final PA driver transistor. A CPW in series with a capacitor between the PA transistor and the load forms a band pass filter that only allows the fundamental frequency to pass to the load of the antenna. A supply inductor to couple the drain of the final PA driver transistor to the power supply is tuned at the second harmonic with the parasitic capacitance of the drain of the PA transistor. A load capacitance is adjusted at the fundamental frequency to insure that the current waveform and voltage waveforms at the drain of the PA driver transistor do not overlap, thereby minimizing the parasitic power dissipation and allowing maximum energy to be applied to the antenna.

Abstract translation: 可以通过优化最终PA驱动器晶体管的漏极处的二次谐波，将E类放大器调谐为仅将基频通过天线。 与PA晶体管和负载之间的电容器串联的CPW形成只允许基频通过天线负载的带通滤波器。 将最终PA驱动器晶体管的漏极耦合到电源的电源电感器被调谐在具有PA晶体管的漏极的寄生电容的二次谐波处。 负载电容被调整到基频，以确保PA驱动晶体管的漏极处的电流波形和电压波形不重叠，从而最小化寄生功率耗散，并允许最大的能量施加于天线。

公开(公告)号：US20140022135A1

公开(公告)日：2014-01-23

申请号：US13552943

申请日：2012-07-19

Applicant: HungYu David Yang

Inventor： HungYu David Yang

IPC: H01Q9/16

CPC classification number: H01Q9/16 ,  H01L2224/16227 ,  H01Q9/0485 ,  H01Q13/085

Abstract: The LTCC (Low Temperature Co-fired Ceramic) substrate is used to form an antenna structure operating at 60 GHz. The dielectric constant is high and ranges from 5 to 8. The substrate thickness is fabricated with a thickness between 360 μm to 700 μm. The large dielectric constant and large thickness of the substrate creates a guiding wave in the LTCC that forms an endfire antenna. A high gain signal of 10 dB in a preferred direction occurs by placing the microstrip fed dipole structure in the center of the LTCC substrate creating a dielectric cavity resonator. The creation of a slot in the LTCC substrate between the two microstrip fed dipole structures eliminates beam tilting and allows for the two microstrip fed dipole structures to reduce the coupling to each other thereby providing substantially two isolated endfire antennas. These antennas can be used as multiple receive or transmit antennas.

Abstract translation: LTCC（低温共烧陶瓷）衬底用于形成在60GHz工作的天线结构。 介电常数高，范围为5至8.基板厚度制造厚度在360毫米至700毫米之间。 衬底的大介电常数和大厚度在LTCC中产生形成端射天线的引导波。 通过将微带馈电偶极子结构放置在LTCC衬底的中心，产生电介质腔谐振器，从而发生优选方向上10dB的高增益信号。 在两个微带馈电偶极结构之间的LTCC衬底中创建一个槽消除了波束倾斜，并且允许两个微带馈电偶极结构减少彼此的耦合，从而提供基本上两个隔离的端射天线。 这些天线可以用作多个接收或发射天线。

公开(公告)号：US08487695B2

公开(公告)日：2013-07-16

申请号：US13243880

申请日：2011-09-23

Applicant: Zaw Soe

Inventor： Zaw Soe

IPC: H03F3/45

CPC classification number: H03H11/1217 ,  H03F3/195 ,  H03F3/301 ,  H03F3/45179 ,  H03F3/505 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03H3/00

Abstract: A differential amplifier comprising a first upper device and a first lower device series coupled between two power supplies and a second upper device and a second lower device series coupled between the two power supplies. A first DC voltage enables the first upper device and the second upper device and a second DC voltage regulates current flow in the first lower device and the second lower device. An AC signal component is coupled to the first upper device and the second lower device while the AC signal complement is coupled to the first lower device and the second upper device. A first output signal between the first upper device and the first lower device. Separate RC networks couple the AC signals to their respective device. A first and second output signal forms between the upper device and the lower device, respectively. All the devices are same channel type.

Abstract translation: 一种差分放大器，包括耦合在两个电源之间的第一上部装置和第一下部装置系列，以及耦合在两个电源之间的第二上部装置和第二下部装置。 第一直流电压使得第一上部装置和第二上部装置能够和第二直流电压调节第一下部装置和第二下部装置中的电流。 当AC信号补码耦合到第一下部装置和第二上部装置时，AC信号分量耦合到第一上部装置和第二下部装置。 第一上部装置和第一下部装置之间的第一输出信号。 单独的RC网络将AC信号耦合到其相应的设备。 分别在上部装置和下部装置之间形成第一和第二输出信号。 所有设备的通道类型相同。

公开(公告)号：US20130143511A1

公开(公告)日：2013-06-06

申请号：US13312806

申请日：2011-12-06

Applicant: Zaw Soe

Inventor： Zaw Soe

IPC: H04B1/16

CPC classification number: H03F1/42 ,  H03D7/125 ,  H03D7/1441 ,  H03D7/1466 ,  H03D7/165 ,  H03F1/223 ,  H03F3/193 ,  H03F3/387 ,  H03F3/45071 ,  H03F3/45179 ,  H03F2200/108 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/492 ,  H03F2200/72 ,  H03F2200/75 ,  H04L27/38

Abstract: A cascode common source and common gate LNAs operating at 60 GHz are introduced and described. The cascode common source LNA is simulated to arrive at an optimum ratio of upper device width to the lower device width. The voltage output of the cascode common source LNA is translated into a current to feed and apply energy to the mixer stage. These input current signals apply the energy associated with the current directly into the switched capacitors in the mixer to minimize the overall power dissipation of the system. The LNA is capacitively coupled to the mixer switches in the I and Q mixers and are enabled and disabled by the clocks generated by the quadrature oscillator. These signals are then amplified by a differential amplifier to generate the sum and difference frequency spectra.

Abstract translation: 引入并描述了以60GHz操作的共源共栅和公共栅极LNA。 对共源共栅源LNA进行模拟，以达到上部器件宽度与较低器件宽度的最佳比例。 共源共栅源LNA的电压输出转换为电流以馈送并将能量施加到混频器级。 这些输入电流信号将与电流相关联的能量直接施加到混频器中的开关电容器中，以最小化系统的总功耗。 LNA电容耦合到I和Q混频器中的混频器开关，并由正交振荡器产生的时钟使能和禁止。 然后，这些信号被差分放大器放大以产生和和差频谱。

公开(公告)号：US20130141178A1

公开(公告)日：2013-06-06

申请号：US13312820

申请日：2011-12-06

Applicant: Zaw Soe

Inventor： Zaw Soe

IPC: H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1215 ,  H03B5/1243 ,  H03B19/14 ,  H03B2200/0074

Abstract: Injection locked dividers provide a divided clock signal after being driven by a injected clock signal that is a multiple of the divided clock signal. At injected clock signal at 60 GHz generates a differential 30 GHz clock signal. One innovative construction of the injection locked oscillator reduces the internal capacitive at a node by associating the parasitic capacitance at this node with the inductors of the tapped inductor resonant circuit. This provides more energy flow in the injection pulses applied to the legs of the injection locked circuit providing an increase locking range.

Abstract translation: 注入锁定分频器在被分配的时钟信号的倍数的注入时钟信号驱动之后提供分频时钟信号。 在60 GHz的注入时钟信号产生差分30 GHz时钟信号。 注入锁定振荡器的一个创新结构通过将该节点处的寄生电容与抽头电感谐振电路的电感相关联来减少节点处的内部电容。 这提供了施加到注射锁定电路的腿部的注射脉冲中提供更多的能量流，从而提供增加的锁定范围。

公开(公告)号：US20180097489A1

公开(公告)日：2018-04-05

申请号：US15833458

申请日：2017-12-06

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe ,  Kevin Jing ,  Steve Gao

IPC: H03G1/00 ,  H03H11/12 ,  H03F3/45 ,  H03G5/28

CPC classification number: H03G1/007 ,  H03F3/45197 ,  H03F2200/165 ,  H03F2200/69 ,  H03F2203/45372 ,  H03F2203/45374 ,  H03F2203/45512 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03F2203/45686 ,  H03F2203/45702 ,  H03G5/28 ,  H03H11/1286

Abstract: A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.

公开(公告)号：US20170141746A1

公开(公告)日：2017-05-18

申请号：US15352877

申请日：2016-11-16

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe ,  Kevin Jing ,  Steve Gao

IPC: H03G1/00 ,  H03F3/45

CPC classification number: H03G1/007 ,  H03F3/45197 ,  H03F2200/165 ,  H03F2200/69 ,  H03F2203/45372 ,  H03F2203/45374 ,  H03F2203/45512 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03F2203/45686 ,  H03F2203/45702 ,  H03G5/28 ,  H03H11/1286

Abstract: A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.

公开(公告)号：US09503032B2

公开(公告)日：2016-11-22

申请号：US15016714

申请日：2016-02-05

Applicant: Tensorcom, Inc.

Inventor： Zaw Soe

IPC: H04B1/16 ,  H03F3/04 ,  H03F1/42 ,  H03F3/387 ,  H03F1/22 ,  H03F3/193 ,  H03D7/12 ,  H03D7/14 ,  H03D7/16 ,  H03F3/45

CPC classification number: H03F1/42 ,  H03D7/125 ,  H03D7/1441 ,  H03D7/1466 ,  H03D7/165 ,  H03F1/223 ,  H03F3/193 ,  H03F3/387 ,  H03F3/45071 ,  H03F3/45179 ,  H03F2200/108 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/492 ,  H03F2200/72 ,  H03F2200/75 ,  H04L27/38

Abstract: A cascode amplifier circuit comprises a first spiral inductor coupled to a source of a first transistor; a second spiral inductor coupled to a drain of a second transistor; a third inductor connecting the first transistor to the second transistor; a first capacitor coupled in parallel to the third inductor forming a bandpass filter; and a second capacitor coupled in parallel to the second spiral inductor forming a resonant circuit, wherein the resonant circuit oscillates at a center frequency.

Abstract translation: 一个共源共栅放大器电路包括耦合到第一晶体管源极的第一螺旋电感器; 耦合到第二晶体管的漏极的第二螺旋电感器; 将所述第一晶体管连接到所述第二晶体管的第三电感器; 与形成带通滤波器的第三电感器并联耦合的第一电容器; 以及并联耦合到形成谐振电路的第二螺旋电感器的第二电容器，其中所述谐振电路以中心频率振荡。