公开(公告)号：US07743359B2

公开(公告)日：2010-06-22

申请号：US11203330

申请日：2005-08-13

申请人： Abdurrahman Sezginer ,  Roy Prasad ,  Chi-Song Horng ,  Hsu-Ting Huang

发明人： Abdurrahman Sezginer ,  Roy Prasad ,  Chi-Song Horng ,  Hsu-Ting Huang

IPC分类号： G06F17/50

CPC分类号： G06F17/5009 ,  G03F1/36 ,  G03F7/70441 ,  G06F17/5068

摘要： An apparatus and method of synthesizing a photolithographic data set includes using a first computational model to calculate a first figure-of-merit for the photolithographic data set; changing a first part of the photolithographic data set to increase the first figure-of-merit; and then using a second computational model to calculate a second figure-of-merit of the photolithographic data set; and changing a second part of the photolithographic data set to increase the second figure-of-merit. The second computational model enables figure-of-merit calculations to be executed at a significantly faster execution rate than the first computational model.

摘要翻译： 合成光刻数据集的装置和方法包括使用第一计算模型来计算光刻数据集的第一像素值; 改变光刻数据集的第一部分以增加第一品质因数; 然后使用第二计算模型来计算光刻数据集的第二像素值; 以及改变光刻数据集的第二部分以增加第二品质因数。 第二种计算模型能够以比第一种计算模型快得多的执行速度执行品质因数计算。

公开(公告)号：US20060266243A1

公开(公告)日：2006-11-30

申请号：US11139551

申请日：2005-05-31

申请人： Gokhan Percin ,  Ram Ramanujam ,  Franz Zach ,  Abdurrahman Sezginer ,  Chi-Song Horng ,  Roy Prasad

发明人： Gokhan Percin ,  Ram Ramanujam ,  Franz Zach ,  Abdurrahman Sezginer ,  Chi-Song Horng ,  Roy Prasad

IPC分类号： B41F33/00 ,  B41F1/54

CPC分类号： G03F7/70441 ,  G03F1/36 ,  G03F1/44 ,  G03F1/68

摘要： A method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips. More particularly, a method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips based on the parameters of test patterns measured at the “wafer sweet spots” so as to arrive at an accurate model.

摘要翻译： 提供了一种产生OPC模型的方法，其考虑了在制造半导体芯片的过程中发生的跨晶片变化。 更具体地，提供了一种用于生成OPC模型的方法，其考虑了在基于在“晶片甜点”处测量的测试图案的参数的制造半导体芯片的过程期间发生的跨晶片变化，以便到达 准确模型。

公开(公告)号：US20060248498A1

公开(公告)日：2006-11-02

申请号：US11203330

申请日：2005-08-13

申请人： Abdurrahman Sezginer ,  Roy Prasad ,  Chi-Song Horng ,  Hsu-Ting Huang

发明人： Abdurrahman Sezginer ,  Roy Prasad ,  Chi-Song Horng ,  Hsu-Ting Huang

IPC分类号： G06F17/50

CPC分类号： G06F17/5009 ,  G03F1/36 ,  G03F7/70441 ,  G06F17/5068

摘要： An apparatus and method of synthesizing a photolithographic data set includes using a first computational model to calculate a first figure-of-merit for the photolithographic data set; changing a first part of the photolithographic data set to increase the first figure-of-merit; and then using a second computational model to calculate a second figure-of-merit of the photolithographic data set; and changing a second part of the photolithographic data set to increase the second figure-of-merit. The second computational model enables figure-of-merit calculations to be executed at a significantly faster execution rate that the first computational model.

摘要翻译： 合成光刻数据集的装置和方法包括使用第一计算模型来计算光刻数据集的第一像素值; 改变光刻数据集的第一部分以增加第一品质因数; 然后使用第二计算模型来计算光刻数据集的第二像素值; 以及改变光刻数据集的第二部分以增加第二品质因数。 第二计算模型使得能够以优于第一计算模型的执行速率执行优质图计算。

公开(公告)号：US20060143589A1

公开(公告)日：2006-06-29

申请号：US11021783

申请日：2004-12-23

申请人： Chi-Song Horng ,  Devendra Joshi ,  Anwei Liu

发明人： Chi-Song Horng ,  Devendra Joshi ,  Anwei Liu

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  G06F2217/12 ,  Y02P90/265

摘要： A hierarchical representation encapsulates the detailed internal composition of a sub-circuit using the notion of a cell definition (a CellDef). The CellDef serves as a natural unit for operational reuse. If the computation required for the analysis or manipulation (e.g. parasitic extraction, RET, design rule confirmation (DRC), or OPC) based on a CellDef or one cell instance can be applied, with no or minimal additional effort, to all or a significant subset of other instances of the cell, very substantial reduction in computational effort may be realized. Furthermore, a hierarchical representation also allows for the partitioning of the overall analysis/manipulation task into a collection of subtasks, e.g. one per CellDef. Multiple jobs may then be distributed across a large number of computational nodes on a network for concurrent execution. While this may not reduce the aggregate computational time, a major reduction in the overall turnaround time (TAT) is in itself extremely beneficial.

摘要翻译： 分层表示使用单元定义（CellDef）的概念来封装子电路的详细内部组成。 CellDef作为操作重用的自然单元。 如果基于CellDef或一个单元实例的分析或操作所需的计算（例如寄生提取，RET，设计规则确认（DRC）或OPC））可以无需或最小的额外努力应用于所有或重要的 单元的其他实例的子集可以实现计算量的非常大的减少。 此外，分层表示还允许将整个分析/操作任务划分成子任务的集合，例如子集。 每个CellDef一个。 然后可以将多个作业分布在网络上的大量计算节点上以用于并发执行。 虽然这可能不会减少总体计算时间，但总体周转时间（TAT）的大幅减少本身就是非常有益的。

公开(公告)号：US20050133209A1

公开(公告)日：2005-06-23

申请号：US10849243

申请日：2004-05-20

申请人： Chi Song ,  Kang Seo ,  Chang Shin

发明人： Chi Song ,  Kang Seo ,  Chang Shin

IPC分类号： F28F9/02 ,  F25B39/00 ,  F28D1/04 ,  F28F9/00

CPC分类号： F28D1/0426 ,  F28F9/002 ,  Y10T29/4935

摘要： An end plate for heat exchangers, includes a plurality of bodies and a connecting part. Each of the plurality of bodies has a plurality of holes to allow a refrigerant pipe to pass through the plurality of bodies. The connecting part connects the plurality of bodies to each other, with a recess being provided on the connecting part to allow the connecting part to be easily bent. A manufacturing method includes preparing a plurality of fins arranged to provide two or more parallel rows of fin arrays, preparing an end plate provided on a side of the fin arrays to connect the fin arrays to each other, inserting a refrigerant pipe into the fin arrays and the end plate to provide an assembly including the refrigerant pipe, the fin arrays, and the end plate, and bending the assembly at a predetermined angle around the connecting part of the end plate.

摘要翻译： 用于热交换器的端板包括多个主体和连接部。 多个主体中的每一个具有多个孔，以允许制冷剂管通过多个主体。 连接部将多个体彼此连接，在连接部上设置有凹部，能够使连接部容易弯曲。 一种制造方法，包括准备多个翅片，其布置成提供两个或更多个平行排的翅片阵列，准备设置在翅片阵列侧面的端板，以将翅片阵列彼此连接，将制冷剂管插入翅片阵列 和端板，以提供包括制冷剂管，翅片阵列和端板的组件，并且围绕端板的连接部分以预定角度弯曲组件。

公开(公告)号：US06802447B2

公开(公告)日：2004-10-12

申请号：US10228678

申请日：2002-08-26

申请人： Chi-Song Horng

发明人： Chi-Song Horng

IPC分类号： G06F1700

CPC分类号： G06K7/10019 ,  G06K7/0008

摘要： Each object (such as for example an integrated circuit) of a population of similar objects is configured to generate instances of a dynamic binary identification code (ID) that differ from instances of IDs generated by all other member objects of the population. While bits residing in most of the bit positions of the ID generated by each member object of the population do not vary in state from instance-to-instance of that ID, bits residing in one or more of the bit positions of the ID may vary (drift) in state from instance-to-instance of that ID. A set of instances of the ID generated by each member object of the population are analyzed to construct a separate “drift profile” for each member object's ID indicating for each bit position a probability that the bit position will contain a bit of a particular state. Thereafter, to verify that a particular object is a specific member object of the population, a set of instances of the ID generated by that particular object is analyzed to construct a drift profile for that particular object's ID. That drift profile is then compared to the drift profiles of the IDs generated by the member objects of the population to determine whether the particular object is a certain specific member object of the population.

摘要翻译： 配置相似对象群体的每个对象（例如集成电路）被配置为生成与群体的所有其他成员对象生成的ID的实例不同的动态二进制识别码（ID）的实例。 虽然驻留在群体的每个成员对象生成的ID的大部分位位置的位在该ID的实例与实例之间的状态不变，但位于ID的一个或多个位位置的位可以变化 （漂移）状态从该ID的实例到实例。 分析由群体的每个成员对象生成的ID的一组实例，以为每个成员对象的ID构造单独的“漂移简档”，指示每个比特位置具有比特位置将包含特定状态的位的概率。 此后，为了验证特定对象是群体的特定成员对象，分析由该特定对象生成的ID的一组实例，以构建该特定对象的ID的漂移简档。 然后将该漂移分布与由群体的成员对象生成的ID的漂移分布进行比较，以确定特定对象是否是群体的特定成员对象。

公开(公告)号：USD476637S1

公开(公告)日：2003-07-01

申请号：US29163194

申请日：2002-07-01

申请人： Ming-Chi Song ,  Chi-Hsiu Lee

设计人： Ming-Chi Song ,  Chi-Hsiu Lee

公开(公告)号：US5282271A

公开(公告)日：1994-01-25

申请号：US912975

申请日：1992-07-06

申请人： Wen-Jai Hsieh ,  Yih-Chyun Jeng ,  Chi-Song Horng ,  Keith Lofstrom

发明人： Wen-Jai Hsieh ,  Yih-Chyun Jeng ,  Chi-Song Horng ,  Keith Lofstrom

IPC分类号： G06F13/40 ,  H03K19/0175 ,  G06F13/00

CPC分类号： G06F13/4004 ,  H03K19/017581 ,  H03K19/01759

摘要： A field programmable interconnect device (FPID) flexibly interconnects a set of electronic components such as integrated circuits and other devices to one another. The FPID is an integrated circuit chip including a set of ports and a cross-point switch that can be programmed to logically connect any one port to any other port. Each FPID buffer port may be programmed to operate in various modes including unidirectional and bi-directional, with or without tristate control, and to operate at various input or output logic levels with adjustable pull up currents. Each FPID buffer port may also be programmed to perform various operations on buffered signals including adjustably delaying the signal, inverting it or forcing it high or low. The FPID is linked to a host computer via a bus that permits the host computer to program the FPID to make the desired connections, to select various modes of operation of buffers within the FPID and to read out data stored in the FPID. Each port of an FPID also samples and stores data indicating states of the signal passing through it over the last several system clock cycles. The FPID can subsequently read out the stored data to the host computer.

摘要翻译： 现场可编程互连设备（FPID）将诸如集成电路和其他设备的一组电子部件彼此灵活地互连。 FPID是一个集成电路芯片，包括一组端口和交叉点开关，可以将其编程为将任何一个端口逻辑连接到任何其他端口。 每个FPID缓冲器端口可以被编程为在具有或不具有三态控制的情况下以各种模式进行操作，包括单向和双向，并且可以在具有可调节上拉电流的各种输入或输出逻辑电平下工作。 每个FPID缓冲器端口也可以被编程为对缓冲信号执行各种操作，包括可调节地延迟信号，反相或强制其高或低。 FPID通过总线链接到主计算机，总线允许主计算机对FPID进行编程以进行所需的连接，以选择FPID内的缓冲器的各种操作模式并读出存储在FPID中的数据。 FPID的每个端口还采样和存储指示在最后几个系统时钟周期内通过它的信号的状态的数据。 FPID随后可以将存储的数据读出到主计算机。