Cycle time to digital converter
    21.
    发明授权
    Cycle time to digital converter 失效
    循环时间到数字转换器

    公开(公告)号:US07522084B2

    公开(公告)日:2009-04-21

    申请号:US11826339

    申请日:2007-07-13

    IPC分类号: H03M1/60

    CPC分类号: G04F10/005

    摘要: A cycle time to digital converter includes a dual delay lock loop, multi phase sampling detector and VDL sampling detector. The dual delay lock loop generates the first voltage corresponding to the first delay time and the second voltage corresponding to the second delay time. The multi phase sampling detector receives first start signal, first stop signal and first voltage to detect a coarse delay time, generates the first group signals according to the coarse delay time, delays the first stop signal by a common delay time to generate the second stop signal, and delays the first start signal by the coarse delay time and the common delay time to generate the second start signal. The VDL sampling detector receives first voltage, second voltage, second start signal and second stop signal for detecting a fine delay time and generates the second group signals according to the fine delay time.

    摘要翻译: 数字转换器的周期时间包括双延迟锁定环路,多相采样检测器和VDL采样检测器。 双延迟锁定环路产生对应于第一延迟时间的第一电压和对应于第二延迟时间的第二电压。 多相采样检测器接收第一起始信号,第一停止信号和第一电压以检测粗延迟时间,根据粗延迟时间产生第一组信号,将第一停止信号延迟公共延迟时间以产生第二停止 并且将第一起始信号延迟粗延迟时间和公共延迟时间以产生第二起始信号。 VDL采样检测器接收第一电压,第二电压,第二起始信号和第二停止信号,用于检测精细的延迟时间,并根据微小的延迟时间产生第二组信号。

    Pulse-width control loop for clock with pulse-width ratio within wide range
    22.
    发明授权
    Pulse-width control loop for clock with pulse-width ratio within wide range 有权
    时钟脉冲宽度控制回路,脉宽范围宽

    公开(公告)号:US07466177B2

    公开(公告)日:2008-12-16

    申请号:US11491159

    申请日:2006-07-24

    IPC分类号: H03K3/17

    CPC分类号: H03K5/151 H03K5/1565

    摘要: A pulse-width control loop (PWCL) for clock with any pulse-width ratio within a wide range is provided. A differential programmable charge pump is employed to stabilize the current source by complementary connection. The differential programmable charge pump has a pair of differential charge pumps and a current source module to adjust the ratio of charge to discharge, so as to accelerate the range of the adjustable pulse-width ratio of the output clock and increase the output resolution. Further, a ratioless input control stage is employed to simplify the circuit design and avoid static power consumption. Moreover, the control stage adjusts rising pulse width and dropping pulse width at one period, thereby accelerating the lock speed and the range of the adjustable pulse-width ratio (i.e., duty cycle) of the input clock.

    摘要翻译: 提供了在宽范围内具有任何脉冲宽度比的时钟的脉冲宽度控制回路(PWCL)。 采用差分可编程电荷泵通过互补连接来稳定电流源。 差分可编程电荷泵具有一对差动电荷泵和电流源模块,用于调节充放电比例,从而加快输出时钟可调脉宽比的范围,提高输出分辨率。 此外,采用无竞争的输入控制级以简化电路设计并避免静态功耗。 此外,控制级在一个周期调节上升脉冲宽度和下降脉冲宽度,从而加速锁定速度和输入时钟的可调脉冲宽度比(即占空比)的范围。

    Memory mapped register file
    23.
    发明授权
    Memory mapped register file 有权
    内存映射寄存器文件

    公开(公告)号:US07437532B1

    公开(公告)日:2008-10-14

    申请号:US10627269

    申请日:2003-07-25

    IPC分类号: G06F12/10

    摘要: A memory mapped register file is disclosed for a data processing system that comprises a memory unit, input ports, and output ports. The memory unit includes a plurality of registers addressable by an encoded address, wherein the encoded address corresponds to a respective one of the plurality of registers and a corresponding processor mode. The input ports receive inputs for addressing at least one register using an encoded address. The output ports output data from at least register addressable by an encoded address.

    摘要翻译: 公开了一种用于包括存储器单元,输入端口和输出端口的数据处理系统的存储器映射寄存器堆。 存储器单元包括可由编码地址寻址的多个寄存器,其中编码地址对应于多个寄存器中的相应一个寄存器和对应的处理器模式。 输入端口接收用于使用编码地址寻址至少一个寄存器的输入。 输出端口至少可以通过编码地址来寻址寄存器的数据。

    Temperature control method for a permanent magnet arrangement of a magnetic resonance system
    24.
    发明授权
    Temperature control method for a permanent magnet arrangement of a magnetic resonance system 有权
    用于磁共振系统的永磁体布置的温度控制方法

    公开(公告)号:US07432708B2

    公开(公告)日:2008-10-07

    申请号:US11761525

    申请日:2007-06-12

    IPC分类号: G01V3/00

    摘要: In a temperature control method for magnetic field components of a permanent magnet arrangement of a magnetic resonance system, temperature stability of the magnetic field components is achieved by maintaining the temperature of the two sides of the magnetic field components constant, with a difference being maintained between the temperatures of the two sides of the magnetic field components so that a temperature gradient is formed within the magnetic field components. Once the temperature gradient is formed, dynamic temperature stability is established within the magnetic field component. When this dynamic temperature stability is broken by thermal disturbance, the temperature gradient allows the thermal disturbance to be quickly transmitted to the lower magnetic yoke and is further transmitted to the outside through the base of the magnetic resonance system so that the thermal disturbance is smoothed and dynamic temperature stability is reestablished.

    摘要翻译: 在用于磁共振系统的永磁体配置的磁场分量的温度控制方法中,通过将磁场分量的两侧的温度保持恒定来实现磁场分量的温度稳定性, 磁场分量的两侧的温度使得在磁场分量内形成温度梯度。 一旦温度梯度形成,在磁场分量内建立动态温度稳定性。 当这种动态温度稳定性被热干扰破坏时,温度梯度允许热干扰快速传递到下磁轭,并且通过磁共振系统的基底进一步传输到外部,使得热扰动平滑, 动态温度稳定性重新建立。

    Low power computer with main and auxiliary processors
    25.
    发明申请
    Low power computer with main and auxiliary processors 有权
    低功耗电脑配有主处理器和辅助处理器

    公开(公告)号:US20080222357A1

    公开(公告)日:2008-09-11

    申请号:US12151526

    申请日:2008-05-07

    IPC分类号: G06F12/08

    摘要: A processing device comprises a processor, low power nonvolatile memory that communicates with the processor, high power nonvolatile memory that communicates with the processor. The processing device manages data using a cache hierarchy comprising a high power (HP) nonvolatile memory level for data in the high power nonvolatile memory and a low power (LP) nonvolatile memory level for data in the low power nonvolatile memory. The LP nonvolatile memory level has a higher level in the cache hierarchy than the HP nonvolatile memory level.

    摘要翻译: 处理装置包括处理器,与处理器通信的低功率非易失性存储器,与处理器通信的高功率非易失性存储器。 处理装置使用包括用于高功率非易失性存储器中的数据的高功率(HP)非易失性存储器级别和用于低功率非易失性存储器中的数据的低功率(LP)非易失性存储器级别)的高速缓存层级来管理数据。 LP非易失性存储器级别在高速缓存层级中具有比HP非易失性存储器级别更高的级别。

    Multi-instruction switch
    26.
    发明授权
    Multi-instruction switch 失效
    多指令开关

    公开(公告)号:US07381911B2

    公开(公告)日:2008-06-03

    申请号:US11242791

    申请日:2005-10-05

    IPC分类号: H01H9/00

    CPC分类号: H01H19/626 H01H19/08

    摘要: A multi-instruction switch includes a base, a control disk, a plurality of electrodes and a conductive element. The control disk is located above the base and can rotate relative to the base to issue instructions. The conductive element is bent to form a common contact end in the middle portion and a first contact end and a second contact end on two ends to connect respectively to a common electrode, a first electrode and a second electrode. By rotating the control disk, a guiding portion located on an inner peripheral rim of the control disk can move the conductive element in a biased manner so that the common electrode and the first electrode or the second electrode are electrically connected to generate a leftward or rightward rotational instruction. Meanwhile a rotational click is produced. The structure is simple and the fabrication cost is lower.

    摘要翻译: 多指令开关包括基座,控制盘,多个电极和导电元件。 控制盘位于底座上方,可相对于底座旋转以发出指令。 导电元件被弯曲以在中间部分中形成公共接触端,并且在两端上的第一接触端和第二接触端分别连接到公共电极,第一电极和第二电极。 通过旋转控制盘,位于控制盘的内周边缘上的引导部分可以以偏置的方式移动导电元件,使得公共电极和第一电极或第二电极电连接以产生向左或向右 旋转指令。 同时产生旋转点击。 结构简单,制造成本低。

    DIFFERENTIAL BIDIRECTIONAL TRANSCEIVER AND RECEIVER THEREIN
    27.
    发明申请
    DIFFERENTIAL BIDIRECTIONAL TRANSCEIVER AND RECEIVER THEREIN 失效
    差分双向收发器和接收器

    公开(公告)号:US20080116936A1

    公开(公告)日:2008-05-22

    申请号:US11747921

    申请日:2007-05-14

    IPC分类号: H04L5/14 H03K19/094

    摘要: A differential bidirectional transceiver is provided. The differential bidirectional transceiver includes a first current transmitter, a second current transmitter and a receiver. The first current transmitter and the second current transmitter are coupled to a first interconnection and a second interconnection, respectively. Each of the current transmitters includes two current sources and two switches. The receiver includes an input circuit consisting of four differential pairs, a current summation circuit and a buffer.

    摘要翻译: 提供差分双向收发器。 差分双向收发器包括第一电流发射器,第二电流发射器和接收器。 第一电流发射器和第二电流发射器分别耦合到第一互连和第二互连。 每个电流变送器包括两个电流源和两个开关。 接收机包括由四个差分对,电流求和电路和缓冲器组成的输入电路。

    Method and system of controlling dummy dispense
    28.
    发明授权
    Method and system of controlling dummy dispense 有权
    控制虚假分配的方法和系统

    公开(公告)号:US07323212B2

    公开(公告)日:2008-01-29

    申请号:US10696300

    申请日:2003-10-29

    IPC分类号: C23C16/52

    摘要: A dummy dispense of liquid is controlled by recording a time at which a substrate is processed; recording a time at which a liquid is dispensed; comparing the time at which the substrate is processed and the time at which the liquid is dispensed to generate a dummy dispense signal when a dummy dispense is required. A system for controlling dummy dispense of liquid includes at least one information storage device storing a time at which a substrate is processed and a time at which a liquid is dispensed. At least one processor compares the time at which the substrate is processed and the time at which the liquid is dispensed to determine whether a dummy dispense is required.

    摘要翻译: 通过记录处理基板的时间来控制液体的虚拟分配; 记录液体分配的时间; 比较基板被处理的时间和分配液体的时间,以便在需要虚拟分配时产生虚拟分配信号。 用于控制液体的虚拟分配的系统包括至少一个存储基板被处理的时间和分配液体的时间的信息存储装置。 至少一个处理器比较基板被处理的时间和分配液体的时间,以确定是否需要虚拟分配。

    Method and system for target lifetime
    29.
    发明授权
    Method and system for target lifetime 有权
    目标寿命的方法和系统

    公开(公告)号:US07282122B2

    公开(公告)日:2007-10-16

    申请号:US10810534

    申请日:2004-03-26

    CPC分类号: H01J37/3482 C23C14/3407

    摘要: A method and system for determining a lifetime of a target for a physical vapor deposition tool (302), has, a mapping table (304a) of criteria for a minimum accumulating rate of Δ wafers fabricated by Δ target life for a target in the tool; and a database (304) recording Δ wafers fabricated by Δ target life for a target in the tool; and a computer (306) retrieving the criteria from the mapping table and entering the criteria in the database; and the tool (302) reporting Δ wafers fabricated by Δ target life for a target in the tool (302) for comparison with the criteria.

    摘要翻译: 一种用于确定物理气相沉积工具(302)的靶的寿命的方法和系统,具有用于针对目标的达标目标寿命制造的三角形晶片的最小累积速率的标准的映射表(304a) 工具; 以及数据库(304),记录用于所述工具中的目标的达标目标寿命制造的三角形晶片; 以及计算机(306),其从所述映射表检索所述准则并在所述数据库中输入所述准则; 并且所述工具(302)报告通过所述工具(302)中的目标的达标目标寿命制造的三角形晶片以与所述准则进行比较。

    Bidirectional current-mode transceiver
    30.
    发明申请
    Bidirectional current-mode transceiver 失效
    双向电流模式收发器

    公开(公告)号:US20070132483A1

    公开(公告)日:2007-06-14

    申请号:US11442302

    申请日:2006-05-30

    IPC分类号: H03K19/0175

    摘要: A bidirectional current-mode transceiver is provided for improving transmission rates on a transmission line in a manner of current signal transmission, and for reducing the swing of the voltage signal on the transmission line by using a termination resistor, thus improving operating speed. Therefore, the provided transceiver can be applied to a long transmission line.

    摘要翻译: 提供了一种双向电流模式收发器,用于以当前信号传输的方式改善传输线上的传输速率,并且通过使用终端电阻来减少传输线上的电压信号的摆动,从而提高操作速度。 因此,所提供的收发器可以应用于长传输线。