Method for radar detection and digitally modulated radar robust to IQ imbalance

    公开(公告)号:US12025729B2

    公开(公告)日:2024-07-02

    申请号:US17527796

    申请日:2021-11-16

    Applicant: Imec vzw

    CPC classification number: G01S7/354 G01S7/358 G01S13/325 G01S13/58

    Abstract: A method is provided for facilitating radar detection robust to IQ imbalance. The method comprises the step of generating a radar signal in digital domain comprising a number of M periodic repetitions of a code sequence with a length Lc, multiplied with a progressive phase rotation





    e

    j
    ·

    π
    K

    ·
    n


    ,




    where Lc and M are integers, K is an integer or a non-integer, and n is a discrete integer variable. The method further comprises the step of generating a process input signal in digital domain from a reflection signal corresponding to the radar signal by multiplying the reflection signal with a progressive phase rotation






    e


    -
    j

    ·

    π
    K

    ·
    n


    .




    In this context, K is defined such that a ratio





    Lc
    K




    is a non-integer, and M is defined such that a ratio






    Lc
    ·
    M

    K




    is an integer.

    Tunneling Enabled Feedback FET
    24.
    发明公开

    公开(公告)号:US20240213321A1

    公开(公告)日:2024-06-27

    申请号:US18545730

    申请日:2023-12-19

    Applicant: IMEC VZW

    Inventor: Aryan Afzalian

    Abstract: Example embodiments relate to tunneling enabled feedback field effect transistors (FETs). One example system includes a feedback field effect transistor. The feedback field effect transistor includes a source region. The feedback field effect transistor also includes a channel region. Additionally, the feedback field effect transistor includes a drain region. Further, the feedback field effect transistor includes a gate. The channel region is between the source region and the drain region. The source region, the channel region, and the drain region include a semiconductor material with a bandgap that is smaller than 0.9 eV. The source region or the drain region has a dopant concentration that is smaller than 5×1019 cm−3. The gate is positioned along the channel and isolated from the channel.

    SENSING DEVICE AND A METHOD FOR DETECTION OF A CHARACTERISTIC OF A SUBSTANCE AT MULTIPLE TIME POINTS

    公开(公告)号:US20240210388A1

    公开(公告)日:2024-06-27

    申请号:US18392118

    申请日:2023-12-21

    Applicant: IMEC VZW

    CPC classification number: G01N33/5438 G01N33/54306

    Abstract: According to an aspect there is provided a sensing device for detection of at least one characteristic of a substance. The sensing device comprises:



    a plurality of cavities, each comprising an opening;
    a plurality of sensors for detecting the at least one characteristic, the plurality of sensors being arranged into a plurality of sets of sensors, each set being arranged in a mutually unique cavity;
    a plurality of protective membranes, each being arranged to cover the opening of the mutually unique cavity, preventing the substance from entering the cavity, thereby protecting the set of sensors from being exposed to the substance.




    The sensing device is configured for providing a different activation timing for different protective membranes, whereby different sets of sensors are exposed to the substance at different points in time, for providing detection of the at least one characteristic at multiple time points.

    Stacked SRAM Cell with a Dual-Side Interconnect Structure

    公开(公告)号:US20240206145A1

    公开(公告)日:2024-06-20

    申请号:US18545760

    申请日:2023-12-19

    CPC classification number: H10B10/125 H01L23/5286

    Abstract: The present disclosure relates to static random access memory (SRAM). In particular, the disclosure provides a stacked SRAM cell, and a method for fabricating the stacked SRAM cell. The stacked SRAM cell comprises two first transistor structures and two second transistor structures, which form a pair of cross-coupled inverters, an comprises one or two pass gate (PG) transistor structures. Further, the stacked SRAM cell comprises a first power rail and/or a second power rail arranged above the transistor structures, wherein the first power rail is connected by respective first vias to the first transistor structures from above, and/or the second power rail is connected by respective second vias to the second transistor structures from above. The SRAM cell also comprises one or two bit lines arranged below the PG transistor structures. Each bit line is connected by a respective third via to one PG transistor structure from below.

    System and Method for Joint Communication and Radar Sensing

    公开(公告)号:US20240192311A1

    公开(公告)日:2024-06-13

    申请号:US18531186

    申请日:2023-12-06

    CPC classification number: G01S7/0235 G01S7/006 H04W16/14

    Abstract: A system is provided for joint communication and radar sensing. The system includes at least one communication transmitter unit configured to transmit at least one communication pilot signal, at least one radar transmitter unit configured to transmit at least one radar pilot signal, a control unit configured to schedule the transmission of the at least one communication transmitter unit and/or the at least one radar transmitter unit using a time delay, and at least one receiver unit configured to receive the at least one radar pilot signal with the time delay with respect to the at least one communication pilot signal. A method of using the system for joint communication and radar sensing is also provided.

    A SAMPLE COLLECTOR
    29.
    发明公开
    A SAMPLE COLLECTOR 审中-公开

    公开(公告)号:US20240188847A1

    公开(公告)日:2024-06-13

    申请号:US18287501

    申请日:2022-04-14

    Applicant: IMEC VZW

    CPC classification number: A61B5/097

    Abstract: The disclosure relates to a sample collector for collecting airborne particles exhaled by a human being, comprising: a sampling compartment for receiving a flow of air; a particle capturing substrate for capturing the airborne particles in the flow; an analysis compartment; and a substrate clamping device comprising an optical window and a support member; wherein the sample collector is reconfigurable between a sampling configuration in the sampling compartment for passage of the flow through the particle capturing substrate and an analysis configuration, wherein in the particle capturing substrate is arranged in the analysis compartment, the optical window is aligned with an aperture for allowing optical access to the particle capturing substrate is allowed; and



    wherein, during reconfiguration from the sampling configuration to the analysis configuration, the substrate clamping device and the particle capturing substrate are moved together to the analysis compartment while the substrate clamping device is brought to the closed state.

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