PROCESSOR AND PREFETCH SUPPORT PROGRAM
    21.
    发明申请
    PROCESSOR AND PREFETCH SUPPORT PROGRAM 有权
    处理者和预备支持计划

    公开(公告)号:US20100070716A1

    公开(公告)日:2010-03-18

    申请号:US12622817

    申请日:2009-11-20

    Abstract: A processor loads a program from a main memory, detects a register updating instruction, and registers the address of the register updating instruction in a register-producer table storing unit. Moreover, the processor loads the program to detect a memory access instruction, compares a register number utilized by the detected memory access instruction with a register-producer table to specify an address generation instruction, and rewrites an instruction corresponding to the address generation instruction.

    Abstract translation: 处理器从主存储器加载程序,检测寄存器更新指令,并将寄存器更新指令的地址登记在寄存器 - 生成器表存储单元中。 此外,处理器加载程序以检测存储器访问指令,将检测到的存储器访问指令使用的寄存器编号与寄存器 - 生成器表进行比较,以指定地址生成指令,并重写与地址生成指令相对应的指令。

    Multilayer capacitor array
    22.
    发明授权
    Multilayer capacitor array 有权
    多层电容阵列

    公开(公告)号:US07636230B2

    公开(公告)日:2009-12-22

    申请号:US12051342

    申请日:2008-03-19

    Applicant: Takashi Aoki

    Inventor: Takashi Aoki

    CPC classification number: H01G4/012 H01G4/232 H01G4/30

    Abstract: A multilayer capacitor array comprises a capacitor body having rectangular first and second main faces opposing each other. In the capacitor body having a dielectric characteristic, a first electrode group including first and second inner electrodes and a second electrode group including third and fourth inner electrodes are arranged in a row. The first and third inner electrodes are arranged in contact with a reference plane parallel to the opposing direction of the first and second main faces between the first electrode group and second electrode group. The second and fourth inner electrodes are arranged such as to be separated from the reference plane by a predetermined distance.

    Abstract translation: 一种层叠电容器阵列包括具有彼此相对的矩形第一和第二主表面的电容器本体。 在具有介电特性的电容器体中,包括第一和第二内部电极的第一电极组和包括第三和第四内部电极的第二电极组排列成一行。 第一和第三内部电极布置成与第一电极组和第二电极组之间的第一和第二主面的相反方向平行的参考平面接触。 第二和第四内部电极被布置成与参考平面分开预定距离。

    PROCESS FOR PRODUCTION OF (±)-3A,6,6,9A- TETRAMETHYLDECAHYDRONAPHTHO[2,1-B]FURAN-2(1H)-ONE
    23.
    发明申请
    PROCESS FOR PRODUCTION OF (±)-3A,6,6,9A- TETRAMETHYLDECAHYDRONAPHTHO[2,1-B]FURAN-2(1H)-ONE 有权
    (±)-3A,6,6,9-四甲基环己烷基[2,1-B]呋喃-2(1H) - 酮的制备方法

    公开(公告)号:US20090270639A1

    公开(公告)日:2009-10-29

    申请号:US12375680

    申请日:2007-07-27

    CPC classification number: C07D307/92

    Abstract: The present invention relates to industrially useful production processes in which (±)-3a,6,6,9a-tetramethyldecahydronaphtho[2,1-b]furan-2(1H)-ones and further (±)-3a,6,6,9a-tetramethyldo decahydronaphtho[2,1-b]furans are produced from raw materials which are readily available at low costs, through short steps and in a simple manner. The process for producing (±)-3a,6,6,9a-tetramethyldecahydronaphtho[2,1-b]furan-2(1H)-ones represented by the general formula (III): which includes the steps of cyclizing a homofarnesylic acid amide represented by the general formula (I): wherein R1 and R2 are each independently an alkyl group having 1 to 4 carbon atoms; and wavy lines each represents a carbon-to-carbon single bond having a cis or trans structure, and/or a monocyclohomofarnesylic acid amide represented by the general formula (II): wherein R1 and R2 and wavy lines are the same as defined above; and dotted lines represent that a carbon-to-carbon double bond is present at any of positions represented by the dotted lines, in the presence of an acid agent; and subjecting the cyclized product to hydrolysis.

    Abstract translation: 本发明涉及工业上有用的生产方法,其中(±)-3a,6,6,9a-四甲基十氢萘并[2,1-b]呋喃-2(1H) - 酮和进一步(±)-3a,6,6 9a-四甲基十氢萘并[2,1-b]呋喃由原料以低成本容易获得,通过短步骤和简单的方式制备。 用于制备由通式(III)表示的(±)-3a,6,6,9a-四甲基十氢萘并[2,1-b]呋喃-2(1H)酮的方法:其包括以下步骤:使高丝氨酸 由通式(I)表示的酰胺:其中R 1和R 2各自独立地为具有1至4个碳原子的烷基; 并且波浪线各自表示具有顺式或反式结构的碳 - 碳单键和/或由通式(II)表示的单环洛夫糖酰胺:其中R1和R2和波浪线与上述定义相同; 虚线表示在酸剂的存在下,由虚线表示的任何位置存在碳 - 碳双键; 并使环化产物水解。

    Hydraulic circuit control device
    25.
    发明授权
    Hydraulic circuit control device 有权
    液压回路控制装置

    公开(公告)号:US07578761B2

    公开(公告)日:2009-08-25

    申请号:US11391274

    申请日:2006-03-29

    Abstract: A hydraulic circuit control device that selectively supplies oil to a first oil passage and a second oil passage by an oil pump, the control device includes: an oil passage switching unit adapted to connect the oil pump to either the first oil passage or the second oil passage; a control mode switching unit adapted to switch the control mode of the electric motor to either a torque control mode or a speed control mode; an oil passage selecting unit adapted to select whether to connect the oil pump to the first oil passage or the second oil passage; and a control unit adapted to perform control so that the control mode switching unit switches the control mode to the torque control mode when the first oil passage has been selected, and perform control so that the control mode switching unit switches the control mode to the speed control mode when the second oil passage has been selected.

    Abstract translation: 一种液压回路控制装置,其通过油泵选择性地向第一油路和第二油路供给油,所述控制装置包括:油路切换单元,其将所述油泵连接到所述第一油路或所述第二油 通道; 控制模式切换单元,其适于将电动机的控制模式切换到转矩控制模式或速度控制模式; 油路选择单元,其适于选择是否将所述油泵连接到所述第一油路或所述第二油路; 以及控制单元,其适于执行控制,使得当已经选择了第一油路时,控制模式切换单元将控制模式切换到转矩控制模式,并且执行控制,使得控制模式切换单元将控制模式切换到速度 当选择第二油路时的控制模式。

    MULTILAYER CAPACITOR ARRAY
    26.
    发明申请
    MULTILAYER CAPACITOR ARRAY 有权
    多层电容阵列

    公开(公告)号:US20090201627A1

    公开(公告)日:2009-08-13

    申请号:US12365554

    申请日:2009-02-04

    Applicant: Takashi AOKI

    Inventor: Takashi AOKI

    CPC classification number: H01G4/30 H01G4/012 H01G4/232

    Abstract: A multilayer capacitor array achieves a high ESR because terminal conductors to which internal electrodes in capacitance sections are connected in parallel are connected in series through internal electrodes in ESR control sections to external electrodes. Since in the multilayer capacitor array the internal electrodes extend as far as a boundary between capacitor element portions, electrostriction occurs in an entire laminate including a region near the boundary between the capacitor element portions, with application of a voltage from the outside. Therefore, concentration of stress due to electrostriction is avoided, so as to suppress occurrence of cracking or the like.

    Abstract translation: 由于电容部分内部电极并联连接的端子导体与ESR控制部分的内部电极串联连接,所以层叠电容器阵列实现高ESR。 由于在多层电容器阵列中,内部电极延伸到电容器元件部分之间的边界,所以通过施加来自外部的电压,在包括电容器元件部分之间的边界附近的区域的整个层叠体中发生电致伸缩。 因此,避免了由于电致伸缩引起的应力集中,以抑制裂纹的发生等。

    MULTILAYER CAPACITOR ARRAY
    27.
    发明申请
    MULTILAYER CAPACITOR ARRAY 有权
    多层电容阵列

    公开(公告)号:US20090161288A1

    公开(公告)日:2009-06-25

    申请号:US12274868

    申请日:2008-11-20

    CPC classification number: H01G4/005 H01G4/232

    Abstract: Among a plurality of first inner electrodes, at least one first inner and a second inner electrode are arranged as opposed with at least one of the dielectric layers in between. Third and fourth inner electrodes are arranged as opposed with at least one of the dielectric layers in between. The first inner electrodes are electrically connected to a first external connection conductor via lead conductors. The second inner electrode is electrically connected to a second terminal conductor via a lead conductor. The third inner electrode is electrically connected to a third terminal conductor via a lead conductor. The fourth inner electrode is electrically connected to a fourth terminal conductor via a lead conductor. Among all the first inner electrodes, one to multiple first inner electrodes that are less than the total first inner electrodes are electrically connected to the first terminal conductors via lead conductors.

    Abstract translation: 在多个第一内部电极中,至少一个第一内部电极和第二内部电极被布置成与其间的至少一个电介质层相对。 第三和第四内部电极被布置成与其间的介电层中的至少一个相对。 第一内部电极通过引线导体电连接到第一外部连接导体。 第二内部电极经由引线导体电连接到第二端子导体。 第三内部电极经由引线导体与第三端子导体电连接。 第四内部电极经由引线导体与第四端子导体电连接。 在所有第一内部电极中,小于总第一内部电极的一个至多个第一内部电极经由引线导体电连接到第一端子导体。

    THIN-FILM TRANSISTOR, ELECTRO-OPTICAL DEVICE, AND ELECTRONIC APPARATUS
    28.
    发明申请
    THIN-FILM TRANSISTOR, ELECTRO-OPTICAL DEVICE, AND ELECTRONIC APPARATUS 有权
    薄膜晶体管,电光器件和电子设备

    公开(公告)号:US20090146138A1

    公开(公告)日:2009-06-11

    申请号:US12260816

    申请日:2008-10-29

    Applicant: Takashi Aoki

    Inventor: Takashi Aoki

    CPC classification number: H01L51/0512 H01L51/0035 H01L51/0558

    Abstract: A thin-film transistor includes a source electrode, a drain electrode arranged apart from the source electrode, an organic semiconductor layer arranged between the source electrode and the drain electrode so as to establish connection of the source electrode and the drain electrode, a first insulating layer arranged on one surface side of the organic semiconductor layer, a gate electrode arranged on a side of the first insulating layer opposite that on which the organic semiconductor layer lie, and a second insulating layer arranged on a side of the organic semiconductor layer opposite that on which the first insulating layer lie. The organic semiconductor layer contains an organic semiconductor material having p-type semiconducting properties. The second insulating layer contains one or more compounds of the following formula (1), so that electrons are fed from the second insulating layer into the organic semiconductor layer: wherein R1 and R2 independently represent a substituted or unsubstituted alkylene group; X1, X2, X3 and X4 each represent a hydrogen atom or an electron-donating group; and n represents 100 to 100,000, wherein at least one of X1, X2, X3 and X4 represents an electron-donating group.

    Abstract translation: 薄膜晶体管包括源电极,与源极分离的漏极,设置在源极和漏电极之间的有机半导体层,以建立源电极和漏电极的连接;第一绝缘体 布置在有机半导体层的一个表面侧上的层;布置在第一绝缘层的与有机半导体层位于其上的相反侧的栅极;以及布置在有机半导体层的与该有机半导体层相反的一侧的第二绝缘层 第一绝缘层位于其上。 有机半导体层含有具有p型半导体性质的有机半导体材料。 第二绝缘层含有一种或多种下式(1)的化合物,使得电子从第二绝缘层进料到有机半导体层中:其中R1和R2独立地表示取代或未取代的亚烷基; X1,X2,X3和X4各自表示氢原子或给电子基团; n表示100〜100,000,X 1,X 2,X 3,X 4中的至少一个表示给电子基团。

    STORAGE MEDIUM STORING CALCULATION PROCESSING VISUALIZATION PROGRAM, CALCULATION PROCESSING VISUALIZATION APPARATUS, AND CALCULATION PROCESSING VISUALIZATION METHOD
    29.
    发明申请
    STORAGE MEDIUM STORING CALCULATION PROCESSING VISUALIZATION PROGRAM, CALCULATION PROCESSING VISUALIZATION APPARATUS, AND CALCULATION PROCESSING VISUALIZATION METHOD 有权
    存储媒体存储计算可视化程序,计算处理可视化设备和计算处理可视化方法

    公开(公告)号:US20080320289A1

    公开(公告)日:2008-12-25

    申请号:US12142499

    申请日:2008-06-19

    CPC classification number: G06F9/381 G06F9/325

    Abstract: The execution status of pipeline processing is highly visualized by appropriately displaying processes forming loops in a simplified manner. A loop-information storage unit stores loop-defining information specifying the address of an instruction that causes a pipeline process forming a loop. An operation-information storage unit stores operation information that includes the address of an instruction input into a pipeline and information indicating the execution status of a pipeline process caused by the instruction. A loop determination unit determines whether each pipeline process indicated by the operation information forms a loop by referring to the loop-defining information. An output unit outputs visualization information indicating, in a visually comprehensible manner, the execution status of a pipeline process that has been determined to form a loop for a predetermined number of executions of the loop and the execution status of a pipeline process that has been determined to form no loop.

    Abstract translation: 通过适当地显示以简化的方式形成循环的过程,管理处理的执行状态高度可视化。 循环信息存储单元存储指定导致形成循环的流水线处理的指令的地址的循环定义信息。 操作信息存储单元存储包括输入到管道中的指令的地址的操作信息和指示由该指令引起的流水线处理的执行状态的信息。 循环确定单元通过参考循环定义信息来确定由操作信息指示的每个流水线处理是否形成循环。 输出单元输出可视化信息,其以视觉上可理解的方式指示已被确定为形成循环的预定次数的循环的流水线处理的执行状态和已经确定的流水线处理的执行状态 形成无循环。

    Wander generator, and digital line tester and phase noise transfer characteristic analyzer using the same
    30.
    发明授权
    Wander generator, and digital line tester and phase noise transfer characteristic analyzer using the same 有权
    漂移发生器和数字线路测试仪和相位噪声传输特性分析仪使用相同

    公开(公告)号:US07450633B2

    公开(公告)日:2008-11-11

    申请号:US11683313

    申请日:2007-03-07

    CPC classification number: G06F1/0335 G06F7/584 H04L1/24 H04L25/03343

    Abstract: A wander generator has a random number signal generator unit, a filter unit, a clock generator unit, a modulator unit, and a setting unit. The random number generator unit sequentially generates random number signals comprised of a plurality of bits at a constant speed in accordance with a predetermined algorithm. The filter unit receives a random number signal sequence generated by the random number signal generator unit for filtering. The clock generator unit generates a clock signal. The modulator unit modulates the frequency of clock signal generated by the clock generator unit with a signal output from the filter unit. The setting unit applies the filter unit with a signal for setting each amplitude value of a spectrum of a signal sequence output from the filter unit.

    Abstract translation: 漂移发生器具有随机数信号发生器单元,滤波器单元,时钟发生器单元,调制器单元和设置单元。 随机数发生器单元根据预定的算法顺序地以恒定速度产生由多个位组成的随机数信号。 滤波器单元接收由随机数信号发生器单元产生的用于滤波的随机数信号序列。 时钟发生器单元产生时钟信号。 调制器单元利用从滤波器单元输出的信号来调制由时钟发生器单元产生的时钟信号的频率。 设置单元对滤波器单元施加用于设置从滤波器单元输出的信号序列的频谱的每个振幅值的信号。

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