Abstract:
Techniques are provided for reducing power consumption in memory cells. A static (SRAM) memory cell includes two cross coupled inverters. One or more transistors are coupled between the inverters and the power supply voltages. The transistors are turned OFF for a period of time during a memory state transition to block current flow between the high power supply voltage and the low power supply voltage to reduce power consumption.
Abstract:
A single-size interior cabin sidewall panel fits aircraft of different sizes. The panel is fabricated so that in its "relaxed" state it has a curved configuration which requires the panel to be unbended to fit in the aircraft. Larger aircraft require more unbending of the panel than do smaller aircraft. This results in a uniform pressure across the panel which promotes a close fit between adjacent overlapping sidewall panels.
Abstract:
Module sidewalls (14) define an office space adjacent to an aisle (6) in an aircraft passenger cabin. The sidewalls (14) are dimensioned to extend downwardly substantially to the cabin floor (2) and upwardly a distance sufficient to screen the office space. The sidewalls (14) are spaced from the cabin ceiling (4) to allow air circulation and create a feeling of openness. The sidewalls (14) define an entry opening (16), and a recess (20) to allow persons in the aisle (6) to step into the recess (20) out of the way of other persons or carts in the aisle (6). The module (12) includes a seat (22), a desk top (24) and equipment such as a telephone (26) and a computer link. The elements of the module (12) are arranged to maximize elbow room and leg room within a predetermined cabin floor area. Hexagonal modules (12) are arranged in a single continuous row or in two contiguous nested rows between two aisles (6 ). Side modules (12', 12") are formed partly by the cabin sidewalls (8).
Abstract:
An integrated circuit fabricated by a mask set including a mask to generate a metal pattern defined by CAD software, the metal pattern generation method including: reading a binary data set, the data points in the set uniquely matched to a plurality of fixed metal tabs; and selecting a metal tab from a first set of selectable metal tabs for a first data value, or a second set of selectable metal tabs for a second data value for each of the fixed metal tabs; wherein a first set metal tab and a second set metal tab couples each said fixed metal tab to first and second voltages respectively.
Abstract:
Embodiments of N-well or P-well strap structures are disclosed with lower space requirements achieved by forming the strap on both sides of one or more floating polysilicon gate fingers.
Abstract:
Techniques and circuitry provide fast, accurate, proper, and reliable transfer of configuration data from an on-chip nonvolatile memory to the programmable logic core of a programmable logic integrated circuit. A first technique includes not allowing the programmable logic to be configured until the data held in the on-chip nonvolatile memory can be read correctly and reliably. A second technique includes verifying the configuration data is transferred from the nonvolatile memory to the programmable logic core correctly and without error during the transfer process. These two techniques may be combined or used individually during the configuration of an integrated circuit.
Abstract:
Programmable logic device integrated circuitry having differential I/O circuitry is provided. The differential I/O circuitry may include output drivers for providing differential digital output data signals across pairs of output lines. A user may program the I/O circuitry to accommodate different high-speed differential I/O signaling standards. The user may also program the I/O circuitry to provide a desired amount of preemphasis to the output data signals.
Abstract:
A supply voltage detection circuit determines when the voltage for any one of the power supply signals received by an integrated circuit device is below its steady state level, as may occur during a hot socket condition when the device is inserted in or removed from a powered-on system. A first detection circuit determines when the first supply voltage level is below its steady state level, and a second detection circuit determines when the second supply voltage level is below its steady state level. A logic circuit provides a detected condition signal that disables current flow through an input/output terminal associated with the supply voltage detection circuit. The circuit is able to rapidly detect hot socket conditions for a wide range of power supply signal levels, including low supply signal levels, while limiting leakage current effects.