公开(公告)号：US20230314483A1

公开(公告)日：2023-10-05

申请号：US17657135

申请日：2022-03-30

Applicant: Allegro MicroSystems, LLC

Inventor： Shixi Louis Liu ,  Maxwell McNally ,  Alexander Latham

IPC: G01R15/20 ,  H01L43/04 ,  H01L43/06 ,  H01L43/14

CPC classification number: G01R15/207 ,  H01L43/14 ,  H01L43/065 ,  H01L43/04

Abstract: A current sensor IC includes a unitary lead frame having a primary conductor with a first thickness and a secondary lead having a second thickness less than the first thickness. A semiconductor die adjacent to the primary conductor includes a magnetic field sensing circuit to sense a magnetic field associated with the current and generate a secondary signal indicative of the current. An insulation structure is disposed between the primary conductor and the die. A mold material encloses a first portion of the secondary lead and a second portion of the secondary lead that is exposed outside of the package has the second thickness. A method of manufacturing a current sensor IC includes providing a unitary lead frame sheet having a first thickness, decreasing a thickness of a portion of the sheet to provide a first portion with the first thickness and a second portion with a smaller thickness, and stamping the sheet to form a repeating lead frame pattern, with each pattern including a primary conductor formed from the first portion and secondary leads formed from the second portion.

公开(公告)号：US20220165647A1

公开(公告)日：2022-05-26

申请号：US17650874

申请日：2022-02-14

Applicant: Allegro MicroSystems, LLC

Inventor： Robert A. Briano ,  Shixi Louis Liu ,  William P. Taylor

IPC: H01L23/495 ,  H01L23/00

Abstract: Methods and apparatus for a signal isolator having enhanced creepage characteristics. In embodiments, a signal isolator IC package comprises a leadframe including a die paddle having a first surface to support a die and an exposed second surface. A die is supported by a die paddle wherein a width of the second surface of the die paddle is less than a width of the die.

公开(公告)号：US11289406B2

公开(公告)日：2022-03-29

申请号：US16574621

申请日：2019-09-18

Applicant: Allegro MicroSystems, LLC

Inventor： Robert A. Briano ,  Shixi Louis Liu ,  William P. Taylor

IPC: H01L23/495 ,  H01L23/00

Abstract: Methods and apparatus for a signal isolator having enhanced creepage characteristics. In embodiments, a signal isolator IC package comprises a leadframe including a die paddle having a first surface to support a die and an exposed second surface. A die is supported by a die paddle wherein a width of the second surface of the die paddle is less than a width of the die.

公开(公告)号：US09865807B2

公开(公告)日：2018-01-09

申请号：US14877309

申请日：2015-10-07

Applicant: Allegro Microsystems, LLC

Inventor： Shixi Louis Liu ,  Harianto Wong ,  Paul A. David ,  John B. Sauber ,  Shaun D. Milano ,  Raguvir Kanda ,  Bruce Hemenway

IPC: H01L23/495 ,  H01L43/14 ,  H01L43/04 ,  H01L21/48 ,  H01L43/06 ,  G01R33/00 ,  G01R33/09 ,  G01R15/20 ,  H01L23/00

CPC classification number: H01L43/14 ,  G01R15/202 ,  G01R15/207 ,  G01R33/0052 ,  G01R33/09 ,  H01L21/4828 ,  H01L23/49548 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L43/04 ,  H01L43/065 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2224/81801 ,  H01L2924/15162 ,  H01L2924/014 ,  H01L2924/00014

Abstract: In one aspect, a method includes processing a metal substrate, performing a first etch on a first surface of the metal substrate to form, for an integrated circuit package, secondary leads and a curved component having two primary leads and performing a second etch, on a second surface of the substrate opposite the first surface, at locations on the secondary leads and locations on the curved component to provide a locking mechanism. Each primary lead located at a respective end of the curved component.

公开(公告)号：US20240047314A1

公开(公告)日：2024-02-08

申请号：US18490815

申请日：2023-10-20

Applicant: Allegro MicroSystems, LLC

Inventor： Robert A. Briano ,  Shixi Louis Liu

IPC: H01L23/495 ,  H01L23/31 ,  H10N52/00 ,  G01R15/20 ,  G01R19/00

CPC classification number: H01L23/49541 ,  H01L23/3107 ,  H10N52/00 ,  G01R15/202 ,  G01R19/0092 ,  H01L2224/48245 ,  H01L24/48

Abstract: A current sensor integrated circuit package includes a primary conductor having an input portion and an output portion, both with reduced area edges. Secondary leads each have an exposed portion and an elongated portion that is offset with respect to the exposed portion. A semiconductor die is disposed adjacent to the primary conductor on an insulator portion and at least one magnetic field sensing element is supported by the semiconductor die. A package body includes a first portion enclosing the semiconductor die and a portion of the primary conductor and a second portion enclosing the elongated portion of the plurality of secondary leads. The first package body portion has a first width configured to expose the input and output portions of the primary conductor and the second package body portion has a second width between a first and second package body side edges that is larger than the first width.

公开(公告)号：US20230221355A1

公开(公告)日：2023-07-13

申请号：US18182434

申请日：2023-03-13

Applicant: Allegro MicroSystems, LLC

Inventor： Shixi Louis Liu

IPC: G01R15/20

CPC classification number: G01R15/202

Abstract: A current sensor circuit package includes a primary conductor having an input portion into which a current flows, an output portion from which the current flows, and an exposed portion, wherein the input and output portions have a reduced area edge. A secondary lead has an elongated portion that is offset with respect to the exposed portion of the secondary lead. A semiconductor die is disposed adjacent to the primary conductor on an insulator portion and at least one magnetic field sensing element is supported by the semiconductor die. A package body enclosing the semiconductor die and a portion of the primary conductor includes a first cutout in a first side edge configured to expose the reduced area edge of the input portion of the primary conductor and a second cutout on a second side edge configured to expose the reduced area edge of the output portion of the primary conductor, wherein the first side edge of the package body is substantially parallel with respect to the second side edge of the package body.

公开(公告)号：US11644485B2

公开(公告)日：2023-05-09

申请号：US17495879

申请日：2021-10-07

Applicant: Allegro MicroSystems, LLC

Inventor： Shixi Louis Liu ,  Paul A. David ,  Natasha Healey

IPC: G01R15/20 ,  H01L23/49 ,  G01R19/00 ,  H01L23/495

CPC classification number: G01R19/0092 ,  G01R15/207 ,  H01L23/49541 ,  H01L23/49575 ,  H01L2224/49171

Abstract: A current sensor integrated circuit configured to sense a current through a current conductor includes a lead frame at least one signal lead, a fan out wafer level package (FOWLP), and a mold material enclosing the FOWLP and a portion of the lead frame. The FOWLP includes a semiconductor die configured to support at least one magnetic field sensing element to sense a magnetic field associated with the current, wherein the semiconductor die has a first surface on which at least one connection pad is accessible, a redistribution layer in contact with the at least one connection pad, and an insulating layer in contact with the redistribution layer, wherein the insulating layer is configured to extend beyond a periphery of the semiconductor die by a minimum distance. The die connection pad is configured to be electrically coupled to the at least one signal lead.

公开(公告)号：US11519939B2

公开(公告)日：2022-12-06

申请号：US17472769

申请日：2021-09-13

Applicant: Allegro MicroSystems, LLC

Inventor： Shixi Louis Liu ,  Paul A. David ,  Shaun D. Milano ,  Rishikesh Nikam ,  Alexander Latham ,  Wade Bussing ,  Natasha Healey ,  Georges El Bacha

IPC: H01L21/44 ,  G01R15/08 ,  H01L43/04 ,  H01L43/06

Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.

公开(公告)号：US20210405092A1

公开(公告)日：2021-12-30

申请号：US17472769

申请日：2021-09-13

Applicant: Allegro MicroSystems, LLC

Inventor： Shixi Louis Liu ,  Paul A. David ,  Shaun D. Milano ,  Rishikesh Nikam ,  Alexander Latham ,  Wade Bussing ,  Natasha Healey ,  Georges El Bacha

IPC: G01R15/08 ,  H01L43/04 ,  H01L43/06

Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.

公开(公告)号：US11150273B2

公开(公告)日：2021-10-19

申请号：US16884311

申请日：2020-05-27

Applicant: Allegro MicroSystems, LLC

Inventor： Shixi Louis Liu ,  Paul A. David ,  Shaun D. Milano ,  Rishikesh Nikam ,  Alexander Latham ,  Wade Bussing ,  Natasha Healey ,  Georges El Bacha

IPC: H01L23/495 ,  G01R15/08 ,  H01L43/04 ,  H01L43/06

Abstract: A current sensor integrated circuit (IC) includes a unitary lead frame having at least one first lead having a terminal end, at least one second lead having a terminal end, and a paddle having a first surface and a second opposing surface. A semiconductor die is supported by the first surface of the paddle, wherein the at least one first lead is electrically coupled to the semiconductor die and the at least one second lead is electrically isolated from the semiconductor die. The current sensor IC further includes a first mold material configured to enclose the semiconductor die and the paddle and a second mold material configured to enclose at least a portion of the first mold material, wherein the terminal end of the at least one first lead and the terminal end of the at least one second lead are external to the second mold material.