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公开(公告)号：US11294443B1
公开(公告)日：2022-04-05
申请号：US17018999
申请日：2020-09-11
Applicant: Apple Inc.
Inventor： Jafar Savoj , Robert S. Brandt, II , Bruno W. Garlepp
IPC: G06F1/00 , G06F1/28 , G06F1/3296 , G01R19/00 , G01K7/00
Abstract: A sensor circuit in a computer system measures a frequency of an oscillator circuit and uses the measured frequency to determine an operating condition of the computer system. The accuracy of the operating condition is limited by various sources of noise, including device noise, that introduce error into frequency measurements, limiting the accuracy to which the frequency of the oscillator signal may be measured. To improve the accuracy of the frequency measurement of the oscillator signal, the sensor circuit disables the oscillator between successive measurements, in order to reduce the correlation of error between the successive measurements. The sensor circuit combines the multiple measurement results to determine the frequency of the oscillator signal to a higher degree of accuracy, thereby improving the accuracy to which the operating condition is determined.
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公开(公告)号：US20220100220A1
公开(公告)日：2022-03-31
申请号：US17033528
申请日：2020-09-25
Applicant: Apple Inc.
Inventor： Ali Mesgarani , Ke Yun , Seyedeh Sedigheh Hashemi , Jasdeep S. Dhaliwal , Mansour Keramat , Jafar Savoj , Bruno W. Garlepp , Vahid Majidzadeh Bafar , Emerson S. Fang
Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.
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公开(公告)号：US11258447B2
公开(公告)日：2022-02-22
申请号：US16796405
申请日：2020-02-20
Applicant: Apple Inc.
Inventor： Ramy A. Ahmed , Bruno W. Garlepp , Jafar Savoj
IPC: H03K21/00 , H03K21/40 , H03K3/03 , H03K19/0175 , H03K21/08
Abstract: A circuit for sensing local operating properties of an integrated circuit is disclosed. The circuit may include one or more sensor circuits configured to sense the local operating properties of the integrated circuit. The sensor circuits may receive a supply voltage with a magnitude in a limited range from a digital power supply that is different from the digital power supply that provides power to functional circuits in the integrated circuit. Level shifters may be coupled to the sensor circuits to shift output signals from the sensor circuits to levels that correspond to the digital power supply that provides power to functional circuits in the integrated circuit. Counters and a shift register may be coupled to the level shifters to receive the shifted output signals, the values of which may be used to determine the local operating properties of the integrated circuit as sensed by the sensor circuits.
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公开(公告)号：US20210099252A1
公开(公告)日：2021-04-01
申请号：US16933449
申请日：2020-07-20
Applicant: Apple Inc.
Inventor： Jafar Savoj , Praveen R. Singh , Brian S. Leibowitz , Emerson S. Fang
IPC: H04L1/02 , H03K19/0175
Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.
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公开(公告)号：US10756849B2
公开(公告)日：2020-08-25
申请号：US16253100
申请日：2019-01-21
Applicant: Apple Inc.
Inventor： Jafar Savoj , Praveen R. Singh , Brian S. Leibowitz , Emerson S. Fang
IPC: H04L1/02 , H03K19/0175 , H04L25/02 , H04L25/06 , H04L25/03
Abstract: A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.
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Patent Agency Ranking
公开(公告)号：US20200183874A1
公开(公告)日：2020-06-11
申请号：US16700356
申请日：2019-12-02
Applicant: Apple Inc.
Inventor： Jafar Savoj , Jose A. Tierno , Sanjeev K. Maheshwari , Brian S. Leibowitz , Pradeep R. Trivedi , Gin Yee , Emerson S. Fang
Abstract: A system and method for efficiently transporting data across lanes. A computing system includes an interconnect with lanes for transporting data between a source and a destination. When a source receives an indication of a bandwidth requirement change from a first data rate to a second data rate, the transmitter in the source sends messages to the receiver in the destination. The messages indicate that the data rate is going to change and reconfiguration of one or more lanes will be performed. The transmitter selects one or more lanes for transporting data at the second data rate. The transmitter maintains data transport at the first data rate while reconfiguring the selected one or more lanes to the second data rate. After completing the reconfiguration, the transmitter transports data at the second data rate on the selected one or more lanes while preventing data transport on any unselected lanes.
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公开(公告)号：US10345846B1
公开(公告)日：2019-07-09
申请号：US15902308
申请日：2018-02-22
Applicant: Apple Inc.
Inventor： Ryan D. Bartling , Jafar Savoj , Daniel J. Fritchman
Abstract: A reference voltage generation circuit (or bandgap circuit) having a flipped-gate transistor is disclosed. A bandgap circuit according to the disclosure includes first, second, third and fourth transistors. The first transistor is a flipped-gate transistor having a gate terminal of an opposite polarity (e.g., an n-channel metal oxide semiconductor, or NMOS, transistor having a gate terminal with a p-type polysilicon implant). The second third and fourth transistors have a corresponding type polysilicon implants (e.g., NMOS transistors having respective gate terminals with an n-type polysilicon implant). The circuit is configured to generate a reference voltage equal to a sum of gate-source voltages of the first and third transistors, minus respective gate-source voltages of the second and fourth transistors.
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公开(公告)号：US20170199089A1
公开(公告)日：2017-07-13
申请号：US15272941
申请日：2016-09-22
Applicant: Apple Inc.
Inventor： Daniel J. Fritchman , Jafar Savoj
Abstract: Reference center circuitry for a metrology system is disclosed. In one embodiment, the circuitry includes a reference sensor having a topology and characteristics identical to a number of sensors throughout an IC. The both the reference sensor and the sensors on the IC may be used to perform voltage and temperature measurements. The reference sensor may receive a voltage from a precision voltage supply, and may be used as a sensor to provide a basis for calibrating the other sensors, as well. Thereafter, temperature readings obtained from the other sensors may be correlated to the readings obtained by the reference sensor for enhanced accuracy. The reference center circuitry also includes analog process monitoring circuitry, which may be coupled to some, if not all of the transistors implemented on an IC.
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公开(公告)号：US20170089975A1
公开(公告)日：2017-03-30
申请号：US14868954
申请日：2015-09-29
Applicant: Apple Inc.
Inventor： Jafar Savoj , Brian S. Leibowitz , Emerson S. Fang
CPC classification number: G01R31/2874 , G01R31/2884 , G01R31/30 , G01R35/005 , G06F1/206 , G06F1/26 , G06F1/3203 , H03K19/003
Abstract: An apparatus and method for performing on-chip parameter measurement is disclosed. In one embodiment, an IC includes a number of functional circuit blocks each having one or more sensors for measuring parameters such as voltage and temperature. Each of the functional blocks includes circuitry coupled to receive power from a local supply voltage node. Similarly, the circuitry in each of the sensors is also coupled to receive power from the corresponding local supply voltage node. Each of the sensors may be calibrated to compensate for process, voltage, and temperature variations. Various methods based on characterization of the sensors may be used to perform the calibrations.
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公开(公告)号：US12278719B2
公开(公告)日：2025-04-15
申请号：US17931096
申请日：2022-09-09
Applicant: Apple Inc.
Inventor： Bo Sun , Jafar Savoj
Abstract: A receiver with feed-forward equalization is disclosed. A receiver includes a delay circuit configured to receive a first signal that encodes a serial data stream having a plurality of data symbols. The delay circuit includes at least one T-coil circuit and is configured to generate a plurality of delayed signals using the first signal. The receiver further includes a front-end circuit configured to generate an equalized signal using the at first signal and one or more delayed signals of the plurality of delayed signals. A sample circuit is configured to sample the equalized signal to generate a plurality of samples. A recovery circuit configured to generate a plurality of recovered data symbols using the plurality of samples.
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