公开(公告)号：US11373803B2

公开(公告)日：2022-06-28

申请号：US16056847

申请日：2018-08-07

Applicant: APPLIED MATERIALS, INC.

Inventor： Peng Suo ,  Yu Gu ,  Guan Huei See ,  Arvind Sundarrajan

IPC: H01F7/06 ,  H01F41/04 ,  H01F17/00 ,  H01F27/28 ,  H01L21/48 ,  H01L23/498 ,  H01L49/02

Abstract: A method of forming a magnetic core on a substrate having a stacked inductor coil includes etching a plurality of polymer layers to form at least one feature through the plurality of polymer layers, wherein the at least one feature is disposed within a central region of a stacked inductor coil formed on the substrate; and depositing a magnetic material within the at least one feature.

公开(公告)号：US10515927B2

公开(公告)日：2019-12-24

申请号：US15634012

申请日：2017-06-27

Applicant: APPLIED MATERIALS, INC.

Inventor： Prayudi Lianto ,  Guan Huei See ,  Arvind Sundarrajan ,  Ranga Rao Arnepalli ,  Prerna Goradia

IPC: H01L21/48 ,  H01L23/00 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/56

Abstract: A fan-out process using chemical mechanical planarization (CMP) reduces the step-height between a semiconductor die and the surrounding overmolding of a reconstituted wafer. The reconstituted wafer is formed by overmolding a back side of at least one die that is placed with an active side facing down. The reconstituted wafer is then oriented to expose the die and the active side. A polymer layer is then formed over the reconstituted wafer. A CMP process then removes a portion of the polymer layer until a certain thickness above the die surface is obtained, reducing the step-height between the polymer layer on top of the die surface and the polymer layer on the adjacent mold compound surface. The CMP process can also be performed after a subsequent redistribution layer is formed on the reconstituted wafer.

公开(公告)号：US10211072B2

公开(公告)日：2019-02-19

申请号：US15840900

申请日：2017-12-13

Applicant: Applied Materials, Inc.

Inventor： Han-Wen Chen ,  Steven Verhaverbeke ,  Roman Gouk ,  Guan Huei See ,  Yu Gu ,  Arvind Sundarrajan ,  Kyuil Cho ,  Colin Costano Neikirk ,  Boyi Fu

IPC: H01L21/50 ,  H01L21/56 ,  H01L23/31

Abstract: Embodiments of the present disclosure generally describe methods for minimizing the occurrence and the extent of die shift during the formation of a reconstituted substrate in fan-out wafer level packaging processes. Die shift is a process defect that occurs when a die (device) moves from its intended position within a reconstituted substrate during the formation thereof. Generally, the methods disclosed herein include depositing a device immobilization layer and/or a plurality of device immobilization beads over and/or adjacent to a plurality of singular devices (individual dies), and the carrier substrate they are positioned on, before forming a reconstituted substrate with an epoxy molding compound. The device immobilization layer and/or the plurality of device immobilization beads immobilize the plurality of singular devices and prevents them from shifting on the carrier substrate during the molding process.

公开(公告)号：US20230068312A1

公开(公告)日：2023-03-02

申请号：US17897378

申请日：2022-08-29

Applicant: Applied Materials, Inc.

Inventor： Suketu Arun Parikh ,  Ashish Pal ,  El Mehdi Bazizi ,  Andrew Yeoh ,  Nitin K. Ingle ,  Arvind Sundarrajan ,  Guan Huei See ,  Martinus Maria Berkens ,  Sameer A. Deshpande ,  Balasubramanian Pranatharthiharan ,  Yen-Chu Yang

IPC: H01L21/768 ,  H01L21/8234 ,  H01L23/48

Abstract: Semiconductor devices and methods of manufacturing the same are described. Transistors are fabricated using a standard process flow. A via opening extending from the top surface of the substrate to a bottom surface of the wafer device is formed, thus allowing nano TSV for high density packaging, as well as connecting the device to the backside power rail. A metal is deposited in the via opening, and the bottom surface of the wafer device is bound to a bonding wafer. The substrate is optionally thinned, and a contact electrically connected to the metal is formed.

公开(公告)号：US11289387B2

公开(公告)日：2022-03-29

申请号：US16944285

申请日：2020-07-31

Applicant: APPLIED MATERIALS, INC.

Inventor： Prayudi Lianto ,  Sik Hin Chi ,  Shih-Chao Hung ,  Pin Gian Gan ,  Ricardo Fujii Vinluan ,  Gaurav Mehta ,  Ramesh Chidambaram ,  Guan Huei See ,  Arvind Sundarrajan ,  Upendra V. Ummethala ,  Wei Hao Kew ,  Muhammad Adli Danish Bin Abdullah ,  Michael Charles Kutney ,  Mark McTaggart Wylie ,  Amulya Ligorio Athayde ,  Glen T. Mori

IPC: H01L21/768 ,  H01L21/66 ,  H01L21/304 ,  H01L21/306 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/683

Abstract: Methods and apparatus perform backside via reveal processes using a centralized control framework for multiple process tools. In some embodiments, a method for performing a backside via reveal process may include receiving process tool operational parameters from process tools involved in the backside via reveal process by a central controller, receiving sensor metrology data from at least one or more of the process tools involved in the backside via reveal process, and altering the backside reveal process based, at least in part, on the process tool operational parameters and the sensor metrology data by adjusting two or more of the process tools involved in the backside via reveal process. The profile parameters are configured to prevent backside via breakage during a chemical mechanical polishing (CMP) process.

公开(公告)号：US10978334B2

公开(公告)日：2021-04-13

申请号：US14602885

申请日：2015-01-22

Applicant: Applied Materials, Inc.

Inventor： Chin Hock Toh ,  Tuck Foong Koh ,  Sriskantharajah Thirunavukarasu ,  Jen Sern Lew ,  Arvind Sundarrajan ,  Seshadri Ramaswami

IPC: H01L21/687 ,  C23C16/458 ,  H01J37/32 ,  H01L21/67

Abstract: A sealing structure is between a workpiece or substrate and a carrier for plasma processing. In one example, a substrate carrier has a top surface for holding a substrate, the top surface having a perimeter and a resilient sealing ridge on the perimeter of the top surface to contact the substrate when the substrate is being carried on the carrier.

公开(公告)号：US20200206775A1

公开(公告)日：2020-07-02

申请号：US16427723

申请日：2019-05-31

Applicant: APPLIED MATERIALS, INC.

Inventor： Yueh Sheng Ow ,  Yue Cui ,  Arvind Sundarrajan ,  Nuno Yen-Chu Chen ,  Guan Huei See ,  Felix Deng

IPC: B05D3/06

Abstract: Methods of curing a polymer layer on a substrate using variable microwave frequency are provided herein. In some embodiments, methods of curing a polymer layer on a substrate using variable microwave frequency include (a) forming a first thin-film polymer layer on a substrate, the first thin-film polymer layer including at least one first base dielectric material and at least one microwave tunable material, (b) applying a variable frequency microwave energy to the substrate and the first thin-film polymer layer to heat the substrate and the first thin-film polymer layer to a first temperature, and (c) adjusting the variable frequency microwave energy applied to the substrate and the first thin-film polymer layer to tune at least one material property of the first thin-film polymer layer.

公开(公告)号：US10566226B2

公开(公告)日：2020-02-18

申请号：US14933651

申请日：2015-11-05

Applicant: APPLIED MATERIALS, INC.

Inventor： Sriskantharajah Thirunavukarasu ,  Eng Sheng Peh ,  Srinivas D. Nemani ,  Arvind Sundarrajan ,  Avinash Avula ,  Ellie Y. Yieh ,  Michael Rice ,  Ginetto Addiego

IPC: B65D85/48 ,  H01L21/673 ,  B25J11/00

Abstract: Embodiments of multi-cassette carrying cases are provided herein. In some embodiments a multi-cassette carrying case includes: a body having an inner volume; a door coupled to the body to selectively seal off the inner volume; and a plurality of cassette holders disposed in the inner volume to hold one or more substrate cassettes. In some embodiments, a method of transferring substrates includes: placing a substrate in a substrate cassette, wherein an inner volume of the substrate cassette is sealed from an environment outside of the substrate cassette; and placing the substrate cassette in a multi-cassette carrying case.

公开(公告)号：US10347516B2

公开(公告)日：2019-07-09

申请号：US14933635

申请日：2015-11-05

Applicant: APPLIED MATERIALS, INC.

Inventor： Sriskantharajah Thirunavukarasu ,  Eng Sheng Peh ,  Srinivas D. Nemani ,  Arvind Sundarrajan ,  Avinash Avula ,  Ellie Y. Yieh

IPC: H01L21/673 ,  H01L21/677 ,  H01L21/67

Abstract: Embodiments of substrate transfer chambers are provided herein. In some embodiments, a substrate transfer chamber includes a body having an interior volume, wherein a bottom portion of the body includes a first opening; an adapter plate coupled to the bottom portion of the body to couple the substrate transfer chamber to a load lock chamber of a substrate processing system; wherein the adapter plate includes a second opening aligned with the first opening to fluidly couple the interior volume with an inner volume of the load lock chamber; a cassette support disposed in the interior volume to support a substrate cassette; and a lift actuator coupled to the cassette support to lower or raise the substrate cassette into or out of the load lock chamber.

公开(公告)号：US10153187B2

公开(公告)日：2018-12-11

申请号：US14933628

申请日：2015-11-05

Applicant: APPLIED MATERIALS, INC.

Inventor： Sriskantharajah Thirunavukarasu ,  Eng Sheng Peh ,  Srinivas D. Nemani ,  Arvind Sundarrajan ,  Avinash Avula ,  Ellie Y. Yieh

IPC: H01L21/673 ,  H01L21/67

Abstract: Embodiments method and apparatus for transferring a substrate are provided herein. In some embodiments, a substrate cassette includes a body having an upper portion and a lower portion, the upper portion and the lower portion defining an interior volume when the upper portion is coupled to the lower portion; a locking mechanism moveable between a locked position, in which the upper and lower portions are coupled, and an unlocked position, in which the lower portion can be separated from the upper portion; and a load distribution plate coupled to an upper surface of the upper portion along an edge of the upper portion to distribute a load applied to the load distribution plate.