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公开(公告)号:US10229827B2
公开(公告)日:2019-03-12
申请号:US15844989
申请日:2017-12-18
Applicant: Applied Materials, Inc.
Inventor: Han-Wen Chen , Steven Verhaverbeke , Roman Gouk , Guan Huei See , Yu Gu , Arvind Sundarrajan
IPC: H01L21/31 , H01L21/02 , H01L23/538 , H01L21/48 , H01L21/311 , G03F7/00 , H01L21/027
Abstract: Embodiments of the present disclosure generally describe methods of forming one or more device terminal redistribution layers using imprint lithography. The methods disclosed herein enable the formation of high aspect ratio interconnect structures at lower costs than conventional photolithography and etch processes. Further, the processes and methods described herein desirably remove, reduce, and/or substantially eliminate voids in the surrounding polymer layer formed during the polymer deposition process or subsequent thereto.
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公开(公告)号:US11791094B2
公开(公告)日:2023-10-17
申请号:US17227332
申请日:2021-04-11
Applicant: APPLIED MATERIALS, INC.
Inventor: Peng Suo , Yu Gu , Guan Huei See , Arvind Sundarrajan
CPC classification number: H01F41/041 , H01F17/0013 , H01F27/24 , H01F27/2804 , H01F41/046 , H01L21/486 , H01L21/4857 , H01L23/49822 , H01L23/49838 , H01L28/10 , H01F41/04 , H01F2017/0066 , H01F2027/2809
Abstract: A method of forming a magnetic core on a substrate having a stacked inductor coil includes etching a plurality of polymer layers to form at least one feature through the plurality of polymer layers, wherein the at least one feature is disposed within a central region of a stacked inductor coil formed on the substrate; and depositing a magnetic material within the at least one feature.
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公开(公告)号:US11373803B2
公开(公告)日:2022-06-28
申请号:US16056847
申请日:2018-08-07
Applicant: APPLIED MATERIALS, INC.
Inventor: Peng Suo , Yu Gu , Guan Huei See , Arvind Sundarrajan
Abstract: A method of forming a magnetic core on a substrate having a stacked inductor coil includes etching a plurality of polymer layers to form at least one feature through the plurality of polymer layers, wherein the at least one feature is disposed within a central region of a stacked inductor coil formed on the substrate; and depositing a magnetic material within the at least one feature.
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公开(公告)号:US20210090905A1
公开(公告)日:2021-03-25
申请号:US16579723
申请日:2019-09-23
Applicant: APPLIED MATERIALS, INC.
Inventor: Guan Huei See , Prayudi Lianto , Yu Gu
IPC: H01L21/56 , H01L21/3105
Abstract: Embodiments of methods for processing a semiconductor substrate are described herein. In some embodiments, a method of processing a semiconductor substrate includes removing material from a backside of a reconstituted substrate having a plurality of dies to expose at least one die of the plurality of dies; etching the backside of the reconstituted substrate to remove material from the exposed at least one die; and depositing a first layer of material on the backside of the reconstituted substrate and the exposed at least one die.
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公开(公告)号:US10211072B2
公开(公告)日:2019-02-19
申请号:US15840900
申请日:2017-12-13
Applicant: Applied Materials, Inc.
Inventor: Han-Wen Chen , Steven Verhaverbeke , Roman Gouk , Guan Huei See , Yu Gu , Arvind Sundarrajan , Kyuil Cho , Colin Costano Neikirk , Boyi Fu
Abstract: Embodiments of the present disclosure generally describe methods for minimizing the occurrence and the extent of die shift during the formation of a reconstituted substrate in fan-out wafer level packaging processes. Die shift is a process defect that occurs when a die (device) moves from its intended position within a reconstituted substrate during the formation thereof. Generally, the methods disclosed herein include depositing a device immobilization layer and/or a plurality of device immobilization beads over and/or adjacent to a plurality of singular devices (individual dies), and the carrier substrate they are positioned on, before forming a reconstituted substrate with an epoxy molding compound. The device immobilization layer and/or the plurality of device immobilization beads immobilize the plurality of singular devices and prevents them from shifting on the carrier substrate during the molding process.
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公开(公告)号:US10276424B2
公开(公告)日:2019-04-30
申请号:US15638798
申请日:2017-06-30
Applicant: APPLIED MATERIALS, INC.
Inventor: Guan Huei See , Yu Gu , Arvind Sundarrajan
IPC: H01L21/56 , H01L21/683 , H01L23/00 , H01L23/31
Abstract: Methods and apparatus for wafer level packaging are described herein. According to one embodiment, a method comprises depositing an adhesive layer atop a carrier, placing at least a portion of a substrate pre-fabricated with a plurality of die cavities and a plurality of through vias atop the laminate, inserting a die into each of the die cavities, encapsulating the die and the substrate and debonding and removing the laminate and the carrier from the encapsulated die and substrate. Another embodiment provides an apparatus comprising a substrate, a plurality of die cavities formed through the substrate and a plurality of conductive through vias disposed through the substrate and arranged about the perimeter of each die cavity, wherein a top surface of the substrate is exposed for application of an encapsulating layer and a bottom surface of the substrate is exposed for placement on an adhesive layer.
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公开(公告)号:US20190051596A1
公开(公告)日:2019-02-14
申请号:US15673478
申请日:2017-08-10
Applicant: APPLIED MATERIALS, INC.
Inventor: Peng Suo , Yu Gu , Guan Huei See , Arvind Sundarajan
IPC: H01L23/522 , H01L21/768 , H01L21/027 , H01L21/02 , H01L21/283 , H01L23/528 , H01L21/3105 , H01L49/02
Abstract: Methods of processing a substrate include providing a substrate having a polymer dielectric layer and a metal layer formed atop the polymer dielectric layer; depositing a plurality of polymer layers atop the substrate; patterning the plurality of polymer layers to form at least one via that extends from a top surface of an uppermost polymer layer to a top surface of the metal layer; and forming a three-dimensional metal-insulator-metal (3D MIM) capacitance stack in the at least one via and over a portion of the metal layer and the plurality of polymer layers.
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公开(公告)号:US11355358B2
公开(公告)日:2022-06-07
申请号:US16579723
申请日:2019-09-23
Applicant: APPLIED MATERIALS, INC.
Inventor: Guan Huei See , Prayudi Lianto , Yu Gu
IPC: H01L21/56 , H01L21/3105
Abstract: Embodiments of methods for processing a semiconductor substrate are described herein. In some embodiments, a method of processing a semiconductor substrate includes removing material from a backside of a reconstituted substrate having a plurality of dies to expose at least one die of the plurality of dies; etching the backside of the reconstituted substrate to remove material from the exposed at least one die; and depositing a first layer of material on the backside of the reconstituted substrate and the exposed at least one die.
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公开(公告)号:US20210233707A1
公开(公告)日:2021-07-29
申请号:US17227332
申请日:2021-04-11
Applicant: APPLIED MATERIALS, INC.
Inventor: Peng Suo , Yu Gu , Guan Huei See , Arvind Sundarrajan
Abstract: A method of forming a magnetic core on a substrate having a stacked inductor coil includes etching a plurality of polymer layers to form at least one feature through the plurality of polymer layers, wherein the at least one feature is disposed within a central region of a stacked inductor coil formed on the substrate; and depositing a magnetic material within the at least one feature.
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公开(公告)号:US20190051454A1
公开(公告)日:2019-02-14
申请号:US16056847
申请日:2018-08-07
Applicant: APPLIED MATERIALS, INC.
Inventor: Peng Suo , Yu Gu , Guan Huei See , Arvind Sundarrajan
IPC: H01F41/04 , H01L49/02 , H01L23/498 , H01F27/28 , H01L21/48
Abstract: A method of forming a magnetic core on a substrate having a stacked inductor coil includes etching a plurality of polymer layers to form at least one feature through the plurality of polymer layers, wherein the at least one feature is disposed within a central region of a stacked inductor coil formed on the substrate; and depositing a magnetic material within the at least one feature.
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