Organic stripping composition and method of etching oxide using the same
    21.
    发明授权
    Organic stripping composition and method of etching oxide using the same 失效
    有机剥离组合物和使用其的氧化物蚀刻方法

    公开(公告)号:US07105474B2

    公开(公告)日:2006-09-12

    申请号:US10634880

    申请日:2003-08-06

    IPC分类号: C11D7/50

    摘要: Disclosed is an organic stripping composition and a method of etching a semiconductor device in which the generation of an Si pitting phenomenon can be prevented. The composition includes a compound including a hydroxyl ion (OH−), a compound including a fluorine ion (F−) and a sufficient amount of an oxidizing agent to control the pH of the composition within the range of from about 6.5 to about 8.0. The method includes dry etching an oxide by a dry etching using a plasma, and then ashing the etched oxide using an ashing process to remove an organic material. The method further includes supplying the organic stripping composition to remove residues including any residual organic material, a metal polymer, and an oxide type polymer. The stripping composition is stable onto various metals and does not induce the Si pitting phenomenon.

    摘要翻译: 公开了一种有机剥离组合物和蚀刻半导体器件的方法,其中可以防止产生Si点蚀现象。 该组合物包括含有羟基离子(OH)的化合物,含有氟离子(F)的化合物和足够量的氧化剂以控制pH 的组合物在约6.5至约8.0的范围内。 该方法包括通过使用等离子体的干蚀刻来干蚀刻氧化物,然后使用灰化工艺灰化蚀刻的氧化物以除去有机材料。 该方法还包括提供有机剥离组合物以除去包括任何残余有机材料,金属聚合物和氧化物型聚合物的残余物。 汽提组合物对各种金属是稳定的,不会引起Si点蚀现象。

    Semiconductor device and method thereof
    23.
    发明申请
    Semiconductor device and method thereof 审中-公开
    半导体装置及其方法

    公开(公告)号:US20060263971A1

    公开(公告)日:2006-11-23

    申请号:US11436582

    申请日:2006-05-19

    摘要: A semiconductor device and a method thereof are disclosed. In the example method, a mold layer having an opening may be formed on a substrate. A conductive etchable pattern (e.g., a preliminary conductive pattern, a lower electrode pattern, etc.) may be formed within the opening. The mold layer may be reduced so as to expose a portion of the conductive etchable pattern and less than all of the exposed portion of the conductive etchable pattern may be etched such that the etched conductive etchable pattern has a reduced thickness. The example semiconductor device may include the etched conductive etchable pattern as above-described with respect to the example method.

    摘要翻译: 公开了一种半导体器件及其方法。 在示例性方法中,可以在基板上形成具有开口的模具层。 可以在开口内形成导电刻蚀图案(例如,初步导电图案,下电极图案等)。 可以减小模具层,以便露出导电可蚀刻图案的一部分,并且可以蚀刻少于导电可蚀刻图案的全部暴露部分,使得蚀刻的导电可蚀刻图案具有减小的厚度。 示例性半导体器件可以包括如上面关于示例性方法的蚀刻的导电可蚀刻图案。

    Etching solution, method of forming a pattern using the same, method of manufacturing a multiple gate oxide layer using the same and method of manufacturing a flash memory device using the same
    24.
    发明授权
    Etching solution, method of forming a pattern using the same, method of manufacturing a multiple gate oxide layer using the same and method of manufacturing a flash memory device using the same 失效
    蚀刻溶液,使用其形成图案的方法,使用该方法制造多栅极氧化物层的方法以及使用其制造闪存器件的方法

    公开(公告)号:US07579284B2

    公开(公告)日:2009-08-25

    申请号:US11482773

    申请日:2006-07-10

    IPC分类号: H01L21/311

    CPC分类号: C09K13/04 H01L21/32134

    摘要: Example embodiments of the present invention relate to an etching solution, a method of forming a pattern using the same, a method of manufacturing a multiple gate oxide layer using the same and a method of manufacturing a flash memory device using the same. Other example embodiments of the present invention relate to an etching solution having an etching selectivity between a polysilicon layer and an oxide layer, a method of forming a pattern using an etching solution using the same, a method of manufacturing a multiple gate oxide layer using the same, and a method of manufacturing a flash memory device using the same. An etching solution including hydrogen peroxide (H2O2) and ammonium hydroxide (NH4OH) by a volume ratio of about 1:2 to about 1:10 mixed in water. In a method of forming a pattern and methods of manufacturing a multiple gate oxide layer and a flash memory device, a polysilicon layer may be formed on a substrate. An insulation layer pattern including an opening exposing the polysilicon layer may be formed on the polysilicon layer. The polysilicon layer exposed by the insulation layer pattern may be etched using the etching solution. A polysilicon layer pattern may be formed on the substrate using the etching solution.

    摘要翻译: 本发明的示例性实施例涉及一种蚀刻溶液,使用该方法形成图案的方法,使用该蚀刻溶液的多栅极氧化物层的制造方法以及使用其制造闪存器件的方法。 本发明的其它示例性实施例涉及在多晶硅层和氧化物层之间具有蚀刻选择性的蚀刻溶液,使用其使用蚀刻溶液形成图案的方法,使用该栅极氧化物层的方法 以及使用其制造闪存器件的方法。 包含在水中混合的体积比为约1:2至约1:10的过氧化氢(H 2 O 2)和氢氧化铵(NH 4 OH)的蚀刻溶液。 在形成图案的方法和制造多栅极氧化物层和闪存器件的方法中,可以在衬底上形成多晶硅层。 可以在多晶硅层上形成包括露出多晶硅层的开口的绝缘层图案。 可以使用蚀刻溶液蚀刻由绝缘层图案暴露的多晶硅层。 可以使用蚀刻溶液在衬底上形成多晶硅层图案。

    Etching solution, method of forming a pattern using the same, method of manufacturing a multiple gate oxide layer using the same and method of manufacturing a flash memory device using the same
    25.
    发明申请
    Etching solution, method of forming a pattern using the same, method of manufacturing a multiple gate oxide layer using the same and method of manufacturing a flash memory device using the same 失效
    蚀刻溶液,使用其形成图案的方法,使用该方法制造多栅极氧化物层的方法以及使用其制造闪存器件的方法

    公开(公告)号:US20070015372A1

    公开(公告)日:2007-01-18

    申请号:US11482773

    申请日:2006-07-10

    IPC分类号: C09K13/00 B44C1/22 H01L21/302

    CPC分类号: C09K13/04 H01L21/32134

    摘要: Example embodiments of the present invention relate to an etching solution, a method of forming a pattern using the same, a method of manufacturing a multiple gate oxide layer using the same and a method of manufacturing a flash memory device using the same. Other example embodiments of the present invention relate to an etching solution having an etching selectivity between a polysilicon layer and an oxide layer, a method of forming a pattern using an etching solution using the same, a method of manufacturing a multiple gate oxide layer using the same, and a method of manufacturing a flash memory device using the same. An etching solution including hydrogen peroxide (H2O2) and ammonium hydroxide (NH4OH) by a volume ratio of about 1:2 to about 1:10 mixed in water. In a method of forming a pattern and methods of manufacturing a multiple gate oxide layer and a flash memory device, a polysilicon layer may be formed on a substrate. An insulation layer pattern including an opening exposing the polysilicon layer may be formed on the polysilicon layer. The polysilicon layer exposed by the insulation layer pattern may be etched using the etching solution. A polysilicon layer pattern may be formed on the substrate using the etching solution.

    摘要翻译: 本发明的示例性实施例涉及一种蚀刻溶液,使用该方法形成图案的方法,使用该蚀刻溶液的多栅极氧化物层的制造方法以及使用其制造闪存器件的方法。 本发明的其它示例性实施例涉及在多晶硅层和氧化物层之间具有蚀刻选择性的蚀刻溶液,使用其使用蚀刻溶液形成图案的方法,使用该栅极氧化物层的方法 以及使用其制造闪存器件的方法。 包含过氧化氢(H 2 O 2 O 2)和氢氧化铵(NH 4 OH)的体积比约为1:2的蚀刻溶液 至约1:10混合在水中。 在形成图案的方法和制造多栅极氧化物层和闪存器件的方法中,可以在衬底上形成多晶硅层。 可以在多晶硅层上形成包括露出多晶硅层的开口的绝缘层图案。 可以使用蚀刻溶液蚀刻由绝缘层图案暴露的多晶硅层。 可以使用蚀刻溶液在衬底上形成多晶硅层图案。

    Cell structure for a semiconductor memory device and method of fabricating the same
    27.
    发明授权
    Cell structure for a semiconductor memory device and method of fabricating the same 失效
    半导体存储器件的单元结构及其制造方法

    公开(公告)号:US08084801B2

    公开(公告)日:2011-12-27

    申请号:US12654255

    申请日:2009-12-15

    IPC分类号: H01L21/336

    CPC分类号: H01L27/0207 H01L27/10888

    摘要: In a 6F2 cell structure of a memory device and a method of fabricating the same, the plurality of active regions may have a first area at both end portions and a second area at a central portion. A portion of a bit-line contact pad may be positioned on the second area and the other portion may be positioned on a third area of the substrate that may not overlap with the plurality of active regions. The bit line may be connected with the bit-line contact pad at the third area. The cell structure may be more easily formed despite a 6F2-structured unit cell. The plurality of active regions may have an elliptical shape including major and minor axes. The plurality of active regions may be positioned in a major axis direction to thereby form an active row, and may be positioned in a minor axis direction in such a structure that a center of the plurality of active regions is shifted from that of an adjacent active region in a neighboring active row.

    摘要翻译: 在存储器件的6F2单元结构及其制造方法中,多个有源区可以在两端部具有第一区域,在中心部分可以具有第二区域。 位线接触焊盘的一部分可以位于第二区域上,另一部分可以位于基板的不与多个有源区域重叠的第三区域上。 位线可以与第三区域的位线接触焊盘连接。 尽管6F2结构的单元电池,电池结构也可以更容易地形成。 多个有源区域可以具有包括主轴和短轴的椭圆形状。 多个有源区域可以被定位在长轴方向上,从而形成有源行,并且可以以这样的结构定位在短轴方向上,使得多个有源区域的中心与相邻的活动区域的中心 相邻活动行中的区域。

    Phase-change semiconductor device and methods of manufacturing the same
    28.
    发明授权
    Phase-change semiconductor device and methods of manufacturing the same 有权
    相变半导体器件及其制造方法

    公开(公告)号:US08053751B2

    公开(公告)日:2011-11-08

    申请号:US12591531

    申请日:2009-11-23

    IPC分类号: H01L21/4763

    摘要: In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold, and reducing at least a portion of the etch stop layer, the reduced portion of the etch stop layer forming an electrical connection with the substrate.

    摘要翻译: 在相变半导体器件及其制造方法中,示例性方法可以包括在衬底上形成金属层图案,金属层图案包括露出衬底的一部分的开口,在其上形成蚀刻停止层 金属层图案,开口的侧壁和衬底的暴露部分,蚀刻停止层形成为具有小于上部厚度阈值的厚度,以及减少至少一部分蚀刻停止层,蚀刻部分的蚀刻 停止层与基底形成电连接。

    Polishing method using chemical mechanical slurry composition
    29.
    发明授权
    Polishing method using chemical mechanical slurry composition 有权
    抛光方法采用化学机械浆料组成

    公开(公告)号:US08048809B2

    公开(公告)日:2011-11-01

    申请号:US11898850

    申请日:2007-09-17

    IPC分类号: H01L21/302

    摘要: A slurry composition includes about 4.25 to about 18.5 weight percent of an abrasive, about 80 to about 95 weight percent of deionized water, and about 0.05 to about 1.5 weight percent of an additive. The slurry composition may further include a surfactant. In a polishing method using the slurry composition, a polysilicon layer may be rapidly polished, and also dishing and erosion of the polysilicon layer may be suppressed.

    摘要翻译: 浆料组合物包括约4.25至约18.5重量%的研磨剂,约80至约95重量%的去离子水和约0.05至约1.5重量%的添加剂。 浆料组合物还可以包括表面活性剂。 在使用浆料组合物的抛光方法中,可以快速抛光多晶硅层,并且可以抑制多晶硅层的凹陷和侵蚀。

    Phase-change semiconductor device and methods of manufacturing the same
    30.
    发明申请
    Phase-change semiconductor device and methods of manufacturing the same 有权
    相变半导体器件及其制造方法

    公开(公告)号:US20100072446A1

    公开(公告)日:2010-03-25

    申请号:US12591531

    申请日:2009-11-23

    IPC分类号: H01L45/00 H01L21/768

    摘要: In a phase-change semiconductor device and methods of manufacturing the same, an example method may include forming a metal layer pattern on a substrate, the metal layer pattern including an opening that exposes a portion of the substrate, forming an etch stop layer on the metal layer pattern, a sidewall of the opening and the exposed portion of the substrate, the etch stop layer formed with a thickness less than an upper thickness threshold, and reducing at least a portion of the etch stop layer, the reduced portion of the etch stop layer forming an electrical connection with the substrate.

    摘要翻译: 在相变半导体器件及其制造方法中,示例性方法可以包括在衬底上形成金属层图案,金属层图案包括露出衬底的一部分的开口,在其上形成蚀刻停止层 金属层图案,开口的侧壁和衬底的暴露部分,蚀刻停止层形成为具有小于上部厚度阈值的厚度,以及减少至少一部分蚀刻停止层,蚀刻部分的蚀刻 停止层与基底形成电连接。