公开(公告)号：US20190157549A1

公开(公告)日：2019-05-23

申请号：US16190299

申请日：2018-11-14

Applicant: Everspin Technologies, Inc.

Inventor： Jijun SUN

IPC: H01L43/12 ,  H01L27/22 ,  H01L43/02 ,  H01L43/10

Abstract: A method of fabricating a magnetoresistive device includes forming a magnetically fixed region on one side of an intermediate region. Forming the magnetically fixed region may include forming a first ferromagnetic region and forming an antiferromagnetic coupling region on one side of the first ferromagnetic region. The method may also include treating a surface of the coupling region by exposing the surface to a gas, and forming a second ferromagnetic region on the treated surface of the coupling region.

公开(公告)号：US20240341199A1

公开(公告)日：2024-10-10

申请号：US18745140

申请日：2024-06-17

Applicant: Everspin Technologies, Inc.

Inventor： Jijun SUN

IPC: H10N50/01 ,  H01C10/00 ,  H10B61/00 ,  H10N50/85

CPC classification number: H10N50/01 ,  H01C10/00 ,  H10B61/22 ,  H10N50/85

Abstract: A method of fabricating a magnetoresistive device may comprise forming an electrically conductive region and forming a first seed region on one side of the electrically conductive region. A surface of the first seed region may be treated by exposing the surface to a gas. A second seed region may be formed on the treated surface of the first seed region. The method may also comprise forming a magnetically fixed region on one side of the second seed region.

公开(公告)号：US20230309416A1

公开(公告)日：2023-09-28

申请号：US18123729

申请日：2023-03-20

Applicant: Everspin Technologies, Inc.

Inventor： Sumio IKEGAWA ,  Han Kyu Lee ,  Sanjeev AGGARWAL ,  Jijun SUN ,  Syed M. ALAM ,  Tom ANDRE

IPC: H10N52/80 ,  H10B61/00 ,  H10N50/85 ,  H10N52/00 ,  H10N52/01

CPC classification number: H10N52/80 ,  H10B61/22 ,  H10N50/85 ,  H10N52/00 ,  H10N52/01

Abstract: The present disclosure is drawn to, among other things, a magnetoresistive device and a magnetoresistive memory comprising a plurality of such magnetoresistive devices. In some aspects, a magnetoresistive device may include a magnetically fixed region, a magnetically free region above or below the magnetically fixed region, and an intermediate region positioned between the magnetically fixed region and the magnetically free region, wherein the intermediate region includes a first dielectric material. The magnetoresistive device may also include encapsulation layers formed on opposing side walls of the magnetically free region, wherein the encapsulation layers include the first dielectric material.

公开(公告)号：US20210359201A1

公开(公告)日：2021-11-18

申请号：US17285122

申请日：2019-10-29

Applicant: Everspin Technologies, Inc.

Inventor： Jijun SUN ,  Han-Jong CHIA ,  Sarin DESHPANDE ,  Ahmet DEMIRAY

IPC: H01L43/08 ,  H01L27/22 ,  H01L43/10 ,  H01L43/02

Abstract: A magnetoresistive stack includes a fixed magnetic region, one or more dielectric layers disposed on and in contact with the fixed magnetic region, and a free magnetic region disposed above the one or mom dielectric layers. The fixed magnetic region may include a first ferromagnetic region, a coupling layer, a second ferromagnetic region, a transition layer disposed, a reference layer, and at least one interfacial layer disposed above the second ferromagnetic region. Another interfacial layer may be disposed between the one or more dielectric layers and the free magnetic region.

公开(公告)号：US20200043979A1

公开(公告)日：2020-02-06

申请号：US16601848

申请日：2019-10-15

Applicant: Everspin Technologies, Inc.

Inventor： Jijun SUN ,  Sanjeev AGGARWAL ,  Han-Jong CHIA ,  Jon M. SLAUGHTER ,  Renu WHIG

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  G11C11/16 ,  H01L43/12 ,  G11B5/39 ,  H01L43/10

Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/−10%) and less than or equal to 60 Angstroms (+/−10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/−10%) or 30-50 atomic percent (+/−10%).

公开(公告)号：US20190355897A1

公开(公告)日：2019-11-21

申请号：US16411194

申请日：2019-05-14

Applicant: Everspin Technologies, Inc.

Inventor： Jijun SUN

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/10 ,  H01L43/12 ,  H01F10/32 ,  H01F41/30 ,  G11C11/16

Abstract: A magnetoresistive device with a magnetically fixed region having at least two ferromagnetic regions coupled together by an antiferromagnetic coupling region. At least one of the two ferromagnetic regions includes multiple alternating metal layers and magnetic layers and one or more interfacial layers. Wherein, each metal layer includes at least one of platinum, palladium, nickel, or gold, and the interfacial layers include at least one of an oxide, iron, or an alloy including cobalt and iron.

公开(公告)号：US20190326506A1

公开(公告)日：2019-10-24

申请号：US15957333

申请日：2018-04-19

Applicant: Everspin Technologies, Inc.

Inventor： Jijun SUN

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01F10/32 ,  H01F41/32 ,  G11C11/16

Abstract: A magnetoresistive device includes first and second ferromagnetic regions and an intermediate region formed of a dielectric material between the first and second ferromagnetic regions. A surface of the intermediate region at an interface between the intermediate region and at least one of the first and second ferromagnetic regions may be a plasma treated surface.

公开(公告)号：US20190312198A1

公开(公告)日：2019-10-10

申请号：US16376644

申请日：2019-04-05

Applicant: Everspin Technologies, Inc.

Inventor： Jijun SUN

IPC: H01L43/12

Abstract: Spin-orbit-torque (SOT) lines are provided near free regions in magnetoresistive devices that include magnetic tunnel junctions. Current flowing through such SOT lines injects spin current into the free regions such that spin torque is applied to the free regions. The spin torque generated from a SOT switching line can be used to switching the free region or to act as an assist to spin-transfer torque generated by current flowing vertically through the magnetic tunnel junction, in order to improve the reliability, endurance, or both of the magnetoresistive device. Further, one or more additional layers or regions may improve the SOT switching efficiency and the thermal stability of magnetoresistive devices including SOT lines.

公开(公告)号：US20190123098A1

公开(公告)日：2019-04-25

申请号：US16195178

申请日：2018-11-19

Applicant: Everspin Technologies, Inc.

Inventor： Jijun SUN ,  Sanjeev Aggarwal ,  Han-Jong Chia ,  Jon M. Slaughter ,  Renu Whig

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  G11B5/39 ,  G11C11/16

Abstract: A magnetoresistive stack/structure and method of manufacturing same comprising wherein the stack/structure includes a seed region, a fixed magnetic region disposed on and in contact with the seed region, a dielectric layer(s) disposed on the fixed magnetic region and a free magnetic region disposed on the dielectric layer(s). In one embodiment, the seed region comprises an alloy including nickel and chromium having (i) a thickness greater than or equal to 40 Angstroms (+/−10%) and less than or equal to 60 Angstroms (+/−10%), and (ii) a material composition or content of chromium within a range of 25-60 atomic percent (+/−10%) or 30-50 atomic percent (+/−10%).