METHODS OF FORMING A GATE CONTACT STRUCTURE ABOVE AN ACTIVE REGION OF A TRANSISTOR

    公开(公告)号:US20180315822A1

    公开(公告)日:2018-11-01

    申请号:US15581105

    申请日:2017-04-28

    Abstract: One method includes forming a gate above a semiconductor substrate, the gate comprising a gate structure and a gate cap positioned above the gate structure, forming a conductive source/drain metallization structure adjacent the gate in each of the source/drain regions and forming a recess in each of the conductive source/drain metallization structures. The method further includes forming a spacer structure that comprises recess filling portions that substantially fill the recesses and a portion that extends across the gate cap, wherein a portion of the gate cap is exposed within the spacer structure, forming an insulating material within the spacer structure and on the exposed portion of the gate cap, forming a gate contact opening that exposes a portion of an upper surface of the gate structure and forming a conductive gate contact structure (CB) in the conductive gate contact opening.

    Metal layer tip to tip short
    26.
    发明授权
    Metal layer tip to tip short 有权
    金属层尖端尖端短

    公开(公告)号:US09589847B1

    公开(公告)日:2017-03-07

    申请号:US15046916

    申请日:2016-02-18

    Abstract: Techniques relate to forming an integrated circuit. Trench contacts are formed on top of at least one source and drain of an intermediate structure. An interlayer dielectric is formed on top of the intermediate structure. A trench is cut through the interlayer dielectric, through at least one of the trench contacts, down to a shallow trench isolation area. The trench is filled with a filling material. Upper contacts are formed on top of the trench contacts in the interlayer dielectric. A first metal layer pattern is patterned such that a separation is formed by a filling material width of the filling material. First metal layers are formed according to the first metal layer pattern, where tips of the first metal layers are aligned to the filling material that fills the trench, such that the tips of the first metal layers are separated by the filling material width.

    Abstract translation: 技术涉及形成集成电路。 沟槽触点形成在中间结构的至少一个源极和漏极的顶部上。 在中间结构的顶部形成层间电介质。 沟槽穿过层间电介质,通过至少一个沟槽触点切割到浅沟槽隔离区域。 沟槽填充有填充材料。 上部触点形成在层间电介质中的沟槽触点的顶部。 图案化第一金属层图案,使得通过填充材料的填充材料宽度形成分离。 根据第一金属层图案形成第一金属层,其中第一金属层的末端与填充沟槽的填充材料对准,使得第一金属层的末端被填充材料宽度分开。

    GATE CONTACT STRUCTURE FOR A TRANSISTOR
    30.
    发明申请

    公开(公告)号:US20190378900A1

    公开(公告)日:2019-12-12

    申请号:US16548335

    申请日:2019-08-22

    Abstract: One device disclosed herein includes a gate above a semiconductor substrate, the gate comprising a gate structure and a gate cap, and conductive source/drain metallization structures adjacent the gate, each of the conductive source/drain metallization structures having a front face and a recess defined in each of the conductive source/drain metallization structures. In this example, the device further includes a spacer structure comprising recess filling portions that substantially fill the recesses and a portion that extends across a portion of the upper surface of the gate cap, wherein a portion of the gate cap is exposed within the spacer structure, an insulating material within the spacer structure and on the exposed portion of the gate cap, a gate contact opening that exposes a portion of an upper surface of the gate structure, and a conductive gate contact structure in the conductive gate contact opening.

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