Abstract:
An integrated structure is made in a chip of semiconductor material inside an insulated N type region extending from a surface of the chip. The structure comprises a Zener diode formed by a P type first region extending from the surface inside the insulated region and by a second region of type N extending from the surface inside the first region. These regions form between themselves a buried junction, in which the structure further includes a lateral bipolar transistor having an emitter region provided by the first region.
Abstract:
A circuit arrangement includes a first light emitting diode and a second light emitting diode emitting light of different colors arranged adjacent to each other for additive color mixing. A first and second controllable current sources are connected to the first and second light emitting diode, respectively, such that the load currents of the light emitting diodes depend on respective control signals received by the current sources. First and second sigma-delta modulators are connected to the first and second light emitting diodes, respectively, and provide bit-streams as control signals to the current sources. The mean value of each bit-stream corresponds to the value of an input signal of the respective sigma-delta modulator.
Abstract:
A power switch circuit for driving an airbag squib module has a power transistor, a pre-charge capacitance for storing a charge, a charging circuit and a controllable energy-coupling element. The power transistor has a first electrode, a second electrode and a control electrode. A path between the first electrode and the second electrode is connected in series with the airbag squib module between a supply potential and a reference potential. The charging circuit charges the pre-charge capacitance and the charging circuit is therefore coupled with the pre-charged capacitance. The controllable energy coupling element is connected between a first electrode of the pre-charge capacitance and the control electrode of the power transistor. The power switch exhibits a high degree of stability, allows a fast switching of the power transistor and further has an advantageous transient response.
Abstract:
A power switch circuit for driving an airbag squib module has a power transistor, a pre-charge capacitance for storing a charge, a charging circuit and a controllable energy-coupling element. The power transistor has a first electrode, a second electrode and a control electrode. A path between the first electrode and the second electrode is connected in series with the airbag squib module between a supply potential and a reference potential. The charging circuit charges the pre-charge capacitance and the charging circuit is therefore coupled with the pre-charged capacitance. The controllable energy coupling element is connected between a first electrode of the pre-charge capacitance and the control electrode of the power transistor. The power switch exhibits a high degree of stability, allows a fast switching of the power transistor and further has an advantageous transient response.
Abstract:
An actuation circuit for a switch element regulating the power consumption of an inductive energy storage element in a switching converter, used to convert an input voltage into an output voltage, is described. The circuit includes a pulse width modulator circuit configured so as to provide a pulse-width-modulated actuating signal for the switch element depending on a regulating signal dependent on the output voltage and a current measurement signal dependent on a current across the inductive storage element. The circuit further includes an arrangement that provides the current measurement signal, wherein the arrangement for providing the current measurement signal is a measuring and regulating arrangement, configured so as to simulate the current measurement signal from a signal dependent on the output voltage, a signal dependent on the difference between the input voltage and the output voltage, and at least a first sampled value of a signal proportional to the current across the inductive storage element during a period of the pulse-width-modulated actuating signal.
Abstract:
A device for detecting load impedance having an analog circuit portion for detecting the impedance value of a load, and a digital circuit portion adapted to provide load impedance type information. The analog circuit portion having two power MOS transistors connected in series to each other and between a supply voltage and the ground, and a pair of mirror MOS transistors common-connected with their respective gate terminals to the gate terminals of the power MOS transistors. The digital circuit portion includes a first comparitor to determine whether the output current of an audio amplifier is higher or lower than a threshold value and a second comparator to determine whether the output voltage of the amplifier is higher than a threshold voltage, a memory to store output signals of the first and second comparitors, and a logic circuit arranged in cascade with the memory to output a load-type indication signal. The device further includes a third comparitor that enables outputting of the load-type indication signal when the output voltage of the audio amplifier crosses a zero threshold to thereby eliminate unwanted noise.
Abstract:
The n-channel VDMOS transistor is formed in an n-type active region of an integrated circuit with junction isolation. To prevent over-voltages between source and gate which could damage or destroy the gate dielectric, a p-channel MOS transistor is formed in the same active region and has its gate electrode connected to the gate electrode of the VDMOS transistor, its source region in common with the source region of the VDMOS transistor, and its drain region connected to the p-type junction-isolation region. The p-channel MOS transistor has a threshold voltage below the breakdown voltage of the gate dielectric of the VDMOS transistor so that it acts as a voltage limiter.
Abstract:
A power stage for an operational amplifier includes an output stage, a current source stage, and a gain stage. The output stage is formed by first and second NPN output transistors arranged in a Totem-Pole configuration, each having respective resistors connected between their respective base and emitter terminals. The output transistors are biased in class AB by a quiescent current supplied by the current source stage and are controlled dynamically by the gain stage. The gain stage includes an NPN gain transistor having a collector terminal connected to the base terminal of the first output transistor and an emitter terminal connected to the base terminal of the second output transistor.
Abstract:
An AB class stage is described which comprises two complementary MOSFET final transistors connected in a push-pull manner between two supply terminals. In order to attain high linearity, low switching distortion, a high ratio between the maximum output current and the rest current, independence of the rest current from the temperature and manufacturing variables and a circuit simplicity, the circuits determining the rest current and those which provide current to the load are substantially independent of one another. More particularly, two transconductance amplifiers are provided which control the final transistors and are dimensioned so as to have zero output current in rest conditions, two voltage generators which determine the rest current and two resistors being connected between the gate electrodes of the final transistors and the supply terminals.
Abstract:
A circuit for dividing a reference current is composed of a number n of transistors connected in cascade, in a Darlington configuration, between current generator and a fractionary current output node and by N+k (where k is an integer different from zero) directly biased diodes in series, connected between the generator and the fractionary current output node. The circuit does not employ current mirrors, so all transistors may have the minimum size, which also minimizes the effects of leakage currents. Additionally, compensation elements may be used for compensating the leakage currents from the base regions of the transistors. The circuit is useful as a capacitance multiplier, or as a slow ramp generator in a large number of design situations. Independence from intrinsic parameters of the transistors used and/or from temperature of operation may be provided by employing a specifically designed reference current generator. Several embodiments are described.