公开(公告)号：US20230096328A1

公开(公告)日：2023-03-30

申请号：US17546200

申请日：2021-12-09

Applicant: GlobalFoundries U.S. Inc.

Inventor： Shesh Mani Pandey ,  Hong Yu ,  Alexander Derrickson

IPC: H01L29/417 ,  H01L29/10 ,  H01L29/165 ,  H01L29/737 ,  H01L29/40 ,  H01L29/66

Abstract: Structures for a bipolar junction transistor and methods of fabricating a structure for a bipolar junction transistor. The structure includes a first base layer, a second base layer, a first terminal positioned between the first base layer and the second base layer, a second terminal, and a third terminal. The first base layer, the second base layer, and the first terminal are positioned between the second terminal and the third terminal. For example, the first terminal may be positioned in a vertical direction between the first and second base layers.

公开(公告)号：US20230066996A1

公开(公告)日：2023-03-02

申请号：US17541603

申请日：2021-12-03

Applicant: GlobalFoundries U.S. Inc.

Inventor： Arkadiusz Malinowski ,  Alexander Derrickson

IPC: H01L29/735 ,  H01L29/24 ,  H01L21/02 ,  H01L29/66

Abstract: Structures for a bipolar junction transistor and methods of fabricating a structure for a bipolar junction transistor. The structure includes an emitter and a collector comprised of a first two-dimensional material having a first conductivity type, and an intrinsic base comprised of a second two-dimensional material having a second conductivity type different than the first conductivity type. The intrinsic base is laterally positioned between the emitter and the collector.

公开(公告)号：US12211929B1

公开(公告)日：2025-01-28

申请号：US18663523

申请日：2024-05-14

Applicant: GlobalFoundries U.S. Inc.

Inventor： Alexander Derrickson ,  Anupam Dutta ,  John Pekarik ,  Vibhor Jain ,  V V S S Satyasuresh Choppalli ,  Rui Tze Toh ,  Oscar Restrepo

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/10 ,  H01L29/165 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises an intrinsic base including a first semiconductor layer, a collector including a second semiconductor layer, and an emitter including a third semiconductor layer. The first semiconductor layer, which comprises silicon-germanium, includes a first portion and a second portion adjacent to the first portion. The second semiconductor layer includes a portion on the first portion of the first semiconductor layer, and the third semiconductor layer includes a portion on the second portion of the first semiconductor layer. The structure further comprises a dielectric spacer laterally between the portion of the second semiconductor layer and the portion of the third semiconductor layer.

公开(公告)号：US20240170560A1

公开(公告)日：2024-05-23

申请号：US17990898

申请日：2022-11-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： Alexander Derrickson ,  Venkatesh Gopinath ,  John J. Pekarik ,  Hong Yu ,  Vibhor Jain ,  David Pritchard

IPC: H01L29/735 ,  H01L27/06 ,  H01L29/66 ,  H01L29/732

CPC classification number: H01L29/735 ,  H01L27/0623 ,  H01L29/66871 ,  H01L29/732

Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a semiconductor layer, a substrate, and a dielectric layer disposed between the semiconductor layer and the substrate. The structure further comprises a first bipolar junction transistor including a first collector in the substrate, a first emitter, and a first base layer. The first base layer extends through the dielectric layer from the first emitter to the first collector. The structure further comprises a second bipolar junction transistor including a second collector in the substrate, a second emitter, and a second base layer. The second base layer extends through the dielectric layer from the second emitter to the second collector. The second base layer is connected to the first base layer by a section of the semiconductor layer to define a base line.

公开(公告)号：US20230275145A1

公开(公告)日：2023-08-31

申请号：US17739092

申请日：2022-05-07

Applicant: GlobalFoundries U.S. Inc.

Inventor： Arkadiusz Malinowski ,  Alexander Derrickson ,  Judson Holt

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/165 ,  H01L21/265 ,  H01L21/324

CPC classification number: H01L29/735 ,  H01L29/6625 ,  H01L29/165 ,  H01L21/26586 ,  H01L21/324

Abstract: Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure includes a first terminal having a first raised semiconductor layer on a semiconductor substrate, a second terminal having a second raised semiconductor layer on the semiconductor substrate, and an intrinsic base on the semiconductor substrate. The intrinsic base is positioned in a lateral direction between the first raised semiconductor layer of the first terminal and the second raised semiconductor layer of the second terminal. The intrinsic base includes a portion containing silicon-germanium with a germanium concentration that is graded in the lateral direction.

公开(公告)号：US11652142B2

公开(公告)日：2023-05-16

申请号：US17482374

申请日：2021-09-22

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Mankyu Yang ,  Richard Taylor, III ,  Alexander Derrickson ,  Alexander Martin ,  Jagar Singh ,  Judson Robert Holt ,  Haiting Wang

IPC: H01L29/08 ,  H01L29/66 ,  H01L29/735 ,  H01L29/10

CPC classification number: H01L29/0804 ,  H01L29/0808 ,  H01L29/0821 ,  H01L29/1008 ,  H01L29/6625 ,  H01L29/735

Abstract: A structure for a lateral bipolar junction transistor is provided. The structure comprising an emitter including a first concentration of a first dopant. A collector including a second concentration of the first dopant, the first concentration of the first dopant may be different from the second concentration of the first dopant. An intrinsic base may be laterally arranged between the emitter and the collector, and an extrinsic base region may be above the intrinsic base. An emitter extension may be arranged adjacent to the emitter, whereby the emitter extension laterally extends under a portion of the extrinsic base region. A halo region may be arranged adjacent to the emitter extension, whereby the halo region laterally extends under another portion of the extrinsic base region.

公开(公告)号：US20230069207A1

公开(公告)日：2023-03-02

申请号：US17524043

申请日：2021-11-11

Applicant: GlobalFoundries U.S. Inc.

Inventor： Alexander Derrickson ,  Judson R. Holt ,  Haiting Wang ,  Jagar Singh ,  Vibhor Jain

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/66 ,  H01L29/735 ,  H01L29/737

Abstract: Structures for a bipolar junction transistor and methods of forming a structure for a bipolar junction transistor. The structure includes an emitter having a raised portion, a collector having a raised portion, and a base having a base layer and an extrinsic base layer stacked with the base layer. The base layer and the extrinsic base layer are positioned in a lateral direction between the raised portion of the emitter and the raised portion of the collector, the base layer has a first width in the lateral direction, the extrinsic base layer has a second width in the lateral direction, and the second width is greater than the first width.

公开(公告)号：US20230067486A1

公开(公告)日：2023-03-02

申请号：US17525256

申请日：2021-11-12

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander Derrickson ,  Vibhor Jain ,  Judson R. Holt ,  Jagar Singh ,  Mankyu Yang

IPC: H01L29/08 ,  H01L29/735 ,  H01L29/737 ,  H01L29/06 ,  H01L29/10 ,  H01L29/417

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor with gated collector and methods of manufacture. The structure includes: an extrinsic base region vertically over a semiconductor substrate and comprising asymmetrical sidewall spacers on opposing sidewalls of the extrinsic base region; a collector region on the semiconductor substrate and separated from the extrinsic base region by at least a first spacer of the asymmetrical sidewall spacers; and an emitter region on the semiconductor substrate and separated from the extrinsic base region by a second spacer of the asymmetrical sidewall spacers.

公开(公告)号：US20230057695A1

公开(公告)日：2023-02-23

申请号：US17509327

申请日：2021-10-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Alvin J. Joseph ,  Alexander Derrickson ,  Judson R. Holt ,  John J. Pekarik

IPC: H01L29/08 ,  H01L29/735 ,  H01L29/417 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to lateral bipolar transistors and methods of manufacture. The structure includes: an extrinsic base comprising semiconductor material; an intrinsic base comprising semiconductor material which is located below the extrinsic base; a polysilicon emitter on a first side of the extrinsic base; a raised collector on a second side of the extrinsic base; and sidewall spacers on the extrinsic base which separate the extrinsic base from the polysilicon emitter and the raised collector.

公开(公告)号：US20210226044A1

公开(公告)日：2021-07-22

申请号：US16745833

申请日：2020-01-17

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander Derrickson ,  Edmund K. Banghart ,  Alexander Martin ,  Ryan Sporer ,  Jagar Singh ,  Katherina Babich ,  George R. Mulfinger

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/10 ,  H01L29/165 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324

Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. A first portion of a first semiconductor layer defines an emitter, a first portion of a second semiconductor layer defines a collector, and a base includes respective second portions of the first and second semiconductor layers that are laterally positioned between the first portion of the first semiconductor layer and the first portion of the second semiconductor layer. The first portion of the first semiconductor layer has a first thickness, and the first portion of the second semiconductor layer has a second thickness that is greater than the first thickness. The first portion and the second portion of the first semiconductor layer adjoin at a first junction having the first thickness. The first portion and the second portion of the second semiconductor layer adjoin at a second junction having the second thickness.