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    Transistors with separately-formed source and drain
    21.
    发明授权
    Transistors with separately-formed source and drain 有权

    公开(公告)号：US11563085B2

    公开(公告)日：2023-01-24

    申请号：US17243832

    申请日：2021-04-29

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Jiehui Shu ,  Baofu Zhu ,  Haiting Wang ,  Sipeng Gu

    IPC: H01L29/08 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/78

    Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A gate structure is arranged over a channel region of a semiconductor body. A first source/drain region is coupled to a first portion of the semiconductor body, and a second source/drain region is located in a second portion the semiconductor body. The first source/drain region includes an epitaxial semiconductor layer containing a first concentration of a dopant. The second source/drain region contains a second concentration of the dopant. The channel region is positioned in the semiconductor body between the first source/drain region and the second source/drain region.

    Single diffusion breaks including stacked dielectric layers
    22.
    发明授权
    Single diffusion breaks including stacked dielectric layers 有权

    公开(公告)号：US11545574B2

    公开(公告)日：2023-01-03

    申请号：US16994915

    申请日：2020-08-17

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Haiting Wang ,  Rinus Lee ,  Sipeng Gu ,  Yue Hu

    IPC: H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

    Abstract: Structures for a single diffusion break and methods of forming a structure for a single diffusion break. A cut is formed in a semiconductor fin. A single diffusion break includes a first dielectric layer in the cut and a second dielectric layer over the first dielectric layer. The first dielectric layer is comprised of a first material, and the second dielectric layer is comprised of a second material having a different composition than the first material. The second dielectric layer includes a first portion over the first dielectric layer and a second portion over the first portion. The first portion of the second dielectric layer has a first horizontal dimension, and the second portion of the second dielectric layer has a second horizontal dimension that is greater than the first horizontal dimension.

    Methods of forming a replacement gate structure for a transistor device
    23.
    发明授权
    Methods of forming a replacement gate structure for a transistor device 有权

    公开(公告)号：US11437490B2

    公开(公告)日：2022-09-06

    申请号：US16843262

    申请日：2020-04-08

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Sipeng Gu ,  Haiting Wang

    IPC: H01L29/66 ,  H01L21/311 ,  H01L29/51 ,  H01L21/02 ,  H01L29/34

    Abstract: One illustrative IC product disclosed herein includes a transistor device formed on a semiconductor substrate, the transistor device comprising a gate structure comprising an upper surface, a polish-stop sidewall spacer positioned adjacent the gate structure, wherein, at a location above an upper surface of the semiconductor substrate, when viewed in a cross-section taken through the first polish-stop sidewall spacer in a direction corresponding to a gate length direction of the transistor, an upper surface of the gate structure is substantially coplanar with an upper surface of the polish-stop sidewall spacer.

    SEMICONDUCTOR DEVICES HAVING LATE-FORMED ISOLATION STRUCTURES
    24.
    发明申请
    SEMICONDUCTOR DEVICES HAVING LATE-FORMED ISOLATION STRUCTURES 有权

    公开(公告)号：US20210391323A1

    公开(公告)日：2021-12-16

    申请号：US16901417

    申请日：2020-06-15

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yanping Shen ,  Haiting Wang ,  Sipeng Gu

    IPC: H01L27/088 ,  H01L21/8234

    Abstract: Structures for a semiconductor device that include dielectric isolation and methods of forming a structure for a semiconductor device that includes dielectric isolation. A semiconductor body includes a cavity, first and second gate structures extending over the semiconductor body, and a semiconductor layer including first and second sections on the semiconductor body. The first section of the semiconductor layer is laterally positioned between the cavity and the first gate structure, and the second section on the semiconductor layer is laterally positioned between the cavity and the second gate structure. An isolation structure is laterally positioned between the first and second sections of the semiconductor layer. The isolation structure includes a dielectric layer and a sidewall spacer having first and second sections. The dielectric layer includes a first portion in the cavity and a second portion between the first and second sections of the sidewall spacer.

    Gate capping layers of semiconductor devices
    25.
    发明授权
    Gate capping layers of semiconductor devices 有权

    公开(公告)号：US11164954B2

    公开(公告)日：2021-11-02

    申请号：US16435563

    申请日：2019-06-10

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Sipeng Gu ,  Zhiguo Sun ,  Guoliang Zhu ,  Xinyuan Dou

    IPC: H01L29/51 ,  H01L21/02 ,  H01L29/78 ,  H01L29/66

    Abstract: A semiconductor device is provided, which includes providing an active region, a source region, a drain region, a dielectric layer, a gate structure and a nitrogen-infused dielectric layer. The source region and the drain region are formed in the active region. The dielectric layer is disposed over the source region and the drain region. The gate structure formed in the dielectric layer is positioned between the source region and the drain region. The nitrogen-infused dielectric layer is disposed over the dielectric layer and over the gate structure.

    Multi-level isolation structure
    26.
    发明授权
    Multi-level isolation structure 有权

    公开(公告)号：US11158633B1

    公开(公告)日：2021-10-26

    申请号：US16842075

    申请日：2020-04-07

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Haiting Wang ,  Sipeng Gu ,  Shesh Mani Pandey ,  Lixia Lei ,  Gregory Costrini

    IPC: H01L27/088 ,  H01L29/06 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/78

    Abstract: One illustrative device disclosed herein includes at least one fin structure and an isolation structure comprising a stepped upper surface comprising a first region and a second region. The first region has a first upper surface and the second region has a second upper surface, wherein the first upper surface is positioned at a first level and the second upper surface is positioned at a second level and wherein the first level is below the second level. In this illustrative example, the device also includes a gate structure comprising a first portion and a second portion, wherein the first portion of the gate structure is positioned above the first upper surface of the isolation structure and above the at least one fin structure and wherein the second portion of the gate structure is positioned above the second upper surface of the isolation structure.

    Transistors with a sectioned epitaxial semiconductor layer
    28.
    发明授权
    Transistors with a sectioned epitaxial semiconductor layer 有权

    公开(公告)号：US11133417B1

    公开(公告)日：2021-09-28

    申请号：US16819832

    申请日：2020-03-16

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Sipeng Gu ,  Judson Holt ,  Halting Wang

    IPC: H01L29/00 ,  H01L29/78 ,  H01L29/08 ,  H01L21/02 ,  H01L29/10 ,  H01L29/51

    Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. First and second gate structures extend over the semiconductor body, a second gate structure that extends over the semiconductor body. A source/drain region is positioned laterally between the first gate structure and the second gate structure. The source/drain region includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer has a first section and a second section. The second semiconductor layer is positioned laterally between the first section of the first semiconductor layer and the second section of the first semiconductor layer.

    IC PRODUCTS FORMED ON A SUBSTRATE HAVING LOCALIZED REGIONS OF HIGH RESISTIVITY AND METHODS OF MAKING SUCH IC PRODUCTS
    29.
    发明申请
    IC PRODUCTS FORMED ON A SUBSTRATE HAVING LOCALIZED REGIONS OF HIGH RESISTIVITY AND METHODS OF MAKING SUCH IC PRODUCTS 有权

    公开(公告)号：US20210233934A1

    公开(公告)日：2021-07-29

    申请号：US16774087

    申请日：2020-01-28

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Sipeng Gu ,  Jiehui Shu ,  Haiting Wang

    IPC: H01L27/12 ,  H01L21/762 ,  H01L21/84

    Abstract: One illustrative IC product disclosed herein includes an (SOI) substrate comprising a base semiconductor layer, a buried insulation layer and an active semiconductor layer positioned above the buried insulation layer. In this particular example, the IC product also includes a first region of localized high resistivity formed in the base semiconductor layer, wherein the first region of localized high resistivity has an electrical resistivity that is greater than an electrical resistivity of the material of the base semiconductor layer. The IC product also includes a first region comprising integrated circuits formed above the active semiconductor layer, wherein the first region comprising integrated circuits is positioned vertically above the first region of localized high resistivity in the base semiconductor layer.

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