Disk array apparatus
    21.
    发明授权
    Disk array apparatus 有权
    磁盘阵列设备

    公开(公告)号:US07724515B2

    公开(公告)日:2010-05-25

    申请号:US12010291

    申请日:2008-01-23

    IPC分类号: G06F1/20 H05K7/20 F01N13/00

    摘要: In a disk array apparatus, by taking note of a first sound of a specific frequency which is a noise element of original sounds generated from a fan, a second sound whose phase is inverted to that of the first sound is generated by a structure of a cooling air flow path passing through the fan, and the second sound is synthesized with the first sound on the cooling air flow path, thereby reducing the noise. For example, an exhaust duct is located on a fan unit in an upper part of the apparatus, two flow paths extending to an exhaust port are formed in an internal structure of the exhaust duct, and the two flow paths are designed so that the difference in the flow path length therebetween becomes equivalent to half wavelength of the specific frequency.

    摘要翻译: 在磁盘阵列装置中,通过记录作为从风扇产生的原始声音的噪声要素的特定频率的第一声音,其相位与第一声音的相反相反的第二声音由 通过风扇的冷却空气流动路径,并且第二声音在冷却空气流动路径上与第一声音合成,从而降低噪音。 例如,排气管位于设备上部的风扇单元上,延伸到排气口的两个流路形成在排气管的内部结构中,并且两个流路被设计成使得差异 在其流动路径中,其长度变得等于特定频率的一半波长。

    METHOD AND STRUCTURE FOR JOINING MEMBERS
    22.
    发明申请
    METHOD AND STRUCTURE FOR JOINING MEMBERS 审中-公开
    加入会员的方法与结构

    公开(公告)号:US20100001043A1

    公开(公告)日:2010-01-07

    申请号:US12447919

    申请日:2007-11-09

    申请人: Hiroshi Fukuda

    发明人: Hiroshi Fukuda

    IPC分类号: B23K20/12

    摘要: A method and a structure for joining members are provided which are suited for reinforcement of a shape.An auxiliary member 7 is inserted into respective holes 9a and 9b of first and second portions 8a and 8b of a main member 6 such that tip and base ends of the auxiliary member 7 are in the holes 9b and 9a of the second and first portions 8b and 8a, respectively. A joining tool 5 is pushed, while rotated, on the tip end of the auxiliary member 7 to soften the portion of the auxiliary member and the second portion 8b of the main member 6 due to frictional heat and plastic flow. Then, the joining tool 5 is released from the main member 6 to allow the second portion 8b and the plastic flow portion of the auxiliary member 7 to solidify. Further, the joining tool 5 is pushed, while rotated, on the base end of the auxiliary member 7 to soften the portion of the auxiliary member and the first portion 8a of the main member 6 due to frictional heat and plastic flow. Then, the joining tool 5 is released from the main member 6 to allow the first portion 8a and the plastic flow portion of the auxiliary member 7 to solidfy.

    摘要翻译: 提供一种用于连接构件的方法和结构,其适于加强形状。 辅助构件7插入到主构件6的第一和第二部分8a和8b的相应孔9a和9b中,使得辅助构件7的尖端和底端位于第二和第一部分8b的孔9b和9a中 和8a。 接合工具5在辅助构件7的顶端旋转的同时被推动,以使由于摩擦热和塑性流动的辅助构件和主构件6的第二部分8b的部分软化。 然后,接合工具5从主构件6释放,使辅助构件7的第二部分8b和塑料流动部分固化。 此外,接合工具5在辅助构件7的基端被旋转的同时被推动,以使由于摩擦热和塑性流动引起的辅助构件和主构件6的第一部分8a的部分软化。 然后,将接合工具5从主构件6释放,使辅助构件7的第一部分8a和塑料流动部分固定。

    ULTRASONOGRAPHIC DEVICE
    24.
    发明申请
    ULTRASONOGRAPHIC DEVICE 有权
    超声波设备

    公开(公告)号:US20090301199A1

    公开(公告)日:2009-12-10

    申请号:US11996532

    申请日:2006-01-30

    IPC分类号: G01N29/34 H02N1/08

    摘要: The receive sensitivity of an ultrasound array transducer structured with a diaphragm electro-acoustic transducer (101) being a basic unit is affected by change in a charge amount with elapsed time due to leakage or the like, which causes drift of the primary beam sensitivity, degradation in the acoustic SN ratio due to a rise in the acoustic noise level, and degradation in the directivity of an ultrasound beam. To addressing this problem, a charge controller (charge monitor 211) is provided to control charge in an electro-acoustic transducer (101). A charge monitoring section (102) monitors the change in the charge amount. When change in the charge amount is small, transmit sensitivity or receive sensitivity is calibrated by a controller (104) by, for example, multiplying a receive signal by a calibration coefficient corresponding to the change amount. Further, when the change in the charge amount is large, for example, charges can be re-emitted from a charge emitter (103). The series of operations is controlled by the controller (104), and thus sensitivity variation caused by difference in the changes with elapsed time, particularly between the plural transducers, is calibrated.

    摘要翻译: 由作为基本单元的隔膜电声换能器(101)构成的超声波阵列换能器的接收灵敏度受到由于泄漏等引起的经过时间的电荷量的变化的影响,导致主光束灵敏度的漂移, 由于声学噪声水平的上升引起的声学SN比的降低,以及超声波束的方向性的劣化。 为了解决这个问题,提供一种充电控制器(充电监视器211)来控制电声换能器(101)中的电荷。 充电监视部(102)监视充电量的变化。 当充电量的变化小时,通过例如将接收信号乘以对应于变化量的校准系数,由控制器(104)校准发射灵敏度或接收灵敏度。 此外,当电荷量的变化大时,例如,电荷可以从电荷发射体(103)重新发射。 一系列操作由控制器(104)控制,因此校正了由于经过时间的变化,特别是多个换能器之间的差异引起的灵敏度变化。

    Method for manufacturing semiconductor device, method for forming alignment mark, and semiconductor device
    25.
    发明授权
    Method for manufacturing semiconductor device, method for forming alignment mark, and semiconductor device 有权
    用于制造半导体器件的方法,用于形成对准标记的方法和半导体器件

    公开(公告)号:US07601605B2

    公开(公告)日:2009-10-13

    申请号:US11689108

    申请日:2007-03-21

    申请人: Hiroshi Fukuda

    发明人: Hiroshi Fukuda

    IPC分类号: H01L21/76

    摘要: A method for manufacturing a semiconductor device includes the steps of: forming a first dielectric film on a substrate; etching the first dielectric film in a plug forming region to form a first via hole; forming a first plug electrode in the first via hole; forming a conductive film on the first dielectric film where the first plug electrode is formed; selectively etching the conductive film to form a local wiring on the first plug electrode and to form a pad layer on the first dielectric film in a specified region; forming a second dielectric film on the first dielectric film, thereby covering the local wiring and the pad layer; selectively etching the second dielectric film, thereby forming a second via hole in the second dielectric film with the local wiring as a bottom surface, and an opening section in the second dielectric film with the pad layer as a bottom surface; forming a metal film on the second dielectric film, thereby embedding the second via hole and the opening section; and applying a CMP processing to the metal film to remove the metal film on the second dielectric film, thereby forming a second plug electrode in the second via hole and forming an alignment mark on the pad layer.

    摘要翻译: 一种制造半导体器件的方法包括以下步骤:在衬底上形成第一电介质膜; 在插塞形成区域中蚀刻第一电介质膜以形成第一通孔; 在所述第一通孔中形成第一插头电极; 在形成有第一插塞电极的第一绝缘膜上形成导电膜; 选择性地蚀刻所述导电膜以在所述第一插塞电极上形成局部布线并且在特定区域中在所述第一电介质膜上形成焊盘层; 在所述第一电介质膜上形成第二电介质膜,从而覆盖所述局部布线和所述焊盘层; 选择性地蚀刻第二电介质膜,从而在第二电介质膜中形成第二通孔,其中局部布线为底面;以及第二介电膜中的开口部分,其中焊盘层为底面; 在所述第二电介质膜上形成金属膜,从而嵌入所述第二通孔和所述开口部; 以及对所述金属膜施加CMP处理以除去所述第二电介质膜上的金属膜,从而在所述第二通孔中形成第二插塞电极,并在所述焊盘层上形成对准标记。

    Video signal processing apparatus and method
    27.
    发明授权
    Video signal processing apparatus and method 失效
    视频信号处理装置及方法

    公开(公告)号:US07493022B2

    公开(公告)日:2009-02-17

    申请号:US11204044

    申请日:2005-08-16

    申请人: Hiroshi Fukuda

    发明人: Hiroshi Fukuda

    IPC分类号: H04N5/91

    摘要: In a first mode, a video signal processing apparatus records a video signal subjected to a first image processing by a first image processing unit on a first recording medium through the first recording unit. In a second mode, the video signal processing apparatus records a video signal subjected to a second image processing by a second image processing unit on a second recording medium through the second recording unit. In a case where a residual quantity of the second recording medium is smaller than a set value, the video signal processing apparatus records the video signal subjected to the second image processing by the second image processing unit on the first recording medium through the first recording unit.

    摘要翻译: 在第一模式中,视频信号处理设备通过第一记录单元将第一图像处理单元经受第一图像处理的视频信号记录在第一记录介质上。 在第二模式中,视频信号处理设备通过第二记录单元将第二图像处理单元经过第二图像处理的视频信号记录在第二记录介质上。 在第二记录介质的剩余量小于设定值的情况下,视频信号处理装置通过第一记录单元将第二图像处理单元经过第二图像处理的视频信号记录在第一记录介质上 。

    DISK ARRAY SYSTEM AND ELECTRONIC APPARATUS
    28.
    发明申请
    DISK ARRAY SYSTEM AND ELECTRONIC APPARATUS 审中-公开
    磁盘阵列系统和电子设备

    公开(公告)号:US20080186679A1

    公开(公告)日:2008-08-07

    申请号:US11836922

    申请日:2007-08-10

    IPC分类号: H05K7/20

    摘要: The object of the invention is to provide a disk array system and electronic apparatus capable of both excellent cooling of heat generating members and reduction of noise from the apparatus. A disk array system accommodates a plurality of disk drives 2 and has a controller 6 for controlling the disk drives 2. A refrigeration cycle system is formed with a compressor 10, a radiator 12, an expansion valve 9 and a cold plate 7. The controller 6 is cooled by the refrigeration cycle system. Two-phase refrigerant coming out from the expansion valve 9 collides with a heat receiving surface of the cold plate 7.

    摘要翻译: 本发明的目的是提供一种盘阵列系统和电子设备,其能够对发热元件进行极好的冷却和减少来自该装置的噪声。 磁盘阵列系统容纳多个磁盘驱动器2,并具有用于控制磁盘驱动器2的控制器6。 制冷循环系统由压缩机10,散热器12,膨胀阀9和冷板7形成。 控制器6由制冷循环系统冷却。 从膨胀阀9排出的两相制冷剂与冷板7的受热面碰撞。

    Integrated micro electro-mechanical system and manufacturing method thereof
    29.
    发明授权
    Integrated micro electro-mechanical system and manufacturing method thereof 有权
    集成微机电系统及其制造方法

    公开(公告)号:US07402449B2

    公开(公告)日:2008-07-22

    申请号:US11208740

    申请日:2005-08-23

    IPC分类号: H01L21/00

    摘要: In the manufacturing technology of an integrated MEMS in which a semiconductor integrated circuit (CMOS or the like) and a micro machine are monolithically integrated on a semiconductor substrate, a technology capable of manufacturing the integrated MEMS without using a special process different from the normal manufacturing technology of a semiconductor integrated circuit is provided. A MEMS structure is formed together with an integrated circuit by using the CMOS integrated circuit process. For example, when forming an acceleration sensor, a structure composed of a movable mass, an elastic beam and a fixed beam is formed by using the CMOS interconnect technology. Thereafter, an interlayer dielectric and the like are etched by using the CMOS process to form a cavity. Then, fine holes used in the etching are sealed with a dielectric.

    摘要翻译: 在半导体集成电路(CMOS等)和微机器单片集成在半导体基板上的集成MEMS的制造技术中,能够制造集成MEMS而不使用与正常制造不同的特殊工艺的技术 提供了半导体集成电路的技术。 通过使用CMOS集成电路工艺与集成电路一起形成MEMS结构。 例如,当形成加速度传感器时,通过使用CMOS互连技术形成由可移动质量块,弹性梁和固定梁构成的结构。 此后,通过使用CMOS工艺蚀刻层间电介质等以形成空腔。 然后,用电介质密封蚀刻中使用的细孔。