公开(公告)号：US5734655A

公开(公告)日：1998-03-31

申请号：US435961

申请日：1995-05-05

申请人： Yoshito Sakurai ,  Shinobu Gohara ,  Kenichi Ohtsuki ,  Takao Kato ,  Hiroshi Kuwahara ,  Eiichi Amada

发明人： Yoshito Sakurai ,  Shinobu Gohara ,  Kenichi Ohtsuki ,  Takao Kato ,  Hiroshi Kuwahara ,  Eiichi Amada

IPC分类号： H04L12/54 ,  H04L12/64 ,  H04L12/70 ,  H04L12/931 ,  H04L12/933 ,  H04L12/935 ,  H04L12/937 ,  H04L12/947 ,  H04Q11/04 ,  H04Q11/06

CPC分类号： H04L49/30 ,  H04L12/56 ,  H04L12/5601 ,  H04L12/6402 ,  H04L49/101 ,  H04L49/106 ,  H04L49/15 ,  H04L49/1553 ,  H04L49/1584 ,  H04L49/255 ,  H04L49/256 ,  H04L49/3081 ,  H04L49/309 ,  H04L49/35 ,  H04Q11/0407 ,  H04Q11/0421 ,  H04Q11/06 ,  H04J2203/0012 ,  H04L2012/5651 ,  H04L2012/5652 ,  H04L2012/5681 ,  H04L2012/6481 ,  H04L49/205 ,  H04L49/25 ,  H04L49/254 ,  H04L49/3009 ,  H04L49/3018

摘要： A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetrmined period and time slots contained in each frame to carry blocks.

公开(公告)号：US4910731A

公开(公告)日：1990-03-20

申请号：US218217

申请日：1988-07-13

申请人： Yoshito Sakurai ,  Kenichi Ohtsuki ,  Shinobu Gohara ,  Makoto Mori ,  Akira Horiki ,  Takao Kato ,  Hiroshi Kuwahara

发明人： Yoshito Sakurai ,  Kenichi Ohtsuki ,  Shinobu Gohara ,  Makoto Mori ,  Akira Horiki ,  Takao Kato ,  Hiroshi Kuwahara

IPC分类号： H04L12/54 ,  H04L12/70 ,  H04L12/933 ,  H04L12/947 ,  H04Q11/04

CPC分类号： H04L12/5601 ,  H04L12/5602 ,  H04L49/108 ,  H04L49/1569 ,  H04L49/256 ,  H04Q11/0478 ,  H04L2012/565 ,  H04L2012/5652 ,  H04L2012/5681

摘要： A switching system is disclosed in which a plurality of incoming highways are multiplexed in time division cells that have arrived are written into a buffer memory, the cells thus written are read in an appropriate order, separated in a multiplex way and distributed among a plurality of outgoing highways thereby to perform an exchange operation. An FIFO (First In First Out) buffer stores an empty address of the buffer memory. The address in busy state is controlled in a manner corresponding to the outgoing highways. When a cell is written in the buffer memory, the empty address is taken out of the data output of the FIFO buffer. When the cell is read of the buffer memory the address already read is returned to the data input of the FIFO buffer by an idle address chain.

公开(公告)号：US07058062B2

公开(公告)日：2006-06-06

申请号：US10040466

申请日：2002-01-09

申请人： Shirou Tanabe ,  Taihei Suzuki ,  Shinobu Gohara ,  Yoshito Sakurai ,  Kenichi Ohtsuki ,  Takao Kato ,  Hiroshi Kuwahara ,  Eiichi Amada

发明人： Shirou Tanabe ,  Taihei Suzuki ,  Shinobu Gohara ,  Yoshito Sakurai ,  Kenichi Ohtsuki ,  Takao Kato ,  Hiroshi Kuwahara ,  Eiichi Amada

IPC分类号： H04L12/56

CPC分类号： H04Q11/0421 ,  H04L12/5601 ,  H04L12/6402 ,  H04L49/1553 ,  H04L49/25 ,  H04L49/254 ,  H04L49/255 ,  H04L49/256 ,  H04L49/3009 ,  H04L49/3081 ,  H04L49/309 ,  H04L2012/5652 ,  H04L2012/5672 ,  H04L2012/6481 ,  H04Q11/0407 ,  H04Q2213/13104 ,  H04Q2213/13106 ,  H04Q2213/13141 ,  H04Q2213/13176 ,  H04Q2213/13204 ,  H04Q2213/13209 ,  H04Q2213/13216 ,  H04Q2213/1329 ,  H04Q2213/13292 ,  H04Q2213/13332 ,  H04Q2213/13352 ,  H04Q2213/13399

摘要： A packet switching system including at least one switching node or local unit each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch based on a logic channel on a packet circuit, a self-routing switch for performing switching based on the output port information, and a control unit for terminating a control packet and performing the call processing function. A switching node or tandem unit is provided including at least one self-routing switch for interconnecting the local units. A device is provided for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating-side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device.

公开(公告)号：US06445703B2

公开(公告)日：2002-09-03

申请号：US09725241

申请日：2000-11-29

申请人： Yoshito Sakurai ,  Kenichi Ohtsuki ,  Shinobu Gohara ,  Makoto Mori ,  Akira Horiki ,  Takao Kato ,  Hiroshi Kuwahara

发明人： Yoshito Sakurai ,  Kenichi Ohtsuki ,  Shinobu Gohara ,  Makoto Mori ,  Akira Horiki ,  Takao Kato ,  Hiroshi Kuwahara

IPC分类号： H04L1256

CPC分类号： H04L12/5601 ,  H04J3/247 ,  H04L12/5602 ,  H04L45/04 ,  H04L49/108 ,  H04L49/203 ,  H04L49/255 ,  H04L49/256 ,  H04L49/3081 ,  H04L2012/5627 ,  H04L2012/5631 ,  H04L2012/5638 ,  H04L2012/5649 ,  H04L2012/565 ,  H04L2012/5651 ,  H04L2012/5652 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04L2012/568 ,  H04L2012/5681 ,  H04L2012/5682 ,  H04Q11/0478

摘要： An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory. The buffer memory control circuit has a control table device for outputting an identifier of an output line to which the cells read from the shared buffer memory are to be outputted, and cells are read from the chain designated by the output line identifier outputted from the control table device.

公开(公告)号：US06215788B1

公开(公告)日：2001-04-10

申请号：US09292985

申请日：1999-04-16

申请人： Yoshito Sakurai ,  Kenichi Ohtsuki ,  Shinobu Gohara ,  Makoto Mori ,  Akira Horiki ,  Takao Kato ,  Hiroshi Kuwahara

发明人： Yoshito Sakurai ,  Kenichi Ohtsuki ,  Shinobu Gohara ,  Makoto Mori ,  Akira Horiki ,  Takao Kato ,  Hiroshi Kuwahara

IPC分类号： H04L1256

CPC分类号： H04L12/5601 ,  H04J3/247 ,  H04L12/5602 ,  H04L45/04 ,  H04L49/108 ,  H04L49/203 ,  H04L49/255 ,  H04L49/256 ,  H04L49/3081 ,  H04L2012/5627 ,  H04L2012/5631 ,  H04L2012/5638 ,  H04L2012/5649 ,  H04L2012/565 ,  H04L2012/5651 ,  H04L2012/5652 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04L2012/568 ,  H04L2012/5681 ,  H04L2012/5682 ,  H04Q11/0478

摘要： An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory. The buffer memory control circuit has a control table device for outputting an identifier of an output line to which the cells read from the shared buffer memory are to be outputted, and cells are read from the chain designated by the output line identifier outputted from the control table device.

公开(公告)号：US20120148732A1

公开(公告)日：2012-06-14

申请号：US13390810

申请日：2010-09-03

申请人： Takuya Hasegawa ,  Norihisa Waki ,  Hiroshi Kuwahara

发明人： Takuya Hasegawa ,  Norihisa Waki ,  Hiroshi Kuwahara

IPC分类号： B05D5/12

CPC分类号： H01M4/8821 ,  H01M8/0234 ,  H01M8/0239 ,  H01M8/0243 ,  H01M8/0245 ,  H01M2008/1095 ,  Y02P70/56

摘要： The invention is to provide a gas diffusion layer for fuel cells having excellent adaptability against load change by attaining a good balance between anti-dry-out properties and anti-flooding properties. The gas diffusion layer for fuel cells containing a substrate layer and an conductive fine particle layer is formed by coating a coating liquid for forming the conductive fine particle layer on at least one surface of a substrate for forming the substrate layer using a gravure roll and by a kiss coating. In coating of the coating liquid, a speed difference is generated between a line speed of transferring the substrate and a circumferential speed of the gravure roll, and apparent viscosity [η(Pa·s)] of the coating liquid as determined by type B viscosimeter satisfies the following relations: 1.0

摘要翻译： 本发明提供一种燃料电池用气体扩散层，通过实现防干燥性能和抗淹水性能之间的良好平衡，具有优异的耐负荷变化适应性。 含有基材层和导电性微粒层的燃料电池用气体扩散层通过使用凹版辊在基材层的基板的至少一个表面上涂布形成导电性微粒层的涂布液而形成， 一个吻涂层。 在涂布液体中，基板转印线速度与凹版滚筒的圆周速度之间产生速度差，以及由B型确定的涂布液的表观粘度[＆egr（（Pa·s）]） 粘度计满足以下关系：1.0 <＆eegr <200.0（3rpm）0.2 <＆eegr <10.0（30rpm）

公开(公告)号：US5579370A

公开(公告)日：1996-11-26

申请号：US941963

申请日：1992-09-08

申请人： Yutaka Fukushima ,  Tetsuo Takemura ,  Shinichi Iwaki ,  Mitsuyoshi Hashida ,  Masao Wanami ,  Isao Shimbo ,  Mitsuhiro Wada ,  Hirofumi Udaki ,  Yoshihiro Kondo ,  Yoshinobu Yamamoto ,  Arata Nakagoshi ,  Kouichi Ohta ,  Hiroshi Kuwahara ,  Yumiko Watanabe

发明人： Yutaka Fukushima ,  Tetsuo Takemura ,  Shinichi Iwaki ,  Mitsuyoshi Hashida ,  Masao Wanami ,  Isao Shimbo ,  Mitsuhiro Wada ,  Hirofumi Udaki ,  Yoshihiro Kondo ,  Yoshinobu Yamamoto ,  Arata Nakagoshi ,  Kouichi Ohta ,  Hiroshi Kuwahara ,  Yumiko Watanabe

IPC分类号： H04B10/00 ,  H04B10/032 ,  H04B10/035 ,  H04B10/07 ,  H04B10/272 ,  H04B10/29 ,  H04M3/22 ,  H04W4/16 ,  H04W24/04 ,  H04W24/06 ,  H04W56/00 ,  H04W60/04 ,  H04W64/00 ,  H04W84/04 ,  H04W88/08 ,  H04W92/00 ,  H04M11/04 ,  H04M11/00

CPC分类号： H04W24/04 ,  H04B10/25754 ,  H04W84/042 ,  H04W24/06 ,  H04W4/16 ,  H04W60/04 ,  H04W64/006 ,  H04W88/08

摘要： Duplicate optical fibers connect between a base station controller and a radio base station for each route. The duplicate optical fiber is connected to each of the radio base stations for each route through a star coupler. The radio base stations are arranged in each of areas so that the radio base stations for different routes are arranged adjacent to each other.

摘要翻译： 每个路由，重复的光纤连接在基站控制器和无线基站之间。 复制光纤通过星形耦合器连接到每个无线电基站，用于每个路由。 无线基站配置在各个区域中，使得用于不同路由的无线基站彼此相邻配置。

公开(公告)号：US5379451A

公开(公告)日：1995-01-03

申请号：US972547

申请日：1992-11-06

申请人： Arata Nakagoshi ,  Hideya Suzuki ,  Yoshinobu Yamamoto ,  Isao Shimbo ,  Tsuneo Furuya ,  Hiroshi Kuwahara

发明人： Arata Nakagoshi ,  Hideya Suzuki ,  Yoshinobu Yamamoto ,  Isao Shimbo ,  Tsuneo Furuya ,  Hiroshi Kuwahara

IPC分类号： H04W60/00 ,  H04W60/04 ,  H04W88/02 ,  H04B7/00

CPC分类号： H04W60/00 ,  H04W60/04 ,  H04W88/02

摘要： A mobile station, operable in a mobil communication system that executes a location registration processing by using the channel quality of a base station and an information concerning a base station the mobile station includes a base station information memory unit for storing therein information concerning a plurality of base stations and an amount in which the channel quality of the base station is changed with time and a location judging unit for judging on the basis of the amount in which the base station information is changed with time and which is stored in the base station information memory unit whether or not location registration processing is to be executed indicating a location in service area. Whether the location registration processing is to be executed or not is determined in accordance with the moving speed of the mobile station, thereby limiting the occurrence of a location registration request which becomes invalid with a large possibility in a short period of time because the mobile station moves to another location registration area or to the calling area in a short period of time.

摘要翻译： 一种在通过使用基站的信道质量执行位置登记处理的移动通信系统和与基站有关的信息中可操作的移动站，所述移动站包括：基站信息存储单元，用于在其中存储关于多个 基站和基站的信道质量随时间变化的量，以及基于基站信息随时间而变化并存储在基站信息中的位置判断单元的位置判断单元 存储单元是否要执行指示服务区域中的位置的位置注册处理。 根据移动台的移动速度来确定位置登记处理是否被执行，从而在短时间内限制了在很短的时间内以很大的可能性变得无效的位置登记请求的出现，因为移动站 在短时间内移动到另一个位置登记区域或呼叫区域。

公开(公告)号：US4107754A

公开(公告)日：1978-08-15

申请号：US591396

申请日：1975-06-30

申请人： Yotsuo Ishida ,  Hiroshi Kuwahara

发明人： Yotsuo Ishida ,  Hiroshi Kuwahara

IPC分类号： H02H7/16 ,  H01T2/02 ,  H02H9/00

CPC分类号： H01T2/02

摘要： Two trigger electrodes are insulatingly extended through one of two main opposite electrodes and connected to both ends of a secondary winding of a current transformer. The secondary winding has a central tap connected to that main electrode through which the trigger electrodes extend. A voltage is applied across the main electrodes and a trigger pulse is supplied to the trigger electrodes through the current transformer to initiate an electric discharge across the main electrodes.

摘要翻译： 两个触发电极通过两个主要相对电极之一绝缘地延伸并且连接到电流互感器的次级绕组的两端。 次级绕组具有连接到该主电极的中心抽头，触发器电极延伸通过该主电极。 在主电极之间施加电压，并且通过电流互感器将触发脉冲提供给触发电极，以引发跨主电极的放电。

公开(公告)号：US4080516A

公开(公告)日：1978-03-21

申请号：US729255

申请日：1976-10-04

申请人： Hiroshi Kuwahara

发明人： Hiroshi Kuwahara

IPC分类号： H04Q1/457 ,  H04M1/26

CPC分类号： H04Q1/4575

摘要： A multi-frequency signal receiver includes a multi-operation digital filter for frequency discriminating digitalized multi-frequency signals from a plurality of push-phone type telephone sets. In order to enhance the efficiency of utility of the digital filter, a signal detection circuit is provided for each telephone channel to detect the beginning, the duration and the end of an input signal for controlling the connection between the telephone channel and the digital filter for a predetermined time period from the beginning of the signal in accordance with the result of the detection, whereby a time period during which the telephone channel occupies a specific filter channel is shortened.

摘要翻译： 多频信号接收机包括用于对来自多个推电话式电话机的数字化多频信号进行频率鉴别的多操作数字滤波器。 为了提高数字滤波器的效用，为每个电话信道提供信号检测电路以检测用于控制电话信道和数字滤波器之间的连接的输入信号的开始，持续时间和结束，以便 从根据检测结果的信号开始起的预定时间段，由此缩短电话信道占用特定滤波器信道的时间段。